JPH0311878A - Picture element density converter - Google Patents

Abstract

PURPOSE:To attain excellent picture element density conversion with an optional multiple by using 1st and 2nd devices so as to binarize a picture subject to pseudo intermediate processing with the processing method not specific and a picture in which characters and line drawings exist in mixture. CONSTITUTION:A picture whose original picture elements are character or line drawings or subject to pseudo intermediate processing is inputted to a picture information input device 1. Picture element number of a multiple of one over an integral number is decreased in the main scanning direction and the subscanning direction at a majority decision processing section 2 and a thinned-out processing section 3 interleaves a line synchronizing signal. Then a signal led to a projection method processing section 5 via a multiplexer 4 is subject to picture element density conversion by the projection method and the average density or the average brightness is calculated. The output is binarized at a prescribed threshold level by a simple binarizing circuit 7 and the average density or average brightness corrected by a quantization error attended with binarization of surrounding picture elements binarized already is subject to binarization error diffusion processing 6. The excellent picture element density conversion is applied by selecting and outputting the signals with a multiplexer 8.

Description

[Detailed Description of the Invention] Industrial Applicability] The present invention is a pixel density conversion device, which is particularly applicable to images that have been subjected to pseudo-halftone processing using an unspecified processing method, and binary images such as characters and graphics. This invention relates to a pixel density conversion device that scales up and down both.

[Prior Art] When communicating between facsimiles of different resolutions or enlarging or reducing image data using an image editing device, etc., it is necessary to convert the pixel density of the image.

Conventionally, various methods have been proposed as pixel density conversion methods for binary images, such as the SPC method, the logical sum method, the 9-division method, the projection method, the linear interpolation method, and the distance inverse proportional method (Information Processing Society of Japan Journal
10126 k5).

[Problems to be Solved by the Invention] However, all of these methods have been proposed for characters and figures, and when applied to images that have been subjected to pseudo-halftone processing using dithering methods, etc., they are difficult to solve. iy1
．．・Severe deterioration due to rain and snow, such as sagging and sagging.

On the other hand, as a conversion process for a dithered image, there is a method of estimating the multivalued data before dithering using an average value filter, etc., performing pixel density conversion on the multivalued data, and re-binarizing the data (Japanese Patent Application Laid-Open No. 1983-1992-1). No. 281673, etc.), but it is difficult to accurately estimate multivalued data before binarization, and the resolution C' due to filtering is Furthermore, the same processing cannot be applied to images containing characters or figures.

In addition, when the dither matrix is known for an image processed by Textile Dither, it is possible to estimate the original multivalued image well and process an image containing a mixture of pseudo-halftone processed images and characters and figures. A method (Japanese Patent Application Laid-open No. 157468/1982) has been proposed, but when the dithering 1-risk is unknown for an unspecified image, or by using a dithering method using a conditional decision method such as an error diffusion method, Cannot be applied to digitalized images.1 As mentioned above, the conventionally proposed methods are able to improve the pixel density of images that have been subjected to pseudo-halftone processing using unspecified processing methods, and images that contain text and graphics. It is difficult to convert.

The present invention has been made in view of these points,
It is an object of the present invention to provide a pixel density conversion device that can satisfactorily convert the pixel density of an image that has been subjected to pseudo-halftone processing using an unspecified processing method and an image that includes characters and line drawings at an arbitrary magnification.

[Means for Solving the Problem] In order to solve this problem, the pixel density conversion device of the present invention is a pixel density conversion device that converts the pixel density by increasing or decreasing the number of pixels. 1. an image information input means for inputting whether the image is a character, a line drawing, or an image subjected to pseudo-halftone processing; and a calculation means for calculating the average density or average brightness after pixel density conversion using a projection method; a first binarization unit that binarizes the average density or average luminance from the calculation unit using a constant threshold; and a quantization error that is corrected by the binarization of surrounding pixels that have already been binarized. a second binarizing means for binarizing the average density or average brightness; and a first binarizing means and a second binarizing means corresponding to image information input from the image information input means and a selection means for selecting the binarization means.

Here, the image information input means includes an area input means for inputting a character or line drawing area and a pseudo-halftone-processed area on the same original image.

[Operation] In such a configuration, when the calculation result by the projection method is binarized, the first binarization means binarizes with a constant threshold and the binarization of the surrounding pixels that have already been binarized is performed. A second binarization means that binarizes the average density or average brightness corrected by the accompanying quantization error is selected in accordance with the image information input from the image information manual means. Using this processing method, an image that has been subjected to pseudo halftone processing and an image containing a mixture of characters and line drawings can be converted to a good pixel density at an arbitrary magnification.

[Embodiments] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Fig. 1 is a block diagram showing the configuration of a pixel density conversion device of this embodiment. In this figure, ■ corresponds to an image output device that stores a binary image and outputs the image in synchronization with a predetermined synchronization signal, and 2 corresponds to one pixel after the reduction when the number of pixels is reduced by an integer. A majority decision processing unit that compares the number of white pixels and the number of black pixels of the original image to be used and selects the larger color or, if they are equal, the color of the pixels after reduction, and 3 is when the number of pixels is reduced by an integer. A thinning processing section that periodically thins out the original image to reduce the number of pixels; 4 is a majority decision processing section 2 and a thinning processing section 3;
5 is a projection method processing unit that increases or decreases the number of pixels at an arbitrary magnification using a projection method and outputs a multi-value signal; 6 is a multi-value signal output from the projection method processing unit 5; an error diffusion processing unit that performs error diffusion processing on the signal, 7
1+1 pure 2
The digitizing circuit 8 is a multiplexer which selects the binary output number 1 between the error diffusion processing section 6 and the simple binarizing circuit 7.

Reference numeral 9 denotes a mode changeover switch that outputs select signals for the multiplexers 4 and 8.

1.0 is a crystal oscillator that generates a basic operating clock.

Detailed explanations of each part are given below).

Image Output Device> The image output device 1 outputs internally stored image data at the timing shown in FIG. The image data stored in the image output device may be read from an image reading device or transmitted from an external source. Operate. First, when the first line read pulse is input manually, the page synchronization signal is set to the old gh, and at the same time, the 1st line image signal is output. 2 C'l';
One line worth of image signals is output for each of '4 and later lines:, No8 sales, and pulses. When the output of the image signal for one page is finished, the page synchronization signal is made low with the next line read pulse. The image signal for one line is output in synchronization with the image clock and the line synchronization signal, which are output directly from the read clock.

Majority Decision Processing Unit> The majority decision processing unit reduces the number of pixels by an integer minus magnification in the main scanning direction and the sub-scanning direction, respectively. FIG. 3 is a block diagram showing an example of the configuration of the majority decision processing section. In the figure, 2
01.202203 is line buffer, 204-219
is a D flip-flop; 220 is an image clock control unit;
221 is a majority decision data ROM, and 222 is a line synchronization signal control section.

In the main majority decision processing section, first, the line buffers 201 to 20
3 to buffer 3 lines of image data,
A total of 4 lines worth of image data including the line being input is referred to, and the data is further shifted using each D flip-flop to refer to 166 4×4 pixels. The 166 pixel data is input to the majority data ROM 221 and outputs an image signal. The contents of the ROM data are the 1 input to the address line.
For 66 pixels, when "1" is more than or equal to "O", the data is output as '1', and when "1" is less than "O", it is written as "O".9 A mode signal is also input to the address line, and it is possible to change the magnification simply by putting data of various conversions into the same register OM and switching the mode signal.

The image clock control unit 220 thins out the image clock according to the main scanning direction magnification selected by the mode signal.
1 For example, if it is 1/2 times the image clock, the image clock will be thinned out every l clocks, and if it is 1/4 times the image clock, it will be subtracted by 3 clocks and l
Output clock.

The line synchronization signal control unit 222 thins out the line synchronization signals in accordance with the magnification in the sub-scanning direction selected by the mode signal.

The above explanation is based on a configuration that can be reduced up to 1/4 times in the main scanning direction and 1/4 times in the sub-scanning direction, but the reduction rate can be increased by further using a line buffer and a D flip-flop. The three-pronged majority data ROM22+ that can be used is
It may also be composed of ξ/j paths.

Figure 4 is a block diagram showing an example of the configuration of the thinning processing section. In the figure, 301 is an image clock control section, 302 is a line synchronization signal control section, and 303 is a D flip-flop. The image cropper control unit 301 performs control to thin out the image clock in accordance with the mote signal.The thinned out image clock is input to the flip-flop 303 and synchronized with the image signal. The control unit 302 performs control to thin out line synchronization signals in accordance with the mode signal.

FIG. 5 is a timing chart when the number of pixels is reduced by half in the sub-scanning direction in the majority decision processing section and the thinning processing section. In the figure, the number of lines is reduced by half by thinning out the line synchronization signal and image signal to be output.

Furthermore, FIG. 6 is a timing chart when the number of pixels is reduced by half in the main scanning direction.

In the figure, the number of pixels is reduced by half by thinning out the image clock with an output of 1.

The 71st x j i, ;t l'+1 is also the image j or the blade device Z4
This is an example of high image information output to. Figure 8 A is Figure 7
This is an output image obtained by processing the image information shown in the figure by the majority decision processing section 2.

The number of pixels is reduced by half in both the main scanning direction and the sub-scanning direction. There are four pixels in FIG. 7 corresponding to one pixel in FIG. 8A, but the majority decision processing unit 2 outputs white if the number of black pixels in the original image is 0 or 1, and the number of black pixels is is 2, 3, or 4, the output is black. FIG. 8B is an output image obtained by performing thinning processing on the image information shown in FIG. 7 by the thinning processing unit 3. The thinning processing unit 3 outputs an image of four pixels before conversion corresponding to one pixel after conversion always at the same position. FIG. 8B shows an output image when the lower right pixel of the four pixels before each conversion in FIG. 7 is output.

Projection Processing Unit> The projection processing unit 5 increases or decreases the number of pixels at an arbitrary magnification in both the main scanning direction and the sub-scanning direction.

FIG. 9 is a diagram showing pixels before and after projection method conversion. In the projection method, the shape of the pixel before conversion is assumed to be a square, and the side length is the length of the side of the pixel before conversion multiplied by the reciprocal of the conversion magnification in both the main scanning and sub-scanning directions (dotted line in Figure 9). This method involves superimposing a rectangle (solid line in FIG. 9) on the pixel before conversion, and using the proportion of the black area included in the rectangle as density information. The present projection processing section 5 performs density conversion of fractions other than the density conversion of an integer multiple or a fraction of an integer in the ij majority decision processing section 21 and the thinning processing section 3.

FIG. 10 is a block diagram showing an example of the configuration of the projection processing section.

In the figure, 101 is a register for setting the magnification in the main scanning direction;
Reference numeral 102 is a register for setting whether the conversion in the main scanning direction is enlargement or reduction, and for enlargement, it is set to "O" for 1° reduction.

103 is a register for setting the magnification in the sub-scanning direction; 104
is a register for setting whether the conversion in the sub-scanning direction is enlargement or reduction, and is set to "1" for enlargement and "0" for reduction.Registers 101 to 104 are set by a CPU (not shown). JO5 is a calculation unit for reduction in the main scanning direction, 106 is a calculation unit for expansion in the main scanning direction, and 10
7 is an arithmetic unit for reduction in the sub-scanning direction, 108 is an arithmetic unit for expansion in the sub-scanning direction, and 109 is an in-sync signal generation unit 5 that divides the frequency of the signal from the crystal oscillator to generate a line sync signal.
110 is a read pulse generator that divides the frequency of a signal from a crystal oscillator and generates a read pulse; 111 is an l-noister 1;
When the output of 02 is 0°, the main scanning direction reduction calculation unit 105
When the signal from
This is a multiplexer that outputs the signal from 06.

A multiplexer 112 outputs a signal from the sub-scanning direction reduction calculation unit 107 when the output of the register 104 is “0”, and outputs a signal from the sub-scanning direction enlargement calculation unit 108 when the output of the register 104 is “0”.

113 is an inverter, 114 is an AND gate, 115 is an OR gate, 116 is an AND gate, and 117 is an OR gate. Also, 118 is an inverter, 119 is an AND
gate, 120 is an OR gate, 121 is an AND gate,
122 is an OR gate. 123 and 124 are constants 25
The constant part 125 and 126 outputting 6 are line buffers, which constitute a double buffer. 127 is 125,
1. A multiplexer that switches the output of 26, 128 toggles as the line synchronization signal input is input.
゛・Guru flip flop, 129 130.131.
132 is a D flip-flop.

First, the operation of the main scanning direction reduction calculation unit 105 will be explained.

The magnification is 200/256. FIG. 11 shows the overlap of the sides before and after the conversion at that time. The main scanning direction reduction calculation unit 105 performs processing according to the magnification set in the main scanning direction magnification register 101. Further, the clock serving as a reference for operation is a clock input from the crystal oscillator 10.

Processing of each line is performed in synchronization with a signal input from line synchronization signal generation section 109. The signals output from the main scanning direction reduction calculation unit 105 are an image clock control signal and a side length output. The image clock control signal is a negative logic signal, and when it is 0'', the image clock is enabled.

Further, the length of the side is a value in the range of 1 to 256, and it is a 9-bit parallel signal. Since the conversion magnification is 2007256, the main scanning direction enlargement/reduction register is set to 0". Therefore, the multiplexer 111 selects and outputs the side length of the main scanning direction reduction calculation unit 105. The lower input of AND gate 114 becomes old gh, which controls the image clock.The lower input of AND gate 116 becomes Low, and the lower input of OR gate 117 becomes Low, so the readout clock The clock input from the crystal oscillator is output as is.

FIG. 12 is a timing chart of 200/256 reduction processing in the main scanning direction.

Next, the actual calculation method for edges will be explained with reference to FIG.

First, the length of the side of the ■th pixel is output as 200. Below, the lengths of the sides are 200- (256-200) = 144200-(25
6-144)=88 200-(256-88)=32.

According to the same calculation, the length of the next side is 200-(256-32)=-24, which is negative, but as you can see from side e in Figure 11, this is the length of the converted pixel. indicates that three pixels overlap before conversion.

Therefore, the length of the 13 sides is -24+200=176.

At this time, in order to match the post-conversion prime numbers, as shown in FIG. 12, the image processing device clock control signal is set to High for one clock of the clock from the crystal oscillator, and the image clock output is thinned out. .

The length of the next side is 200-(256-176)=120, and the subsequent processing is repeated.

Note that the side calculation processing is performed in synchronization with the image clock output.

Next, the operation of the main scanning direction enlargement calculation section 106 will be explained.

The magnification is 700/256, and FIG. 13 shows the overlap of the sides before and after conversion.

The main scanning direction enlargement calculation unit 106 performs processing according to the magnification set in the main scanning direction magnification register 101. The clock that serves as the reference for operation is a clock manually generated from a crystal oscillator. Each line is processed by the line synchronization signal generator 10.
This is done in synchronization with the human input signal from 9. The signals output from the main scanning direction enlargement calculation section 105 are a read clock control signal and a side length output. The read clock control signal is a negative logic signal, and when it is O, the read clock is enabled. The side length is a value in the range of 1 to 256, and the signal is a 9-bit parallel signal. Since the conversion magnification is 7007256, 1 is set in the main scanning direction enlargement/reduction register. Therefore, the multiplexer 111 selects the length of the side of the main scanning direction enlargement calculation section 106.

Output. Also, the lower input of the AND gate 114 is L
Since the lower input of the OR gate 115 becomes Low, the image clock output is the clock input from the crystal oscillator as it is.

FIG. 14 is a timing chart of 700/256 enlargement processing in the main scanning direction.

Next, the actual calculation method for edges will be explained with reference to FIG. First, the length of the side of the first pixel is output as 256. The length of the next side is 700-256=444>256, so 256 is output. When the above inequality sign is >, the read clock control signal is set to "1" (disabled). Since the length of the next side is 444-256=188≦256, 188 is output. Here, the read clock control signal is set to "O" to enable the read clock and request data for the next pixel from the image output device 1.

The length of the next side is (188+700)-25'6=632>256, so 256 is output. The length of the next side is 632-23
Since 5=376>256, 256 is output. Thereafter, the same process is repeated. Note that the side arithmetic processing is performed in synchronization with the clock input from the crystal oscillator.

The calculations for the sides of reduction in the main scanning direction and expansion in the main scanning direction have been described above, but calculations are also performed in a similar manner in the sub-scanning direction.

On the block diagram and timing chart, the main scanning is used as the sub-scanning, the clock input from the crystal oscillator is used as the readout pulse, the image clock is used as the line synchronization signal, and the side calculation result A
, B can be replaced with C and D, respectively, and the read clock can be replaced with a line read pulse.

Next, nine image data, which will be described with reference to image data control and image signal computation, are double-buffered by line buffers 125 and 126, and image data delayed by one line is input to the D flip-flop 129. The data in D flip-flop 129 is transferred to D flip-flop 13.
1 causes a delay of one pixel. Further, the image signal input is inputted as is to the D flip-flop 130. The data of D flip-flop 130 is transferred to D flip-flop 132.
is input and delayed by one pixel.

Note that the output image data from the image output device 1 and the processing by the projection method processing section 5 are synchronized by a line read pulse and a read clock sent from the projection method processing section 5 to the image output device 1.

Through the above processing, four pixels of 2×2 are referred to.

As shown in FIG. 15, the side calculation results A and B in the main scanning direction
Multiply each of the side calculation results C and D in the sub-scanning direction to find the combined area, AXC, BXCΔXD, BXD,
Further, the corresponding image data v, w, x, and y are multiplied together, and the added value becomes the density level of the pixel after conversion. When all bits of the 9-bit side data are operated, the result is 17 bits. The reason why it is not 18 bits is because the maximum value of 9-bit side data is 100Hex. For the image signal output, the necessary number of bits from the higher order of the 17 bits of the calculation result may be adopted.

As explained above in the case of a reduction in the number of pixels, if the magnification of the number of pixels is 1/2 or more but less than 1, it is possible for 3 pixels before conversion to overlap one side of the pixel after conversion. can be,
When conversion is performed at this magnification in both the main scanning direction and the sub-scanning direction, the pixel before conversion overlaps one pixel after conversion by a maximum of nine square elements.

Further, when the magnification is less than 1/2, even more pixels overlap. Performing calculations on all these pixels increases the hardware scale.

Therefore, in the projection method processing section 5 of this embodiment, the reference pixels are up to four pixels in total, two pixels in the main scanning direction and two pixels in the sub-scanning direction. Therefore, when the number of reference pixels exceeds four pixels, approximation processing is performed.

For example, in both the main scanning direction and the sub-scanning direction shown in FIG.
An example of correspondence between pre-conversion pixels and post-conversion pixels when the number of pixels is reduced by a magnification of 136/6 will be explained. There are 9 pixels before conversion that overlap pixel P after conversion, and this area is divided into a, b,
c, d, e, f.

Represented by g, h, i. Let the area of a-i be S, -Si, a”
Let the color of i be ■, ~■. ② is black when it is l°° white when it is “O”. The approximation method approximates that region C is the same color as the other regions, region g is the same color as region d, and regions f, h, and i are the same color as region e. According to this method, the density of pixel P ■2
becomes as follows.

1, = (S, -1, + (St, +Sc)・
To + (Sd+S,)=Id(S,÷Sr”S
h”Si) Bow.)/256・256・((136+40
)・80 + (136+40)・(+36+40)
)725B・256 0.6875.

On the other hand, in the case of an increase in the number of pixels, there is no need for approximation because the number of pixels before conversion that overlap one pixel after conversion is four or less, regardless of the magnification.

Note that the length of one side after conversion is not limited to 256, and may be calculated using any value. However, the side length is 2n
By doing so, when calculating the density, division can be done by a shift process, which not only makes it easier to configure the hardware and reduces the scale of the hardware, but also has the effect of increasing the processing speed. Further, in this example, approximation was performed by limiting the positions of reference pixels, but for example, two pixels with large overlap may be extracted as reference pixels. Furthermore, the reference pixels are not limited to 2×2, but depend on the balance between the reproducibility of the reproduced image, the hardware scale, and the processing speed.

Error Diffusion Processing Unit> Next, the error diffusion processing unit will be explained. When the projection method is applied to an image that has undergone pseudo-halftone processing using the dither method, etc.,
When the calculation result is simply binarized (that is, binarized using a fixed threshold value), moiré is emphasized due to the quantization error, resulting in severe deterioration of image quality. In this embodiment, in order to prevent image quality deterioration due to such quantization errors, binarization processing is performed using an error diffusion method.

FIG. 17 is a block diagram showing an example of purchasing an error diffusion processing section. The pixel density or brightness IA of the projection method output is the binary value generated in the surrounding pixels before passing through one pixel delay elements 51a to 51d, a delay element 53 with three pixels less than one line, and adders 52a to 52d. The conversion errors e and 'ye4 are added. The density value or luminance including the binarization error of the surrounding pixels is binarized by the binarization processing unit 54 using a constant threshold value, and the value becomes the density or luminance of the pixel to be determined.

Next, the quantization error caused by this binarization is calculated by the binarization error calculation section 55 and distributed as e+ to e4 by the error distribution processing section 56. The binarization error calculation unit 56 calculates the binarization error by e.
, the manual concentration to the binarization processing unit is Io, the threshold value is T, and the binarization output is “1” or °゛0. Also, in the error distribution unit 56, e, ~e4 are calculated as follows, for example. Calculated.

As shown in FIG. 18, e1 to e4 are distributed to surrounding pixels of the pixel of interest.

Note that although the examples shown in FIGS. 17 and 18 are cases in which the error is diffused to four surrounding pixels, the present invention is not limited to this, and the determination may be made in consideration of image quality and circuit scale.

However, in order to eliminate moiré well, the binarization error should be set to 10.
0% needs to be diffused to the surrounding area. That is, Σen=E (
en is determined so as to satisfy n: the number of surrounding pixels to which the error is distributed.

Binarization processing using the minimum average error method> Also, instead of the error diffusion processing section, the
The same is true even if a value processing section is used.

FIG. 19 is a block diagram showing the configuration of a density preserving binarization section using the minimum average error method. The density of a pixel converted by the interpolation method is determined by applying a weight specified by a weighting generator 61 to error data ε1° between previously generated input data XI and output data Yl stored in an error buffer memory 60. The value multiplied by the coefficient αIJ is standardized, and the adder 6
2 is added. Writing this as a formula is as follows.

An example of weighting coefficients is shown in FIG.

Next, correction data x1. ' is compared with a threshold value in the binarization circuit 63, and output data Y1J is output. Here YI,
is binary data such as Y maw or y, , n (for example, 1 and ○).

On the other hand, the arithmetic unit 64 calculates the difference ε1. between the correction data XI and the output data YIJ. is calculated, and the result is stored in the corresponding pixel location 65 of the error buffer memory 60.

By repeating this operation, 2
Value processing is executed.

Binarization Process Using a Constant Threshold In the simple binarization processing section 7, the density of the converted pixel obtained by the projection method or the projection method is binarized using a constant threshold.

Each block has been explained above.

Switching of multiplexer 4.8> The overall flow of signals is switched by the mode changeover switch 9 depending on the nature of the image output from the image output device 1.

If the image output from the image output device l is an image subjected to pseudo-halftone processing such as the dither method or the error diffusion method, the multiplexer 4 selects the signal ° output from the thinning processing section 3. Furthermore, when the image output from the image output device 1 is a simple binarized image, the multiplexer 4 selects the signal output from the majority processing section 2. This is the 8th A
figure.

As can be seen from Figure 8B, when reducing the number of pixels by an integer on an image that has undergone pseudo-halftone processing, it is better to perform thinning processing within a certain area than to perform majority processing. This is because there is little change in the ratio of the number of white pixels to black pixels.

Therefore, gradation is preserved. Also, when reducing the number of pixels by an integer for simple binarized pixels,
Since manuscripts of images that have been simply binarized are often characters or figures, majority decision processing is more appropriate than thinning processing because fewer missing or broken thin lines occur.

If the image output from the image output device 1 is an image subjected to pseudo-halftone processing, the multiplexer 8 selects the signal output from the error diffusion processing section 6. Furthermore, if the image output from the image output device 1 is a simple binarized image, the signal output from the simple binarization circuit 7 is selected. If the projection processing unit converts the image that has been subjected to pseudo-halftone processing to a fractional magnification that is not an integer multiple, moiré will occur if the image is processed by the simple binarization circuit 7.

For this reason, the error diffusion processing section 6 performs processing to prevent the occurrence of moiré. Furthermore, when the projection processing unit performs fractional multiplication on a simple binarized image, the error diffusion processing unit 6
If you process with
Edges may become blurred. Therefore, the simple binarized image is processed by the simple binarization circuit 7 to prevent image quality deterioration in the text portion.

As mentioned above, the multiplexer 4.8 depends on the nature of the image to be processed.
Although we have explained how to switch the multiplexer, you can switch the multiplexer from the operation panel (not shown) or from the C
The PU or the like may manage the characteristics of the image output from the image output device 1, and the CPU may output a control signal and switch based on the information. For example, a method of separating the pseudo halftone processing part and the simple binarization part based on the number of change points, pattern structure, etc. can be considered.

Image Information Input Unit> FIG. 21 is a block diagram showing an example of the configuration when switching the multiplexer 8 based on information input by the image information input unit 9'.

Here, the image information input section is not the mode changeover switch 9 that determines and switches the image on a page-by-page basis as described above, but the image information input section that uses the keyboard, mouse, etc. With the input device, area information within the page and its coordinates A (Xl, yl), B (xa, y2
) and select them separately within the page.

FIG. 23 shows an example of the configuration of the image information input section 9', and FIG. 24 shows its operation timing. Keyboard, mouse, etc. 92
The selection signal timing control section 93 obtains a selection signal synchronized with the image clock and the line synchronization signal from the coordinate information and image information of the area input through the area coordinate and content information input section 91. In addition, in the selection signal shown in FIG. 24, High indicates a pseudo intermediate good image, and Low indicates a character or line drawing.

As explained above, in the present invention, by performing binarization processing on the average density or average brightness of converted pixels obtained by the projection method using the error diffusion method, It is possible to prevent image quality deterioration due to moiré that occurs during processing.

Furthermore, by selecting the simple binarization processing section depending on the nature of the image, it is possible to prevent edge deterioration and dotted thin lines, which are problems during conversion when the pixel density of the converted image is low.

[Effects of the Invention] According to the present invention, it is possible to provide a pixel density conversion device that satisfactorily converts the pixel density of an image that has been subjected to pseudo-halftone processing using an unspecified processing method and an image that includes characters and line drawings at an arbitrary magnification.

In detail, (1) If the binary image to be converted is an image that has been subjected to pseudo-halftone processing, projection processing and error diffusion processing are effective in suppressing the occurrence of moiré even when converting fractional magnifications. be.

(2) When the binary image to be converted is an image that has been subjected to simple binarization processing, performing the projection method processing and the simple binarization processing has the effect of suppressing deterioration of the edge portions of characters or figures.

(3) When the magnification for reducing the number of pixels is 1/2 or less, by using the thinning processing section or majority processing section and projection processing together, the burden of projection processing can be reduced and the hardware can be made smaller. There is an effect that can be done.

(4) In the case of (3), if the binary image to be converted is an image that has been subjected to pseudo-halftone processing, by performing thinning processing, the change in the ratio of the number of white pixels and black pixels is suppressed and the halftone is preserved. It has the effect of

(5) In the case of (3), the binary image to be converted is simple 2
If the image has been digitized, performing majority voting has the effect of minimizing missing or discontinuous thin lines.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of the pixel density conversion device of this embodiment, FIG. 2 is a timing chart of input/output signals of the image output device, and FIG. 3 is a block diagram showing an example of the configuration of the majority decision processing section. 4 is a block diagram showing an example of the configuration of the thinning processing section, and FIG. 5 is a timing chart of input and output signals of the majority processing section and the thinning processing section when the number of pixels is reduced by half in the sub-scanning direction. Figure 6 is a timing chart of input and output signals of the majority processing unit and thinning processing unit when the number of pixels is reduced by half in the main scanning direction, and Figure 7 is an example of pixel information output from the pixel output device. 8A is a diagram showing an output image obtained by processing the image information in FIG. 7 by a majority processing unit; FIG. 8B is a diagram showing an output image obtained by processing the image information in FIG. Figure 9 is a diagram showing the principle of the projection method, Figure 10 is a splitter diagram showing the configuration of the projection processing unit, and Figure 11 is the overlap of the sides of the pre-conversion pixels and post-conversion pixels when the number of pixels is reduced in the projection method. Figure 12 is a timing chart when the number of pixels is decreased in the projection processing section. Figure 13 is a diagram showing the overlap of the sides of the pre-conversion pixels and post-conversion pixels when the number of pixels is increased in the projection method. , Fig. 14 is a timing chart when the number of pixels in the projection method processing section is increased, Fig. 15 is a diagram showing approximated reference pixels in the projection method processing section, and Fig. 16 is a timing chart in the case of increasing the number of pixels in the projection method processing section. 13/256
A diagram showing an example of the correspondence between pre-conversion pixels and post-conversion pixels when the number of pixels is reduced by a magnification of 6. Fig. 17 is a block diagram showing the configuration of the error diffusion processing section. Fig. 18 is a diffusion diagram of the error diffusion processing section. FIG. 19 is a block diagram showing the configuration of a binarization processing unit based on the minimum average error method. FIG. 20 is a diagram showing an example of a weighting matrix using the minimum average error method. FIG. 21 is a block diagram showing a configuration including an image information input section, FIG. 22 is a diagram showing a document displaying a mixed halftone area and text/line drawing area on a CRT, etc., and FIGS. 23 and 24.
The figure is a diagram showing the configuration of an image information input section and its time chart. 1... Image output device, 2... Majority decision processing unit, 3...
- Thinning processing unit, 4...Multiplexer, 5...Projection method processing unit, 6...Error diffusion processing unit (binarization processing unit using the minimum average error method), 7...Simple binarization circuit , 8・
...Multiplexer, 9...There is a mode changeover switch. ...Image information input unit, O...Crystal oscillator, Fig. 8A, Fig. 8B, Fig. 9, Fig. 15, Fig. 16, Fig. 22, Fig. 23

Claims (2)

[Claims] (1) A pixel density conversion device that converts pixel density by increasing or decreasing the number of pixels, and an image information input means for inputting whether the original image is a character, a line drawing, or an image subjected to pseudo halftone processing. a calculation means for calculating the average density or average brightness after pixel density conversion using a projection method; and a first binarization for binarizing the average density or average brightness from the calculation means using a constant threshold value. means, a second binarization means for binarizing the average density or average luminance corrected by the quantization error accompanying the binarization of the surrounding pixels that have already been binarized; and the image information inputting means. A pixel density conversion device comprising: a selection means for selecting the first binarization means and the second binarization means in accordance with input image information. (2) The pixel density conversion according to claim 1, wherein the image information input means includes an area input means for inputting an area of characters or line drawings and an area subjected to pseudo halftone processing on the same original image. Device.