JPH03116941A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03116941A JPH03116941A JP1256045A JP25604589A JPH03116941A JP H03116941 A JPH03116941 A JP H03116941A JP 1256045 A JP1256045 A JP 1256045A JP 25604589 A JP25604589 A JP 25604589A JP H03116941 A JPH03116941 A JP H03116941A
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- ball
- wire
- thin film
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 238000004519 manufacturing process Methods 0.000 title description 7
- 239000010409 thin film Substances 0.000 claims abstract description 35
- 239000002861 polymer material Substances 0.000 claims description 22
- 239000000463 material Substances 0.000 abstract description 13
- 239000010408 film Substances 0.000 abstract description 12
- 229920005989 resin Polymers 0.000 abstract description 12
- 239000011347 resin Substances 0.000 abstract description 12
- 238000000034 method Methods 0.000 abstract description 9
- 238000010438 heat treatment Methods 0.000 abstract description 8
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 230000002950 deficient Effects 0.000 abstract 1
- 235000019589 hardness Nutrition 0.000 description 13
- 229920001187 thermosetting polymer Polymers 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 239000004925 Acrylic resin Substances 0.000 description 2
- 229920000178 Acrylic resin Polymers 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 239000000976 ink Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85009—Pre-treatment of the connector or the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8536—Bonding interfaces of the semiconductor or solid state body
- H01L2224/85375—Bonding interfaces of the semiconductor or solid state body having an external coating, e.g. protective bond-through coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Abstract
Description
【発明の詳細な説明】
〔概要〕
半導体素子のボンディングパッドにワイヤボンディング
を行う半導体装置の製造方法に関し、ボンディングワイ
ヤ先端のボールの広がりやボンディング位置を正確に制
御しなくてもワイヤボンディング後、ボンディングパッ
ドが露出しないようにし、またワイヤボンディングの際
に半導体素子に与えるダメージを小さくして不良の発生
を少なくすることを目的とし、
半導体素子表面に、ボンディングの際の加熱温度でボン
ディングワイヤの材料の硬度より低い硬度となる高分子
材料薄膜をボンディングパッドを覆うように形成し、該
半導体素子を加熱して該高分子材料薄膜上からボンディ
ングワイヤ先端のボールを押し当て、該高分子材料薄膜
を貫通させて、該ボンディングワイヤ先端のボールをボ
ンディングパッドに圧着する工程を含むように構成する
。[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a semiconductor device that performs wire bonding to a bonding pad of a semiconductor element, it is possible to perform bonding after wire bonding without accurately controlling the spread of the ball at the tip of the bonding wire or the bonding position. The purpose of this method is to prevent pads from being exposed and to reduce the damage caused to semiconductor elements during wire bonding, thereby reducing the occurrence of defects. A thin film of polymeric material having a hardness lower than the hardness is formed to cover the bonding pad, the semiconductor element is heated, and a ball at the tip of the bonding wire is pressed from above the thin film of polymeric material to penetrate the thin film of polymeric material. The method includes a step of pressing the ball at the tip of the bonding wire to the bonding pad.
本発明は、半導体装置の製造方法に関し、特に半導体素
子のボンディングパッドにワイヤボンディングを行う方
法に関する。The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of wire bonding to bonding pads of a semiconductor element.
［従来の技術］
従来の半導体装置の製造方法は、第３図のように、半導
体素子１表面のアルミニウム（Ａｆｆｉ）等よりなるボ
ンディングパッド５に金（Ａｕ）等よりなるワイヤ３先
端のボール４がボンディングされる。ボンディング後、
樹脂による封止またはセラミ、ンク、金属等の蓋による
気密封止が行われる。[Prior Art] As shown in FIG. 3, in the conventional method of manufacturing a semiconductor device, a bonding pad 5 made of aluminum (Affi) or the like on the surface of a semiconductor element 1 is bonded to a ball 4 at the tip of a wire 3 made of gold (Au) or the like. is bonded. After bonding,
Sealing with resin or hermetically sealing with a lid made of ceramic, ink, metal, etc. is performed.
第３図のようにボンディング後、ボンディングパッド５
に露出部６があると、コロ−ジョンが発生して素子特性
が劣化する問題がある。After bonding as shown in Figure 3, bonding pad 5
If there is an exposed portion 6, there is a problem that corrosion occurs and the device characteristics deteriorate.
〔発明が解決しようとする課題］
そこで、露出部６が形成されないように絶縁膜１３の窓
を小さくしたり、ボール４を大きくしたりするすること
が考えられるが、窓を小さくするとボンディング部の結
合強度が低下し、またボンディングパッド５に対するボ
ール４の位置を正確に制御し、ボール４を大きくしてボ
ール４を熱圧着したときの広がりで制御よくボンディン
グパッドを完全に覆うようにするのは難しい問題がある
。[Problems to be Solved by the Invention] Therefore, it is conceivable to make the window of the insulating film 13 smaller or to make the ball 4 larger so that the exposed part 6 is not formed, but if the window is made smaller, the bonding part becomes smaller. In addition, it is necessary to accurately control the position of the ball 4 with respect to the bonding pad 5, so that the ball 4 is enlarged so that when the ball 4 is bonded by thermocompression, its spread completely covers the bonding pad in a controlled manner. There is a difficult problem.
また、このときボール４を大きくしてボール４が絶縁膜
１３に強く当たると絶縁膜１３にクラックが生じて素子
特性が劣化する問題が起こる。Further, at this time, if the ball 4 is made larger and the ball 4 strongly hits the insulating film 13, cracks will occur in the insulating film 13, causing a problem of deterioration of device characteristics.
本発明は、ボンディングワイヤ先端のボールの広がりや
ボンディング位置を正確に制御しなくてもワイヤボンデ
ィング後、ボンディングパッドが露出しないようにし、
またワイヤボンディングの際に半導体素子に与えるダメ
ージを小さくして不良の発生を少なくすることを目的と
する。The present invention prevents the bonding pad from being exposed after wire bonding without accurately controlling the spread of the ball at the tip of the bonding wire and the bonding position.
Another object is to reduce the damage caused to semiconductor elements during wire bonding, thereby reducing the occurrence of defects.
本発明によれば、上記目的は、半導体素子表面に、ボン
ディングの際の加熱温度でボンディングワイヤの材料の
硬度より低い硬度となる高分子材料薄膜をボンディング
パッドを覆うように形成し、該半導体素子を加熱して該
高分子材料薄膜上からボンディングワイヤ先端のボール
を押し当て、該高分子材料薄膜を貫通させて、該ボンデ
ィングワイヤ先端のボールをボンディングパッドに圧着
する工程を含むことを特徴とする半導体装置の製造方法
により達成される。According to the present invention, the above object is to form a thin film of a polymer material on the surface of a semiconductor element so as to cover the bonding pads and whose hardness is lower than the hardness of the material of the bonding wire at the heating temperature during bonding. The method is characterized by comprising the step of heating and pressing a ball at the tip of the bonding wire from above the thin film of polymer material, penetrating the thin film of polymer material, and pressing the ball at the tip of the bonding wire to the bonding pad. This is achieved by a method for manufacturing a semiconductor device.
本発明では、ボンディングパッドを高分子材料薄膜で覆
でおき、ワイヤ先端のボールを高分子材料薄膜の上から
押し当て、高分子材料薄膜を貫通させてボンディングパ
ッドに圧着するものであり、ボンディング部こボンディ
ングパッドが露出せず、またボールをボンディングパッ
ド周縁部の絶縁膜に強く当たることはない。In the present invention, the bonding pad is covered with a thin film of polymer material, and the ball at the tip of the wire is pressed against the thin film of polymer material to penetrate the thin film of polymer material and press-bond to the bonding pad. The bonding pad is not exposed, and the ball does not strongly hit the insulating film around the bonding pad.
高分子材料薄膜は、ボンディングの際の加熱温度でボン
ディングワイヤの材料の硬度より低い硬度となる高分子
材料で構成すれば、ワイヤ先端のボールを貫通させるこ
とができ、またボールを押し当てるボンディングの瞬間
的な圧力に対して緩衝作用をなし、ボンディングパッド
の下の回路素子へのダメージを小さくできる。If the polymer material thin film is made of a polymer material whose hardness is lower than that of the bonding wire material at the heating temperature during bonding, it will be possible to penetrate the ball at the tip of the wire, and it will also be possible to penetrate the ball at the tip of the wire. It has a buffering effect against instantaneous pressure and can reduce damage to circuit elements under the bonding pad.
〔実施例］
第１図は本発明の一実施例の半導体装置の製造方法に係
る断面図である。以下、図面を参照して本発明の一実施
例を説明する。[Embodiment] FIG. 1 is a sectional view of a method for manufacturing a semiconductor device according to an embodiment of the present invention. Hereinafter, one embodiment of the present invention will be described with reference to the drawings.
まず第１図（ａ）のように、半導体基板１１上に絶縁膜
１２、ボンディングパッド５．絶縁膜１３が形成された
半導体素子１表面に高分子材料の薄膜、例えば樹脂薄膜
２を厚さ１〜３０μｍ程度に形成する。First, as shown in FIG. 1(a), an insulating film 12 is placed on a semiconductor substrate 11, a bonding pad 5. On the surface of the semiconductor element 1 on which the insulating film 13 is formed, a thin film of a polymer material, for example, a resin thin film 2 is formed to a thickness of about 1 to 30 μm.
この樹脂薄膜（高分子材料薄膜）２は、ボンディングの
際の加熱温度におけるボンディングワイヤの材料のヌー
プ硬度より低い硬度の熱硬化性樹脂（高分子材料）また
は熱可塑性樹脂（高分子材料）を用いる。ボンディング
ワイヤの材料として、ＡｆＡｕ、Ｃｕが用いられ、ボン
ディングの際の加熱温度を１００°Ｃ程度とすると、ヌ
ープ硬度はそれぞれ、約３０Ｈｋ、約６０８に、約１０
０Ｈｋとなる。熱硬化前がこれらのヌープ硬度より低い
熱硬化性樹脂としてアクリル系樹脂、エポキシ樹脂等を
用いることができ、コーティング等により薄膜を形成す
る。This resin thin film (polymer material thin film) 2 is made of thermosetting resin (polymer material) or thermoplastic resin (polymer material) having a hardness lower than the Knoop hardness of the bonding wire material at the heating temperature during bonding. . AfAu and Cu are used as bonding wire materials, and when the heating temperature during bonding is about 100°C, the Knoop hardness is about 30 Hk, about 608, and about 10 Hk, respectively.
It becomes 0Hk. Acrylic resins, epoxy resins, and the like can be used as thermosetting resins whose hardness before thermosetting is lower than these Knoop hardnesses, and a thin film is formed by coating or the like.
また、熱可塑後のヌープ硬度がＡｌ１．Ａｕ、Ｃｕより
低い熱可塑性高分子材料としてポリパラキシレン等を用
いることができ、蒸着、コーティング等により薄膜を形
成する。Moreover, the Knoop hardness after thermoplasticization is Al1. Polyparaxylene or the like can be used as a thermoplastic polymer material with lower thermoplasticity than Au or Cu, and a thin film is formed by vapor deposition, coating, etc.
次に、半導体素子１を１００″Ｃ程度に加熱し、ワイヤ
３の先端に形成されたボール４をボンディングツールに
より樹脂薄膜（高分子材料薄膜）２上から押し当て、第
１図（ｂ）のように貫通させる。Next, the semiconductor element 1 is heated to about 100"C, and the ball 4 formed at the tip of the wire 3 is pressed onto the resin thin film (polymer material thin film) 2 using a bonding tool, as shown in FIG. 1(b). Penetrate it like this.
ボール４は強い力で押され、すぐに第１図（Ｃ）のよう
に広がっていき、第１図（ｄ）のように広がった状態で
良好に熱圧着する。The ball 4 is pressed with a strong force and immediately spreads out as shown in FIG. 1(C), and is well bonded by thermocompression in the spread state shown in FIG. 1(d).
以上の方法により、ボンディング後にボンディングパッ
ド５を露出せず、またボール４をボンディングパッド５
の周縁部を覆う絶縁膜１３に強く当てることなく、ボン
ディングができる。また、ボール４を押し当てるボンデ
ィングの瞬間的な圧力に対して樹脂薄膜（高分子材料薄
膜）２は緩衝作用をなし、ボンディングパッドの下の回
路素子へのダメージを小さくできる。By the above method, the bonding pad 5 is not exposed after bonding, and the ball 4 is not exposed to the bonding pad 5 after bonding.
Bonding can be performed without applying force to the insulating film 13 covering the peripheral edge of the insulating film 13. Further, the resin thin film (polymer material thin film) 2 has a buffering effect against the instantaneous pressure of bonding when the ball 4 is pressed, and damage to the circuit elements under the bonding pad can be reduced.
尚、第３図の従来技術では、半導体素子１のエツジ８に
ボンディングワイヤ３が接触して電気的に短絡する問題
があったが、第１図のように絶縁材料である樹脂薄膜（
高分子材料薄膜）２を半導体素子ｌのエツジまで覆うよ
うに形成すれば、ボンディングワイヤ３が半導体素子１
のエツジに接触するのを防げる。In the conventional technique shown in FIG. 3, there was a problem that the bonding wire 3 came into contact with the edge 8 of the semiconductor element 1, causing an electrical short circuit. However, as shown in FIG.
If the polymer material thin film 2 is formed so as to cover the edges of the semiconductor element 1, the bonding wire 3 can be attached to the semiconductor element 1.
This prevents contact with the edges of the
また、熱硬化性の樹脂薄膜（高分子材料薄膜）２を用い
た場合には、ボンディング後、加熱して硬化させると良
い。例えば、アクリル系樹脂では、１５０″Ｃ程度に加
熱して硬化させる。Further, when a thermosetting resin thin film (polymer material thin film) 2 is used, it is preferable to heat and harden it after bonding. For example, acrylic resin is cured by heating to about 150''C.
第２図は本発明の別の実施例の半導体装置の製造方法に
係る断面図である。この実施例では、第２図のように樹
脂薄膜（高分子材料薄膜）２１をボンディングワイヤよ
り硬度の低い接着材７で接着し、樹脂薄膜（高分子材料
薄膜）２と接着材７を貫通させてボール４をボンディン
グパッド５に熱圧着したものである。この実施例におい
ても第１図の実施例と同様にボンディング後、良好な素
子が得られる。FIG. 2 is a cross-sectional view of a method of manufacturing a semiconductor device according to another embodiment of the present invention. In this embodiment, as shown in FIG. 2, a resin thin film (polymer material thin film) 21 is bonded with an adhesive 7 having a lower hardness than the bonding wire, and the resin thin film (polymer material thin film) 2 and the adhesive 7 are penetrated. The ball 4 is bonded to the bonding pad 5 by thermocompression. In this embodiment as well, a good element can be obtained after bonding, similar to the embodiment shown in FIG.
本発明によれば、ボンディングの際の加熱温度でボンデ
ィングワイヤの材料の硬度より低い硬度となる高分子材
料薄膜をボンディングパッドを覆うように形成し、その
高分子材料薄膜上からボンディングワイヤ先端のボール
を貫通させて熱圧着することにより、ボンディングワイ
Ａ・先端のボールの広がりやボンディング位置を正確に
制御しな（でもワイヤボンディング後、ボンディングパ
ッドが露出することがなく、またワイヤボンディングの
際に半導体素子に与えるダメージが小さいので、素子特
性が良好な素子が得られる。According to the present invention, a thin film of polymeric material whose hardness is lower than that of the material of the bonding wire at the heating temperature during bonding is formed to cover the bonding pad, and the ball at the tip of the bonding wire is coated onto the thin film of polymeric material. By penetrating the bonding wire A and bonding with heat, it is possible to accurately control the spread of the ball at the tip of bonding wire A and the bonding position (but the bonding pad will not be exposed after wire bonding, and the semiconductor Since the damage to the element is small, an element with good element characteristics can be obtained.
【図面の簡単な説明】
第１図は本発明の一実施例を説明するための断面図、
第２図は本発明の別の実施例を説明するための断面図、
第３図は従来技術を説明するための断面図である図中、
１ ・・・ 半導体素子
２．２１・・・ 樹脂薄ＩＪ’ｊｉＣ高分子材料ＩＪ
Ｉｉ）３ ・・・ ワイヤ
４ ・・・ ボール
５ ・・・ ボンディングパラ
７ ・・・ 接着材
１１ ・・・ 半導体基板
１２、１３・・・ 絶縁膜。
科[Brief Description of the Drawings] Fig. 1 is a sectional view for explaining one embodiment of the present invention, Fig. 2 is a sectional view for explaining another embodiment of the present invention, and Fig. 3 is a conventional art. In the figure, which is a cross-sectional view for explaining, 1...Semiconductor element 2.21...Resin thin IJ'jiC polymer material IJ
Ii) 3... Wire 4... Ball 5... Bonding para 7... Adhesive 11... Semiconductor substrates 12, 13... Insulating film. department
Claims (1)
度でボンディングワイヤの材料の硬度より低い硬度とな
る高分子材料薄膜（２、２１）をボンディングパッド（
５）を覆うように形成し、 該半導体素子（１）を加熱して該高分子材料薄膜（２、
２１）上からボンディングワイヤ（３）先端のボール（
４）を押し当て、該高分子材料薄膜（２、２１）を貫通
させて、該ボンディングワイヤ（３）先端のボール（４
）をボンディングパッド（５）に圧着する工程を含むこ
とを特徴とする半導体装置の製造方法[Claims] On the surface of the semiconductor element (1), a bonding pad (
5), and heats the semiconductor element (1) to form a thin film of the polymer material (2, 5).
21) From above, insert the ball at the tip of the bonding wire (3) (
4) to penetrate the polymer material thin film (2, 21) and release the ball (4) at the tip of the bonding wire (3).
) to a bonding pad (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1256045A JPH03116941A (en) | 1989-09-29 | 1989-09-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1256045A JPH03116941A (en) | 1989-09-29 | 1989-09-29 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03116941A true JPH03116941A (en) | 1991-05-17 |
Family
ID=17287141
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1256045A Pending JPH03116941A (en) | 1989-09-29 | 1989-09-29 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03116941A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002033749A1 (en) * | 2000-10-14 | 2002-04-25 | Robert Bosch Gmbh | Method for protecting electronic or micromechanical components |
| EP1333489A3 (en) * | 2002-01-31 | 2006-07-26 | Fujitsu Hitachi Plasma Display Limited | Semiconductor chip with a protective film |
| WO2013190638A1 (en) * | 2012-06-19 | 2013-12-27 | パイオニア株式会社 | Connection structure of conductor, electronic equipment |
| WO2014162387A1 (en) * | 2013-04-01 | 2014-10-09 | パイオニア株式会社 | Wire connection structure and electrical device |
| JP2018078152A (en) * | 2016-11-07 | 2018-05-17 | Koa株式会社 | Chip resistor |
| CN108257884A (en) * | 2018-01-24 | 2018-07-06 | 德淮半导体有限公司 | Semiconductor devices and forming method thereof |
-
1989
- 1989-09-29 JP JP1256045A patent/JPH03116941A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002033749A1 (en) * | 2000-10-14 | 2002-04-25 | Robert Bosch Gmbh | Method for protecting electronic or micromechanical components |
| EP1333489A3 (en) * | 2002-01-31 | 2006-07-26 | Fujitsu Hitachi Plasma Display Limited | Semiconductor chip with a protective film |
| US7224044B2 (en) | 2002-01-31 | 2007-05-29 | Fujitsu Hitachi Plasma Display Limited | Semiconductor chip mounting substrate and flat display |
| WO2013190638A1 (en) * | 2012-06-19 | 2013-12-27 | パイオニア株式会社 | Connection structure of conductor, electronic equipment |
| WO2014162387A1 (en) * | 2013-04-01 | 2014-10-09 | パイオニア株式会社 | Wire connection structure and electrical device |
| JP2018078152A (en) * | 2016-11-07 | 2018-05-17 | Koa株式会社 | Chip resistor |
| CN108257884A (en) * | 2018-01-24 | 2018-07-06 | 德淮半导体有限公司 | Semiconductor devices and forming method thereof |
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