JPH0311633A - Manufacture of compound semiconductor device - Google Patents

Manufacture of compound semiconductor device

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Publication number
JPH0311633A
JPH0311633A JP14406889A JP14406889A JPH0311633A JP H0311633 A JPH0311633 A JP H0311633A JP 14406889 A JP14406889 A JP 14406889A JP 14406889 A JP14406889 A JP 14406889A JP H0311633 A JPH0311633 A JP H0311633A
Authority
JP
Japan
Prior art keywords
insulating film
semiconductor
compound semiconductor
water
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14406889A
Other languages
Japanese (ja)
Inventor
Yasuhiro Tanaka
康裕 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SEKIYU SANGYO KATSUSEIKA CENTER
Japan Petroleum Energy Center JPEC
Eneos Corp
Original Assignee
SEKIYU SANGYO KATSUSEIKA CENTER
Petroleum Energy Center PEC
Nippon Mining Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SEKIYU SANGYO KATSUSEIKA CENTER, Petroleum Energy Center PEC, Nippon Mining Co Ltd filed Critical SEKIYU SANGYO KATSUSEIKA CENTER
Priority to JP14406889A priority Critical patent/JPH0311633A/en
Publication of JPH0311633A publication Critical patent/JPH0311633A/en
Pending legal-status Critical Current

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  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

PURPOSE:To obtain an insulating film whose electric characteristic is excellent and whose interface characteristic is stable by a method wherein the surface of a compound semiconductor using In and Sb as its constituent elements is treated with a mixed solution of ammonia water and hydrogen peroxide water and, after that, the insulating film is deposited on the semiconductor. CONSTITUTION:The surface of a compound semiconductor using In and Sb as its constituent elements is treated with a mixed solution of ammonia water and hydrogen peroxide water; after that, an insulating film is deposited on the compound semiconductor. That is to say, when the surface is treated with the mixed solution of ammonia water and hydrogen peroxide water, the surface of a semiconductor substrate is changed from hydrophobicity to hydrophilicity. When the surface is cleaned with pure water and is dried, it is possible to uniformly remove water from the semiconductor substrate. The substrate is not dried unevenly. At the same time, an organic contamination on the surface of the semiconductor is removed; a clean semiconductor interface can be formed; a defect is reduced; a close contact property is made good. Thereby, it is possible to obtain the insulating film whose electric characteristic is good and whose interface characteristic is stable.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は、InとSbを構成元素とする化合物半導体上
に界面の電気的特性が良好な絶縁膜を形成する化合物半
導体装置の製造方法に関するものである。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a compound semiconductor that forms an insulating film with good interface electrical characteristics on a compound semiconductor containing In and Sb as constituent elements. The present invention relates to a method for manufacturing the device.

(従来の技術) InSb (インジウムアンモチン)は、2元化合物半
導体の一種で、従来から赤外線検知素子の材料として用
いられている。
(Prior Art) InSb (indium ammothine) is a type of binary compound semiconductor, and has been conventionally used as a material for infrared sensing elements.

一方、近年、半導体基板上に絶縁膜を堆積し、その絶縁
膜を、パッシベーション膜として利用した半導体素子や
、ゲート絶縁膜として利用したM I S (Meta
l−1n5ulator −S emiconduct
or)型の半導体素子が作製されている。特にMIS型
素子は近年とみにその種類が多くなってきており、代表
例としては、電界効果型トランジスタ(FET)、電荷
転送素子(CCD)、電荷注入素子(CI D)があげ
られる。そして、I nSbもこのMIS型素子の半導
体材料として用いられてきている。ところで、MIS型
素子実現のために、I nSb基板上に絶縁膜を形成す
る際には、その半導体と絶縁膜界面の電気的特性が重要
なポイントとなる。
On the other hand, in recent years, semiconductor devices have been developed in which an insulating film is deposited on a semiconductor substrate and used as a passivation film, and MIS (Meta) is used as a gate insulating film.
l-1n5ulator-Semiconduct
or) type semiconductor devices have been manufactured. In particular, the number of types of MIS type devices has increased in recent years, and representative examples include field effect transistors (FETs), charge transfer devices (CCDs), and charge injection devices (CIDs). InSb has also been used as a semiconductor material for this MIS type element. By the way, when forming an insulating film on an InSb substrate to realize a MIS type element, the electrical characteristics of the interface between the semiconductor and the insulating film are an important point.

従来、この種の素子の製造における絶縁膜形成時の前処
理としては、半導体基板に鏡面研磨を施した後、表面の
加工変質層を、乳酸系、又は臭素系のエツチング液を用
いて取除き、次いで超純水により充分洗浄した後、乾燥
N2による乾燥を施すことが行われている。この後、そ
の半導体基板上に絶縁膜が形成される(Jpn、J、A
ppl。
Conventionally, as a pretreatment for forming an insulating film in the manufacture of this type of device, the semiconductor substrate is mirror-polished, and then the process-affected layer on the surface is removed using a lactic acid-based or bromine-based etching solution. Next, after thoroughly washing with ultrapure water, drying with dry N2 is performed. After that, an insulating film is formed on the semiconductor substrate (Jpn, J, A
ppl.

Phys、Vol、23 (1984) p、L490
)。
Phys, Vol, 23 (1984) p, L490
).

(発明が解決しようとする課題) しかし、単に上述のような乳酸系又は臭素系のエツチン
グ液で表面を溶解し清浄表面を出しても、I nSbの
表面は、疎水性のままであるため、N2乾燥時に、乾燥
ムラができやすい。乾燥ムラがあると絶縁膜中に欠陥を
発生させる原因となる。
(Problem to be Solved by the Invention) However, even if the surface of InSb is simply dissolved with a lactic acid-based or bromine-based etching solution as described above to obtain a clean surface, the surface of InSb remains hydrophobic. Uneven drying tends to occur during N2 drying. Uneven drying causes defects in the insulating film.

このため絶縁膜の抵抗が著しく低下したりする。For this reason, the resistance of the insulating film may drop significantly.

また、絶縁膜と半導体界面での密着性が悪く、その後の
MIS型素子等の作製中に、絶縁膜のはがれが生じるお
それがあり、これと同時に、界面の電気的特性、即ち界
面準位密度も高かった。
In addition, the adhesion between the insulating film and the semiconductor interface is poor, and there is a risk that the insulating film will peel off during the subsequent fabrication of MIS type devices. It was also expensive.

本発明の目的は、InとSbを構成元素とする化合物半
導体上に絶縁膜を堆積して構成されるMIS型素子等に
おいて、上記の問題点を解消し、電気的特性が良好で、
かつ安定な界面特性が得られる半導体上に絶縁膜を形成
する化合物半導体装置の製造方法を提供することにある
An object of the present invention is to solve the above-mentioned problems in a MIS type device, etc., which is constructed by depositing an insulating film on a compound semiconductor containing In and Sb as constituent elements, and to provide good electrical characteristics.
Another object of the present invention is to provide a method for manufacturing a compound semiconductor device in which an insulating film is formed on a semiconductor, which provides stable interface characteristics.

[発明の構成] (課題を解決するための手段) 上記課題を解決するために、第1の発明は、InとSb
を構成元素とする化合物半導体をアンモニア水と過酸化
水素水の混合液で表面処理した後、当該化合物半導体」
二に絶縁膜を堆積することを要旨とする。
[Structure of the Invention] (Means for Solving the Problems) In order to solve the above problems, the first invention provides In and Sb
After surface-treating a compound semiconductor whose constituent elements are aqueous ammonia and hydrogen peroxide, the compound semiconductor is
Second, the main purpose is to deposit an insulating film.

また、第2の発明は、InとSbを構成元素とする化合
物半導体上に絶縁膜を堆積し、次いでこれを100〜2
00℃の温度で熱処理することを要旨とする。
Further, in the second invention, an insulating film is deposited on a compound semiconductor containing In and Sb as constituent elements, and then this is
The gist is that the heat treatment is performed at a temperature of 00°C.

(作用) 本発明によれば、InとSbを構成元素とする化合物半
導体をアンモニア水と過酸化水素水の混合液で表面処理
することにより半導体基板表面が疎水性から親水性に変
化し純水洗浄後の乾燥時に、水を半導体基板から一様に
除去することができて乾燥ムラがなくなる。同時に、ア
ンモニア水と過酸化水素水の混合液処理により半導体表
面の有機汚染物が除去されて清浄な半導体界面の形成が
可能となり、欠陥が少なく密着性が良好で、かつ界面準
位密度が低く安定な界面特性を有する絶縁膜の形成が可
能となる。
(Function) According to the present invention, by surface-treating a compound semiconductor containing In and Sb with a mixture of aqueous ammonia and hydrogen peroxide, the surface of the semiconductor substrate changes from hydrophobic to hydrophilic. During drying after cleaning, water can be uniformly removed from the semiconductor substrate, eliminating uneven drying. At the same time, organic contaminants on the semiconductor surface are removed by treatment with a mixture of ammonia water and hydrogen peroxide water, making it possible to form a clean semiconductor interface with few defects, good adhesion, and low interface state density. It becomes possible to form an insulating film with stable interfacial properties.

また、絶縁膜形成後に、100〜200℃の温度で熱処
理を施すことにより、半導体基板界面の密着性(結合性
)の改善が図られるとともに界面準位密度が一層低くな
り、これにより電気的特性が良好で、かつ−層安定な界
面特性を有する絶縁膜の形成が可能となる。
In addition, by performing heat treatment at a temperature of 100 to 200°C after forming the insulating film, it is possible to improve the adhesion (bonding property) at the interface of the semiconductor substrate and further lower the interface state density, which improves the electrical properties. It becomes possible to form an insulating film having good interfacial properties and stable interfacial properties.

(実施例) 以下、本発明の実施例を図面を参照して説明する。(Example) Embodiments of the present invention will be described below with reference to the drawings.

この実施例は、InSb上にCVDによる5i02から
なる絶縁膜を堆積する場合について説明しである。
This example describes the case where an insulating film made of 5i02 is deposited on InSb by CVD.

InSb表面に界面特性が良好で、安定な5i02膜を
形成するプロセスは、以下の通りである。
The process for forming a stable 5i02 film with good interfacial properties on the InSb surface is as follows.

まず、InSb基板の表面を鏡面研磨し、表面の加工変
質層を乳酸系エツチング液(乳酸:硝酸:弗酸=50:
8:1)で3分間エツチングして取除き、充分に純水で
水洗する。次に、80℃のアンモニア溶液(アンモニア
水:過酸化水素水=1:1の混合液)を用いて30秒か
ら1分間浸けきする。さらに超純水で充分水洗した後、
スピン乾燥させる。その後CVD装置に入れてS i 
02の絶縁膜を約1000人堆積する。絶縁膜形成後、
熱処理炉に移し真空中(10’torr以下)100〜
180℃の温度で熱処理を約12時間行う。熱処理の温
度が200℃を越えると、後述するように界面準位密度
が増して界面の電気的特性が劣化するので、実際の熱処
理温度としては、このように100〜180℃で行うの
がよい。さらに、MIS型素子とする場合は、絶縁膜上
にゲト電極してT i / A uを連続的に真空蒸着
する。
First, the surface of the InSb substrate was mirror-polished, and the damaged layer on the surface was removed using a lactic acid-based etching solution (lactic acid: nitric acid: hydrofluoric acid = 50:
8:1) for 3 minutes and then thoroughly washed with pure water. Next, it is immersed for 30 seconds to 1 minute in an ammonia solution (ammonia water: hydrogen peroxide solution = 1:1 mixture) at 80°C. After rinsing thoroughly with ultrapure water,
Spin dry. After that, put it in a CVD device and Si
About 1000 people deposited the insulating film No. 02. After forming the insulating film,
Transfer to a heat treatment furnace and heat in vacuum (10'torr or less) 100~
Heat treatment is carried out at a temperature of 180° C. for about 12 hours. If the heat treatment temperature exceeds 200°C, the interface state density will increase and the electrical characteristics of the interface will deteriorate, as will be explained later, so the actual heat treatment temperature is preferably 100 to 180°C. . Further, in the case of forming an MIS type element, Ti/Au is continuously vacuum-deposited using a gate electrode on the insulating film.

また、裏面には、オーミック電極としてInTe合金を
真空蒸着する。
Furthermore, an InTe alloy is vacuum-deposited on the back surface as an ohmic electrode.

次に、上述のような方法からなるこの実施例の効果を説
明する。
Next, the effects of this embodiment consisting of the method described above will be explained.

まず第1図には、上述のようにして形成されたMIS型
素子のC−■特性を比較例とともに示す。
First, FIG. 1 shows the C-■ characteristics of the MIS type element formed as described above together with a comparative example.

同図(A)は、この実施例の方法で形成されたMIS型
素子のC−■特性を示しており、ヒステリシスが少なく
安定で、界面準位密度NSSは約6X10” cm−2
eVJと低く界面特性の良好な絶縁膜が得られた。これ
に対し、アンモニア溶液処理の無い従来の方法で形成さ
れた絶縁膜を有するMIS型素子のC−■特性は、同図
(B)に示すように、界面準位密度が2X1012cm
−2eV−’と高く、この実施例のものと比べると界面
特性が悪く、また、絶縁膜表面に欠陥が生じやすく絶縁
膜の抵抗が低い部分が存在した。
Figure (A) shows the C-■ characteristics of the MIS type device formed by the method of this example, which is stable with little hysteresis and has an interface state density NSS of approximately 6X10" cm-2.
An insulating film with low eVJ and good interface properties was obtained. On the other hand, as shown in the same figure (B), the C-■ characteristic of a MIS type element having an insulating film formed by a conventional method without ammonia solution treatment has an interface state density of 2X1012 cm.
-2 eV-', the interface properties were poor compared to those of this example, and there were parts where defects were likely to occur on the surface of the insulating film and the resistance of the insulating film was low.

また、第2図には、鏡面研磨後のエツチング液を、この
実施例のものと異なるエツチング液を用いて形成した比
較例としてのMIS型素子とこの実施例の方法で形成さ
れたMIS型素子との各C■特性を示す。
In addition, FIG. 2 shows an MIS type element as a comparative example in which an etching liquid different from that of this example was used as an etching liquid after mirror polishing, and an MIS type element formed by the method of this example. The characteristics of each C■ are shown below.

第2図(A)は、この実施例の方法で形成されたMIS
型素子のC−■特性を示しており、鏡面研磨後のエツチ
ング液は、乳酸系エツチング液(乳酸:硝酸:弗酸=2
5:4二1)を使用し、このエツチング液によるエツチ
ング後、前記と同様のアンモニア溶液で表面処理を行っ
たものである。第2図(A)の特性から、前記第1図(
A)のものと同様にヒステリシスが少なく安定で界面特
性の良好な絶縁膜が得られた。
FIG. 2(A) shows the MIS formed by the method of this example.
This shows the C-■ characteristics of the type element, and the etching solution after mirror polishing was a lactic acid-based etching solution (lactic acid: nitric acid: hydrofluoric acid = 2
5:421), and after etching with this etching solution, the surface was treated with the same ammonia solution as above. From the characteristics shown in FIG. 2(A), it can be determined from the characteristics shown in FIG.
As with A), an insulating film with little hysteresis, stability, and good interfacial properties was obtained.

これに対し、第2図(B)は、エツチング液として(塩
酸:硝酸=1:1)のものを用いて30秒間エツチング
し、この後、アンモニア溶液処理の無い方法で形成され
た絶縁膜を有するMIS型素子のC−■特性、第2図(
C)は、エツチング液として(0,5%Br−メタノー
ル)を使用し、アンモニア溶液処理の無い方法で形成さ
れた絶縁膜を有するMIS型素子のC−■特性をそれぞ
れ示している。第2図の(B)、(C)のものは、とも
にC−■特性にヒステリシスが生じて界面特性の不安定
な絶縁膜であることを示している。
On the other hand, in FIG. 2(B), the insulating film formed by a method without ammonia solution treatment was etched for 30 seconds using an etching solution (hydrochloric acid: nitric acid = 1:1). Figure 2 shows the C-■ characteristics of the MIS type device with
C) shows the C-■ characteristics of a MIS type element having an insulating film formed using (0.5% Br-methanol) as an etching solution and without ammonia solution treatment. In both (B) and (C) of FIG. 2, hysteresis occurs in the C-■ characteristics, indicating that the insulating films have unstable interface characteristics.

さらに、第3図及び第4図には、熱処理による効果を示
す。まず第3図は、アンモニア溶液処理を施したこの実
施例の方法で形成された絶縁膜と、アンモニア溶液処理
の無い従来の方法で形成された絶縁膜とに同様の熱処理
を施して、それぞれMIS型素子を形成し、その熱処理
時間と界面準位密度との関係を示したものである。同図
中、a特性線はこの実施例のものを示し、b特性線は従
来方法のものを示している。両特性線から従来方法のも
のは熱処理時間とともに界面準位密度は多少低下するが
、この実施例のものよ″り高く、界面特性は大きな改善
はされなかった。
Furthermore, FIGS. 3 and 4 show the effects of heat treatment. First of all, FIG. 3 shows an insulating film formed by the method of this embodiment that was subjected to ammonia solution treatment, and an insulating film formed by the conventional method without ammonia solution treatment, and each was subjected to MIS. This figure shows the relationship between the heat treatment time and the interface state density after forming a type element. In the figure, the characteristic line a shows that of this embodiment, and the characteristic line b shows that of the conventional method. Both characteristic lines show that although the interface state density of the conventional method decreases somewhat with the heat treatment time, it is higher than that of this example, and the interface properties were not significantly improved.

また、第4図は、この実施例の方法において、熱処理温
度に対する界面準位密度の変化を示している。熱処理の
温度が200℃を越えると界面準位密度が増加するとと
もにヒステリシスが大きくなり、界面特性の悪い不安定
な絶縁膜となる。したがって、熱処理の温度は200℃
未満がよい。
Further, FIG. 4 shows the change in the interface state density with respect to the heat treatment temperature in the method of this example. When the heat treatment temperature exceeds 200° C., the interface state density increases and hysteresis increases, resulting in an unstable insulating film with poor interface characteristics. Therefore, the heat treatment temperature is 200℃
Less than is better.

なお、上述の実施例では、形成した絶縁膜をMIS型素
子のゲート絶縁膜として用いる場合について説明したが
、PN接合を用いた光起電力型の赤外検知器の保護膜と
して用いてもきわめて有効である。
In addition, in the above-mentioned example, the case where the formed insulating film is used as a gate insulating film of an MIS type element was explained, but it is extremely suitable for use as a protective film of a photovoltaic type infrared detector using a PN junction. It is valid.

[発明の効果1 以上説明したように、本発明によれば、InとSbを構
成元素とする化合物半導体上への絶縁膜堆積の前処理と
して、アンモニア水と過酸化水素水の混合液による表面
処理を施すようにしたため、半導体表面が疎水性から親
水性に変化し純水洗浄後の乾燥時に水を半導体表面から
一様に除去することができて乾燥ムラがなくなり、これ
と同時に半導体表面の有機汚染物が除去されて清浄な半
導体表面となる。したがって欠陥が少なくて良好な密着
性を有し、かつ界面準位密度が低く電気的特性が良好で
安定した界面特性を有する絶縁膜を形成することができ
る。
[Effect of the Invention 1 As explained above, according to the present invention, as a pretreatment for depositing an insulating film on a compound semiconductor containing In and Sb as constituent elements, the surface is treated with a mixture of aqueous ammonia and hydrogen peroxide. Because of this treatment, the semiconductor surface changes from hydrophobic to hydrophilic, and water can be removed uniformly from the semiconductor surface during drying after washing with pure water, eliminating uneven drying. Organic contaminants are removed, leaving a clean semiconductor surface. Therefore, it is possible to form an insulating film having few defects, good adhesion, low interface state density, good electrical characteristics, and stable interface characteristics.

また、絶縁膜形成後に、100〜200℃の温度で熱処
理を施すことにより、さらに密着性を改善することがで
きるとともに界面準位密度が−層低くなって、−層電気
的特性が良好で安定した界面特性を有する絶縁膜を形成
することができる。
In addition, by performing heat treatment at a temperature of 100 to 200°C after forming the insulating film, it is possible to further improve the adhesion, and the interface state density becomes lower, resulting in good and stable electrical properties of the -layer. An insulating film having suitable interface characteristics can be formed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図ないし第4図は本発明に係る化合物半導体装置の
製造方法の実施例の作用効果を説明するための図で、第
1図はこの実施例で形成した絶縁膜を用いて構成したM
IS型素子のC−■特性を比較例とともに示す特性図、
第2図は鏡面研磨後のエツチング液等の効果を説明する
ためのC−■特性を比較例とともに示す特性図、第3図
は熱処理時間に対する界面準位密度の変化を比較例とと
もに示す特性図、第4図は熱処理温度に対する界面準位
密度の変化を示す特性図である。
1 to 4 are diagrams for explaining the effects of an embodiment of the method for manufacturing a compound semiconductor device according to the present invention, and FIG. 1 shows a M
A characteristic diagram showing the C-■ characteristics of the IS type element along with comparative examples,
Figure 2 is a characteristic diagram showing C-■ characteristics along with a comparative example to explain the effect of etching solution etc. after mirror polishing, and Figure 3 is a characteristic diagram showing changes in interface state density with respect to heat treatment time along with a comparative example. , FIG. 4 is a characteristic diagram showing changes in interface state density with respect to heat treatment temperature.

Claims (2)

【特許請求の範囲】[Claims] (1)InとSbを構成元素とする化合物半導体をアン
モニア水と過酸化水素水の混合液で表面処理した後、当
該化合物半導体上に絶縁膜を堆積することを特徴とする
化合物半導体装置の製造方法。
(1) Manufacture of a compound semiconductor device characterized in that a compound semiconductor whose constituent elements are In and Sb is surface-treated with a mixture of aqueous ammonia and hydrogen peroxide, and then an insulating film is deposited on the compound semiconductor. Method.
(2)InとSbを構成元素とする化合物半導体上に絶
縁膜を堆積し、次いでこれを100〜200℃の温度で
熱処理することを特徴とする化合物半導体装置の製造方
法。
(2) A method for manufacturing a compound semiconductor device, which comprises depositing an insulating film on a compound semiconductor containing In and Sb as constituent elements, and then heat-treating the film at a temperature of 100 to 200°C.
JP14406889A 1989-06-08 1989-06-08 Manufacture of compound semiconductor device Pending JPH0311633A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14406889A JPH0311633A (en) 1989-06-08 1989-06-08 Manufacture of compound semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14406889A JPH0311633A (en) 1989-06-08 1989-06-08 Manufacture of compound semiconductor device

Publications (1)

Publication Number Publication Date
JPH0311633A true JPH0311633A (en) 1991-01-18

Family

ID=15353547

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14406889A Pending JPH0311633A (en) 1989-06-08 1989-06-08 Manufacture of compound semiconductor device

Country Status (1)

Country Link
JP (1) JPH0311633A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5393680A (en) * 1990-08-01 1995-02-28 Sumitomo Electric Industries, Ltd. MIS electrode forming process
JP2008162677A (en) * 2006-12-29 2008-07-17 Nippon Steel Logistics Co Ltd Cylindrical object transporting frame stand

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5393680A (en) * 1990-08-01 1995-02-28 Sumitomo Electric Industries, Ltd. MIS electrode forming process
JP2008162677A (en) * 2006-12-29 2008-07-17 Nippon Steel Logistics Co Ltd Cylindrical object transporting frame stand

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