JPH03115879A - Method and circuit for processing signal of active sonar apparatus - Google Patents

Method and circuit for processing signal of active sonar apparatus

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Publication number
JPH03115879A
JPH03115879A JP25177789A JP25177789A JPH03115879A JP H03115879 A JPH03115879 A JP H03115879A JP 25177789 A JP25177789 A JP 25177789A JP 25177789 A JP25177789 A JP 25177789A JP H03115879 A JPH03115879 A JP H03115879A
Authority
JP
Japan
Prior art keywords
signal
circuit
output
band
maximum value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25177789A
Other languages
Japanese (ja)
Inventor
Toshio Shimizu
清水 外司夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25177789A priority Critical patent/JPH03115879A/en
Publication of JPH03115879A publication Critical patent/JPH03115879A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To discriminate a Doppler frequency by converting a detection signal into a pulse of a one-bit signal of 1 or 0 by comparing the level of the detection signal with a prescribed level, and by verifying the sequence of a pulse train. CONSTITUTION:Each of signal detecting circuits 5-1 to 5-3 verifies whether outputs of successive band-pass filter are LFM reception signals, from a signal train inputted thereto, and outputs a maximum value when the list of the input signal train is complete and in conformity with the sequence, while outputting a minimum value when the signal train is random. For instance, '3' is outputted when all of the input trains are '1', while '1.5' is outputted when two out of the input trains are '1', and '0' is outputted when they are in other order than the foregoing. An output of the signal detecting circuit 5-1 is sent to a maximum value detecting circuit 8 via delay circuits 7-1 and 7-2, while an output of the signal detecting circuit 5-2 is sent thereto via a delay circuit 7-3, and an output of the signal detecting circuit 5-3 is sent thereto directly. The maximum value detecting circuit 8 extracts the system of the signal detecting circuit showing the maximum value of the outputs of the signal detecting circuits and outputs a Doppler frequency.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、アクティブソーナー装置の受信信号処理に関
し、特に、LFM(直線周波数変調波)信号の受信信号
処理で、ドツプラーの有無を検出する受信信号処理回路
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to reception signal processing of an active sonar device, and in particular to reception signal processing for detecting the presence or absence of Doppler in reception signal processing of LFM (Linear Frequency Modulated Wave) signals. Related to signal processing circuits.

〔従来の技術〕[Conventional technology]

従来、この種のアクティブソーナー装置では、目標のド
ツプラーを検出するために、PCW(Pulsed c
ontinuous wave)信号を用いていた。
Conventionally, this type of active sonar device uses PCW (Pulsed CCW) to detect target Doppler.
continuous wave) signals were used.

第5図は、ドツプラー効果を示す図で、アクティブソー
ナー装置が速度v1で発射体が速度v2で一直線上を動
くとき、送信周波数FHzと受信周波数F’ Hzとの
関係は次式で表される。
Figure 5 is a diagram showing the Doppler effect. When the active sonar device moves in a straight line at a speed v1 and a projectile moves at a speed v2, the relationship between the transmission frequency FHz and the reception frequency F' Hz is expressed by the following equation. .

ただし、Cは波の位相速度、Rnはアクティブソーナー
装置と発射体の相対速度である。
where C is the phase velocity of the wave and Rn is the relative velocity of the active sonar device and the projectile.

従来のPCW信号による受信回路では、信号の処理によ
って大きな利得を得ることが困難となり、それに代るも
のとして周波数変調されたLFM信号等による相互相関
受信方式による受信信号処理方式がある。この場合、L
FM信号のみではドツプラー検出が困難となるので、P
CW信号も併せて使用していた。
In conventional receiving circuits using PCW signals, it is difficult to obtain a large gain through signal processing, and as an alternative, there is a received signal processing method using a cross-correlation receiving method using frequency-modulated LFM signals or the like. In this case, L
Doppler detection is difficult with only FM signals, so P
CW signals were also used.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のアクティブソーナーの受信回路では、L
FM信号処理用の受信回路と、PCW信号処理用の受信
回路の2つを用意することによって、信号検出をLFM
信号で、ドツプラー検出をPCW信号で行っていた。こ
のPCW信号とLFM信号を同時に使用する場合は、相
互の干渉を防止するためにそれら信号間の周波数を離し
、受信の帯域及び送信の帯域を広げる必要がある。また
受信回路も、LFM信号とPCW信号を同時に処理する
ために、回路規模も大きくなるという欠点がある。
In the conventional active sonar receiving circuit described above, L
By preparing two receiving circuits, one for FM signal processing and the other for PCW signal processing, signal detection can be performed using LFM.
Doppler detection was performed using PCW signals. When using the PCW signal and the LFM signal at the same time, it is necessary to separate the frequencies of these signals to prevent mutual interference and widen the reception band and transmission band. Furthermore, since the receiving circuit simultaneously processes the LFM signal and the PCW signal, there is a drawback that the circuit size becomes large.

本発明の目的は、上述のような欠点を解消したアクティ
ブソーナー装置の信号処理方法及び回路を提供すること
にある。
An object of the present invention is to provide a signal processing method and circuit for an active sonar device that eliminates the above-mentioned drawbacks.

〔課題を解決するための手段] 本発明のアクティブソーナー装置の信号処理方法は、 入力信号のうちLFM受信帯域を複数に分割し、分割さ
れた各帯域の信号成分を検波し、検波信号のレベルを所
定レベルと比較して、1または0の1ビット信号のパル
スに変換し、そのパルス列の順序を検証してドツプラー
を判別することを特徴としている。
[Means for Solving the Problems] A signal processing method for an active sonar device according to the present invention divides the LFM reception band of the input signal into a plurality of parts, detects the signal components of each divided band, and determines the level of the detected signal. is compared with a predetermined level, converted into a 1-bit signal pulse of 1 or 0, and the order of the pulse train is verified to determine Doppler.

また、本発明のアクティブソーナー装置の信号処理回路
は、 入力信号のうちLFM受信帯域を複数に分割する信号用
帯域フィルターと、 各信号用帯域フィルターの出力を検波する検波回路と、 入力信号の両端周波数の2つの帯域フィルターと、 この2つの帯域フィルター出力の平均を求める平均値回
路と、 平均値回路出力と各検波回路出力とを比較し、決められ
たレベル以上の入力時に信号出力する比較回路と、 比較回路出力を遅延する第1の遅延回路と、比較回路出
力及び第1の遅延回路出力のパルス列が順序よく出力さ
れるかを検出する信号検出回路と、 信号検出回路出力を遅延する第2の遅延回路と、第2の
遅延回路出力のうち最大値を検出し、最大値とその帯域
を検出する最大値検出回路とを有することを特徴として
いる。
Further, the signal processing circuit of the active sonar device of the present invention includes: a signal band filter that divides the LFM reception band of the input signal into a plurality of parts; a detection circuit that detects the output of each signal band filter; and both ends of the input signal. Two frequency band filters, an average value circuit that calculates the average of the outputs of these two band filters, and a comparison circuit that compares the average value circuit output with each detection circuit output and outputs a signal when the input exceeds a predetermined level. a first delay circuit that delays the output of the comparison circuit; a signal detection circuit that detects whether the pulse trains of the output of the comparison circuit and the output of the first delay circuit are output in order; and a second delay circuit that delays the output of the signal detection circuit. The second delay circuit is characterized by comprising a delay circuit, and a maximum value detection circuit that detects the maximum value of the output of the second delay circuit and detects the maximum value and its band.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は、本発明の信号処理回路の一実施例を示す図で
ある。このアクティブソーナー装置の信号処理回路は、
入力信号のうちLFM受信帯域を複数に分割する、すな
わちLFM受信信号を狭帯域に分割する信号用帯域フィ
ルター(F6)1−1゜(F5)I−2,(F4)I−
3,(F3)l−4,(F2)1−5と、これら各帯域
フィルターの出力を検波する検波回路(DT) 2−1
.2−2.2−3.2−4.2〜5と、入力信号の両端
周波数のレベル、すなわちLFM受信帯域外のレベルを
検出する2つの帯域フィルター(F 1 ) 1−6.
 (F 7 ) 1−7と、この2つの帯域フィルター
の出力の平均を求める平均値回路(AVG)6と、検波
回路出力と平均値回路出力を比較して、決められたレベ
ルより大きい信号のみを抽出し1ビット信号に変換する
、すなわち決められたレベル以上の入力時に信号出力す
る比較回路(C) 3−1. 3−2.3−3.3−4
.3−5と、比較回路3−2〜3−5の出力を各帯域フ
ィルターに応じたパルス幅を遅延する遅延回路(D) 
4−1.4−2.4−4−4.4−5.4−6.4−7
と、比較回路出力及び遅延回路出力のパルス列が順序よ
く出力されるかを検出する信号検出回路(S l ) 
5−L (S 2 ) 5−2. (S3 ) 5−3
と、信号検出回路5−1.5−2の出力を遅延する遅延
回路(D)7−1. 7〜2.7−3と、遅延回路7−
2.7−3及び信号検出回路5−3の出力のうち最大値
を検出し、最大値とその帯域を検出する、すなわち最大
値を持つ系統を検出する最大値検出回路(PD)8とを
有している。
FIG. 1 is a diagram showing an embodiment of a signal processing circuit of the present invention. The signal processing circuit of this active sonar device is
Signal band filter (F6) 1-1° (F5) I-2, (F4) I- that divides the LFM reception band of the input signal into a plurality of parts, that is, divides the LFM reception signal into narrow bands.
3, (F3) l-4, (F2) 1-5, and a detection circuit (DT) 2-1 that detects the output of each of these band filters.
.. 2-2.2-3.2-4.2 to 5, and two bandpass filters (F 1 ) for detecting the levels of both end frequencies of the input signal, that is, the levels outside the LFM reception band 1-6.
(F7) 1-7, an average value circuit (AVG) 6 that calculates the average of the outputs of these two bandpass filters, and compares the output of the detection circuit and the output of the average value circuit, and detects only signals larger than a predetermined level. Comparison circuit (C) that extracts and converts it into a 1-bit signal, that is, outputs a signal when the input is at a predetermined level or higher 3-1. 3-2.3-3.3-4
.. 3-5, and a delay circuit (D) that delays the output of the comparison circuits 3-2 to 3-5 by the pulse width according to each band filter.
4-1.4-2.4-4-4.4-5.4-6.4-7
and a signal detection circuit (S l ) that detects whether the pulse trains of the comparator circuit output and the delay circuit output are output in order.
5-L (S2) 5-2. (S3) 5-3
and a delay circuit (D) 7-1. which delays the output of the signal detection circuit 5-1.5-2. 7-2.7-3 and delay circuit 7-
2.7-3 and a maximum value detection circuit (PD) 8 that detects the maximum value among the outputs of the signal detection circuit 5-3 and detects the maximum value and its band, that is, detects the system having the maximum value. have.

次に、本実施例の動作を説明する。Next, the operation of this embodiment will be explained.

帯域フィルター1−1〜15は受信信号のうちLFM受
信信号を分割し、LFM受信信号帯域外の帯域フィルタ
ー1−6.1−7は受信信号の雑音レベルを検出する。
The bandpass filters 1-1 to 15 divide the LFM reception signal among the reception signals, and the bandpass filters 1-6.1-7 outside the LFM reception signal band detect the noise level of the reception signal.

第2図は、この実施例に使用する帯域フィルターの分割
を示す図で、f、、f、、f、。
FIG. 2 is a diagram showing the division of the bandpass filter used in this example, f,,f,,f,.

f、、f、を中心周波数に持つ帯域が分割されたLFM
受信信号帯域であり、fi とf?を中心周波数に持つ
帯域が雑音検出用である。第3図は、受信信号がドツプ
ラーを受けた場合の周波数成分を示し、(a)がドツプ
ラー“低”、(b)がドツプラー“無し”  (c)が
ドツプラー“′高”を示している。
LFM with divided bands having center frequency f,,f,
is the received signal band, fi and f? The band with the center frequency is for noise detection. FIG. 3 shows the frequency components when the received signal receives Doppler, and (a) shows Doppler "low," (b) shows Doppler "no," and (c) shows Doppler "'high."

検波回路2−1〜2−5は、帯域フィルター1−1〜1
−5の出力を検波し、直流に変換し、比較回路3−1〜
3−5に出力する。一方、平均値回路6は、帯域フィル
ターI−6,1−7の出力の平均レベルを求め、比較回
路の参照信号として出力する。
The detection circuits 2-1 to 2-5 are bandpass filters 1-1 to 1.
-5 output is detected, converted to DC, and comparison circuit 3-1~
Output to 3-5. On the other hand, the average value circuit 6 calculates the average level of the outputs of the bandpass filters I-6 and 1-7, and outputs it as a reference signal for the comparison circuit.

比較回路では、各検波回路出力のレベルと参照信号のレ
ベルとを比較し、参照信号より大きな検波出力信号の場
合、出力に“信号有り′”を出力する。すなわち、参照
信号のレベルより大きい信号のみを抽出し、1ビット信
号に変換して出力する。
The comparison circuit compares the level of each detection circuit output with the level of the reference signal, and outputs "signal present" if the detection output signal is larger than the reference signal. That is, only the signals that are higher than the level of the reference signal are extracted, converted into 1-bit signals, and output.

各遅延回路4−1〜4−7は、帯域フィルターの帯域幅
に相当する時間(通常、帯域幅の逆数)だけ比較回路出
力信号を遅延する。すなわち、遅延回路4−1は比較回
路3−2の出力信号を遅延し、遅延回路4−2.4−3
は比較回路3−3の出力信号を遅延し、遅延回路4−4
.4−5は比較回路3−4の出力信号を遅延し、遅延回
路4−6.4−7は比較回路3−5の出力信号を遅延す
る。
Each of the delay circuits 4-1 to 4-7 delays the comparison circuit output signal by a time corresponding to the bandwidth of the bandpass filter (usually, the reciprocal of the bandwidth). That is, the delay circuit 4-1 delays the output signal of the comparison circuit 3-2, and the delay circuit 4-2.4-3
delays the output signal of the comparison circuit 3-3, and the delay circuit 4-4
.. 4-5 delays the output signal of the comparison circuit 3-4, and delay circuits 4-6, 4-7 delay the output signal of the comparison circuit 3-5.

比較回路3−1の出力信号と遅延回路4−1の出力信号
と遅延回路4−3の出力信号とが信号検出回路5−1に
送られ、比較回路3−2の出力信号と遅延回路4−2の
出力信号と遅延回路4−5の出力信号とが信号検出回路
5−2に送られ、比較回路3−3の出力信号と遅延回路
4−4の出力信号と遅延回路4−7の出力信号とが信号
検出回路5−3に送られる。
The output signal of the comparison circuit 3-1, the output signal of the delay circuit 4-1, and the output signal of the delay circuit 4-3 are sent to the signal detection circuit 5-1. The output signal of the comparator circuit 3-3, the output signal of the delay circuit 4-4, and the output signal of the delay circuit 4-7 are sent to the signal detection circuit 5-2. The output signal is sent to the signal detection circuit 5-3.

各信号検出回路は、入力される信号列から、連続した帯
域フィルターの出力がLFM受信信号かどうかを検証す
る。人力信号列の並びが完全に順序通りであれば最大値
を、信号列がランダムであれば最小値を出力する。この
実施例の場合では、3つの入力列を比較している。例え
ば、入力列が全て1″なら“3″、2つの入力列が“1
″なら”1.5”、それ以外は“0゛のように出力する
Each signal detection circuit verifies whether the outputs of successive bandpass filters are LFM received signals from the input signal sequence. If the human input signal sequence is completely in order, the maximum value is output, and if the signal sequence is random, the minimum value is output. In this example, three input strings are compared. For example, if the input strings are all 1'', it will be ``3'', and if two input strings are ``1'', it will be ``3''.
”, outputs “1.5”, otherwise outputs “0”.

信号検出回路5−1の出力は遅延回路7−1.7−2を
経て、信号検出回路5−2の出力は遅延回路7−3を経
て、信号検出回路5−3の出力は直接に、それぞれ最大
値検出回路8に送られる。
The output of the signal detection circuit 5-1 passes through delay circuits 7-1 and 7-2, the output of the signal detection circuit 5-2 passes through the delay circuit 7-3, and the output of the signal detection circuit 5-3 directly passes through the delay circuits 7-1 and 7-2. Each is sent to the maximum value detection circuit 8.

最大値検出回路8は、信号検出回路の出力のうち最大値
を示す信号検出回路の系統を抽出し、ドツプラー出力と
する。この例では、3つの信号検出回路のドツプラー出
力は、ドツプラー出力低”ドツプラー“無し”及びドツ
プラー高”である。
The maximum value detection circuit 8 extracts the signal detection circuit system showing the maximum value from among the outputs of the signal detection circuits, and outputs it as a Doppler output. In this example, the Doppler outputs of the three signal detection circuits are Doppler Output Low, Doppler No Doppler, and Doppler High.

また、検出された最大値も振幅出力として同時に出力す
る。この振幅値は、表示器上に映像信号として使用され
る。
Furthermore, the detected maximum value is also simultaneously output as an amplitude output. This amplitude value is used as a video signal on the display.

一例として、第4図に各部の信号波形を示す。As an example, FIG. 4 shows signal waveforms at various parts.

第4図の(a)は、入力信号の周波数スペクトルの例を
示したものであり、この例ではドツプラーが無い場合を
示している。(b)は、各帯域フィルターF1〜F7の
出力レベルと、出力される時間を示しており、この例で
は、F3.F4.F5の順に信号が出力されていること
を示す、(C)は、信号検出回路Sl、52.33の出
力レベルの時間経過を示し、回路S2の出力が最大値を
有することを示している。(d)は、最大値回路PDの
入力の時間関係を示している。
FIG. 4(a) shows an example of the frequency spectrum of the input signal, and this example shows the case where there is no Doppler. (b) shows the output level and output time of each band filter F1 to F7, and in this example, F3. F4. (C), which shows that the signals are output in the order of F5, shows the time course of the output level of the signal detection circuit Sl, 52.33, and shows that the output of the circuit S2 has the maximum value. (d) shows the time relationship of the inputs of the maximum value circuit PD.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、LFM信号処理において
、LFM受信帯域外の2つの帯域フィルターの出力によ
って、LFM受信帯域内の帯域フィルターの出力を1と
Oの1ビツトの信号に変換し、更に、そのパルス列の順
序を検証するという簡単な方法及び回路構成により、L
FM受信時でも、ドツプラーを判別することが可能とな
り、送信にPCW信号を使用することが必要でな(なる
As explained above, in LFM signal processing, the present invention converts the output of a band filter within the LFM reception band into a 1-bit signal of 1 and O by the outputs of two band filters outside the LFM reception band, and further , by a simple method and circuit configuration of verifying the order of the pulse train.
Even when receiving FM, it becomes possible to distinguish Doppler, eliminating the need to use PCW signals for transmission.

また、PCW送信を行わないことによって、送信及び受
信の帯域を狭めることができるほか、PCW送信による
無駄な時間及び送信電力を低減できる効果がある。
Furthermore, by not performing PCW transmission, it is possible to narrow the transmission and reception bands, and also to reduce wasted time and transmission power due to PCW transmission.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の信号処理回路の一実施例を示す図、 第2図は、フィルター回路の周波数分割を示す図、 第3図は、人力信号のドツプラーの有無による周波数成
分を示す図、 第4図は、第1図の各部の波形を示す図、第5図は、ド
ツプラー効果を示す図である。 l・・・・・帯域フィルター回路 2・・・・・検波回路 3・・・・・比較回路 4.7・・・遅延回路 5・・・・・信号検出回路 6・・・・・平均値回路 8・・・・・最大値検出回路
Fig. 1 is a diagram showing an embodiment of the signal processing circuit of the present invention, Fig. 2 is a diagram showing frequency division of a filter circuit, and Fig. 3 is a diagram showing frequency components of a human signal with and without Doppler. , FIG. 4 is a diagram showing the waveforms of each part in FIG. 1, and FIG. 5 is a diagram showing the Doppler effect. l...Band filter circuit 2...Detection circuit 3...Comparison circuit 4.7...Delay circuit 5...Signal detection circuit 6...Average value Circuit 8...Maximum value detection circuit

Claims (2)

【特許請求の範囲】[Claims] (1)入力信号のうちLFM受信帯域を複数に分割し、
分割された各帯域の信号成分を検波し、検波信号のレベ
ルを所定レベルと比較して、1または0の1ビット信号
のパルスに変換し、そのパルス列の順序を検証してドッ
プラーを判別することを特徴とするアクティブソーナー
装置の信号処理方法。
(1) Divide the LFM reception band of the input signal into multiple parts,
Detecting the signal components of each divided band, comparing the level of the detected signal with a predetermined level, converting it into a 1-bit signal pulse of 1 or 0, and determining the Doppler by verifying the order of the pulse train. A signal processing method for an active sonar device characterized by:
(2)入力信号のうちLFM受信帯域を複数に分割する
信号用帯域フィルターと、 各信号用帯域フィルターの出力を検波する検波回路と、 入力信号の両端周波数の2つの帯域フィルターと、 この2つの帯域フィルター出力の平均を求める平均値回
路と、 平均値回路出力と各検波回路出力とを比較し、決められ
たレベル以上の入力時に信号出力する比較回路と、 比較回路出力を遅延する第1の遅延回路と、比較回路出
力及び第1の遅延回路出力のパルス列が順序よく出力さ
れるかを検出する信号検出回路と、 信号検出回路出力を遅延する第2の遅延回路と、第2の
遅延回路出力のうち最大値を検出し、最大値とその帯域
を検出する最大値検出回路とを有することを特徴とする
アクティブソーナー装置の信号処理回路。
(2) A signal band filter that divides the LFM reception band of the input signal into multiple parts, a detection circuit that detects the output of each signal band filter, two band filters at both end frequencies of the input signal, and these two band filters. An average value circuit that calculates the average of the bandpass filter output, a comparison circuit that compares the average value circuit output with each detection circuit output and outputs a signal when the input is above a determined level, and a first comparison circuit that delays the output of the comparison circuit. a delay circuit; a signal detection circuit that detects whether the pulse trains of the comparator circuit output and the first delay circuit output are output in order; a second delay circuit that delays the signal detection circuit output; and a second delay circuit output. 1. A signal processing circuit for an active sonar device, comprising a maximum value detection circuit that detects a maximum value among the maximum values and detects the maximum value and its band.
JP25177789A 1989-09-29 1989-09-29 Method and circuit for processing signal of active sonar apparatus Pending JPH03115879A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25177789A JPH03115879A (en) 1989-09-29 1989-09-29 Method and circuit for processing signal of active sonar apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25177789A JPH03115879A (en) 1989-09-29 1989-09-29 Method and circuit for processing signal of active sonar apparatus

Publications (1)

Publication Number Publication Date
JPH03115879A true JPH03115879A (en) 1991-05-16

Family

ID=17227770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25177789A Pending JPH03115879A (en) 1989-09-29 1989-09-29 Method and circuit for processing signal of active sonar apparatus

Country Status (1)

Country Link
JP (1) JPH03115879A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008216005A (en) * 2007-03-02 2008-09-18 Nec Corp Active sonar device
JP2008232861A (en) * 2007-03-20 2008-10-02 Nec Corp Active sonar system, reception signal processing method for sonar, and signal processing program therefor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008216005A (en) * 2007-03-02 2008-09-18 Nec Corp Active sonar device
JP2008232861A (en) * 2007-03-20 2008-10-02 Nec Corp Active sonar system, reception signal processing method for sonar, and signal processing program therefor

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