JPH03113906A - Automatic matching device - Google Patents

Automatic matching device

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Publication number
JPH03113906A
JPH03113906A JP25139189A JP25139189A JPH03113906A JP H03113906 A JPH03113906 A JP H03113906A JP 25139189 A JP25139189 A JP 25139189A JP 25139189 A JP25139189 A JP 25139189A JP H03113906 A JPH03113906 A JP H03113906A
Authority
JP
Japan
Prior art keywords
matching
phase
circuit
capacitance
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25139189A
Other languages
Japanese (ja)
Inventor
Junichiro Ozaki
純一郎 小崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shimadzu Corp
Original Assignee
Shimadzu Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shimadzu Corp filed Critical Shimadzu Corp
Priority to JP25139189A priority Critical patent/JPH03113906A/en
Publication of JPH03113906A publication Critical patent/JPH03113906A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To take the matching surely and automatically even when the capacitance of a matching element is any capacitance in the variable range by detecting a difference between a phase of a current flowing to a matching element in series with a load and a phase of a voltage at the entrance of the load so as to adjust the matching element of the matching circuit accordingly. CONSTITUTION:A current sensing element 4c is provided to a point N in a matching circuit 3 and a phase difference detector 5c detecting a difference between a phase of a current flowing to the point N and a phase of a voltage at the entrance of the matching circuit 3 is provided. The phase difference detector 5c detects a phase theta2 of the impedance at the point N in the matching circuit 3 based on a detection signal of the current sensor 4c and a detection signal of the voltage detection element 4b and gives the result to a control circuit 6. The control circuit 6 increases the capacitance of a variable capacitor 3b via a drive circuit 7b when, the phase theta2 is smaller than a reference value theta2. Thus, even when the capacitance of the matching elements 3a, 3b is not set near the matching point in advance, the matching is automatically taken.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、自動整合装置、特に、高周波励振型プラズマ
CVD装置に高周波電源からの電力を確実に供給するた
めの自動整合装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an automatic matching device, and particularly to an automatic matching device for reliably supplying power from a high-frequency power source to a high-frequency excitation type plasma CVD apparatus.

[従来技術] プラズマCVD装置は、チャンバ内にそれぞれ配設した
高周波電極と基板ホルダとから成る電極対に高周波電力
を供給するとともに、生成ガスをチャンバ内に導入する
ことにより、電極対の間隙にプラズマ放電を生じせしめ
て、基板ホルダに載置しである基板に薄膜を形成する装
置である。
[Prior Art] A plasma CVD apparatus supplies high-frequency power to electrode pairs consisting of a high-frequency electrode and a substrate holder, each arranged in a chamber, and also introduces generated gas into the chamber to fill the gap between the electrode pairs. This is an apparatus that generates plasma discharge to form a thin film on a substrate placed on a substrate holder.

このプラズマCVD装置に高周波電源より出力される電
力を確実に供給するため、従来第5図の自動整合装置を
使用している。
In order to reliably supply power output from a high frequency power source to this plasma CVD apparatus, an automatic matching device shown in FIG. 5 has been conventionally used.

第5図において、高周波電源2がらの出力電力は整合回
g3を介してプラズマ発生装置1に入力される。一方、
整合回路3の入り口における電流、電圧が電流検出素子
4a、電圧検出素子4bにより検出され、位相差検出器
5aとインピーダンス検出器5bに入力される。そして
、位相差検出器5aとインピーダンス検出器5bの出力
が制御回路6に入力され、制御回路6により駆動回路7
a、7bを介して整合回路3の可変コンデンサ3a、3
bが制御される。
In FIG. 5, the output power from the high frequency power source 2 is input to the plasma generator 1 via a matching circuit g3. on the other hand,
The current and voltage at the entrance of the matching circuit 3 are detected by a current detection element 4a and a voltage detection element 4b, and are input to a phase difference detector 5a and an impedance detector 5b. Then, the outputs of the phase difference detector 5a and the impedance detector 5b are inputted to the control circuit 6, which controls the drive circuit 7.
variable capacitors 3a, 3 of the matching circuit 3 via a, 7b
b is controlled.

この自動整合装置の動作を第6図のフローチャートと第
7図の判別領域を表す図により説明すると、電流検出素
子4a、電圧検出素子4bにより検出された、整合回路
3の入り口における電流と電圧が位相差検出器5aとイ
ンピーダンス検出器5bとに入力され、整合回路3の入
り口から負荷側を見た場合のインピーダンスの位相θ1
及びインピーダンスの絶対値Z1が検出される。検出さ
れた位相θ、及び絶対値Z1が制御回路6に入力され、
自動整合が開始される。制御回路6は位相0□の絶対値
1θ11が基準値Δθ1より小さいとき、可変コンデン
サ3bの容量を変更しない。
The operation of this automatic matching device will be explained with reference to the flowchart in FIG. 6 and the diagram showing the discrimination area in FIG. The phase θ1 of the impedance is input to the phase difference detector 5a and the impedance detector 5b, when looking at the load side from the entrance of the matching circuit 3.
and the absolute value Z1 of impedance is detected. The detected phase θ and absolute value Z1 are input to the control circuit 6,
Automatic alignment is started. The control circuit 6 does not change the capacitance of the variable capacitor 3b when the absolute value 1θ11 of the phase 0□ is smaller than the reference value Δθ1.

位相θ1の絶対値1θ、1が基準値Δ01より大きく、
位相θ1が負の時、制御回路6は駆動回路7bを介して
可変コンデンサ3bの容量を小さくする。また、絶対値
10エ 1が基準値Δ0工より大きく、位相0□が正の
時、制御回路6は駆動回路7bを介して可変コンデンサ
3bの容量を大きくする。
The absolute value 1θ, 1 of the phase θ1 is greater than the reference value Δ01,
When the phase θ1 is negative, the control circuit 6 reduces the capacitance of the variable capacitor 3b via the drive circuit 7b. Further, when the absolute value 10E1 is larger than the reference value Δ0E and the phase 0□ is positive, the control circuit 6 increases the capacitance of the variable capacitor 3b via the drive circuit 7b.

一方、インピーダンス検出器5bにより検出されたイン
ピーダンスの絶対値2□と設定インピーダンス50Ωと
の差の絶対値IZI  501が基準値ΔZ工より小さ
いとき、制御回路6は可変コンデンサ3aの容量を変更
しない。IZエニー01が基準値Δ2□より大きく、Z
□−50が負の時、TjIJ御回路6は駆動回路7aを
介して可変コンデンサ3aの容量を小さくする。また、
IZl−501が基準値ΔZ□より大きく、Z□−50
が正の時、制御回路6は駆動回路7aを介して可変コン
デンサ3aの容量を大きくする。これにより、高周波電
源2の出力インピーダンスが50Ωの場合、θ、=0、
Z、=50Ωになるように制御される。
On the other hand, when the absolute value IZI 501 of the difference between the absolute value 2□ of the impedance detected by the impedance detector 5b and the set impedance 50Ω is smaller than the reference value ΔZ, the control circuit 6 does not change the capacitance of the variable capacitor 3a. IZ Any01 is greater than the reference value Δ2□, and Z
When □-50 is negative, the TjIJ control circuit 6 reduces the capacitance of the variable capacitor 3a via the drive circuit 7a. Also,
IZl-501 is greater than the reference value ΔZ□, Z□-50
When is positive, the control circuit 6 increases the capacitance of the variable capacitor 3a via the drive circuit 7a. As a result, when the output impedance of the high frequency power supply 2 is 50Ω, θ,=0,
It is controlled so that Z=50Ω.

ここで、基準値Δθ0、Δz1を零でない値としたのは
、制御時のハンチングを防止するための不感帯を設ける
ためである。
Here, the reason why the reference values Δθ0 and Δz1 are set to non-zero values is to provide a dead zone to prevent hunting during control.

[発明が解決しようとする課i] 従来の自動整合装置においては、整合回路3の構成上、
例えば、可変コンデンサ3aの容量を成る値に固定し、
可変コンデンサ3bの容量を変化させた時、プラズマC
VD装置等の低インピーダンス負荷(数Ω程度)の場合
、インピーダンスの位相θ□は第8図に示すように0°
になる点がA、Bの二点存在する。このとき、A点は整
合状態と関係のない共振点であり、B点は整合状態と関
係ある共振点である。このため、可変コンデンサ3bの
容量がA点(共振点)付近にある場合には、第6図のフ
ローチャートに基ずいて整合を取ることは不可能であり
、可変コンデンサ3a、3bの容量をあらかじめ整合点
付近(第8図におけるB点付近)に設定しなければ、自
動的に整合を取ることができなかった。
[Problem i to be solved by the invention] In the conventional automatic matching device, due to the configuration of the matching circuit 3,
For example, the capacitance of the variable capacitor 3a is fixed to a value of
When the capacitance of the variable capacitor 3b is changed, the plasma C
In the case of a low impedance load (about several Ω) such as a VD device, the impedance phase θ□ is 0° as shown in Figure 8.
There are two points, A and B, where At this time, point A is a resonance point that is unrelated to the matching state, and point B is a resonance point that is related to the matching state. Therefore, if the capacitance of the variable capacitor 3b is near point A (resonance point), it is impossible to achieve matching based on the flowchart in FIG. Unless it was set near the matching point (near point B in FIG. 8), matching could not be achieved automatically.

本発明は、上記のような従来技術の欠点を解消するため
に創案されたものであり、整合素子の容量が可変範囲内
のいかなる値にあっても確実、かつ、自動的に整合を取
ることができる自動整合装置を提供することを目的とす
る。
The present invention was devised to eliminate the above-mentioned drawbacks of the prior art, and is capable of reliably and automatically matching the capacitance of the matching element at any value within the variable range. The purpose is to provide an automatic alignment device that can perform

[課題を解決するための手段] 上記目的を達成するために、本発明における自動整合装
置は、従来の自動整合装置に加えて、負荷に直列な整合
素子に流れる電流を検出する電流検出素子と、この電流
検出素子の検出信号と整合回路の入り口における電圧と
の位相差を検出する位相差検出器とを有し、この位相差
検出器の出力を制御回路に入力する。
[Means for Solving the Problems] In order to achieve the above object, an automatic matching device according to the present invention includes, in addition to a conventional automatic matching device, a current detection element that detects a current flowing through a matching element in series with a load. , and a phase difference detector that detects the phase difference between the detection signal of the current detection element and the voltage at the entrance of the matching circuit, and the output of this phase difference detector is input to the control circuit.

[作用] 上記のように構成された自動整合装置は、負荷に直列な
整合素子に流れる電流と負荷の入り口における電圧の位
相差を検出することにより、負荷の入り口におけるイン
ピーダンスの位相が00付近になったとき、整合状態と
関係のない共振点か整合状態と関係のある共振点かを判
別し、それに応じて整合回路の整合素子の調整を行う。
[Operation] The automatic matching device configured as described above detects the phase difference between the current flowing through the matching element in series with the load and the voltage at the input of the load, so that the phase of the impedance at the input of the load becomes near 00. When this happens, it is determined whether the resonance point is unrelated to the matching state or the resonance point is related to the matching state, and the matching elements of the matching circuit are adjusted accordingly.

[実施例] 実施例について第1図を参照して説明する。この実施例
は、第5図の自動整合装置に更に整合回路3内のN点に
電流検出素子4cを設けるとともに、N点に流れる電流
と整合回路3の入り口における電圧との位相差を検出す
る位相差検出器5cを設けたものである。
[Example] An example will be described with reference to FIG. In this embodiment, the automatic matching device shown in FIG. 5 is further provided with a current detection element 4c at the N point in the matching circuit 3, and the phase difference between the current flowing at the N point and the voltage at the entrance of the matching circuit 3 is detected. A phase difference detector 5c is provided.

この自動整合装置の動作を第2図のフローチャートと第
3図の判別領域を表す図により説明すると、位相差検出
器5a、インピーダンス検出器5bは第5図と同様に整
合回路3の入り口から負荷側を見た場合のインピーダン
スの位相θ□及びインピーダンスの絶対値Z工を検出し
、制御回路6に入力する。一方、位相差検出器5cは電
流検出素子4cの検出信号及び電圧検出素子4bの検出
信号より、整合回路3内のN点におけるインピーダンス
の位相θ2を検出し、制御回路6に入力する。制御回路
6は、位相θ2が基準値Δθ2より小さいとき、駆動回
路7bを介して可変コンデンサ3bの容量を大きくする
。位相θ2が八〇2より大きく、位相0□の絶対値1θ
□ が基準値へ〇□より小さいとき、制御回路6は可変
コンデンサ3bの容量を変えない。また、位相θ2がΔ
θ2より大きく、位相θ□の絶対値]θ□ 1がΔθ1
より大きいとき、位相θ□が負であれば、制御回路6は
駆動回路7bを介して可変コンデンサ3bの容量を小さ
くし、位相θ□が正であれば、可変コンデンサ3bの容
量を大きくする。
The operation of this automatic matching device will be explained with reference to the flowchart in FIG. 2 and the diagram showing the discrimination area in FIG. 3. As in FIG. The impedance phase θ□ and the impedance absolute value Z when looking at the side are detected and input to the control circuit 6. On the other hand, the phase difference detector 5c detects the phase θ2 of the impedance at the N point in the matching circuit 3 from the detection signal of the current detection element 4c and the detection signal of the voltage detection element 4b, and inputs it to the control circuit 6. The control circuit 6 increases the capacitance of the variable capacitor 3b via the drive circuit 7b when the phase θ2 is smaller than the reference value Δθ2. Phase θ2 is greater than 802, absolute value 1θ of phase 0□
When □ is smaller than the reference value 〇□, the control circuit 6 does not change the capacitance of the variable capacitor 3b. Also, the phase θ2 is Δ
Greater than θ2, absolute value of phase θ□] θ□ 1 is Δθ1
If the phase θ□ is negative, the control circuit 6 reduces the capacitance of the variable capacitor 3b via the drive circuit 7b, and if the phase θ□ is positive, the control circuit 6 increases the capacitance of the variable capacitor 3b.

一方、インピーダンス検出器5bにより検出されたイン
ピーダンスの絶対値Z0と設定インピーダンス50Ωと
の差の絶対値1z□−501が基準値Δ2□より小さい
とき、制御回路6は可変コンデンサ3aの容量を変更し
ない。1z□−501が基準値ΔZ□より大きく、2□
−50が負の時、制御回路6は駆動回路7aを介して可
変コンデンサ3aの容量を小さくする。また、IZ□5
01が基準値ΔZ□より大きく、2□−50が正の時、
制御回路6は駆動回路7aを介して可変コンデンサ3a
の容量を大きくする。
On the other hand, when the absolute value 1z□-501 of the difference between the absolute value Z0 of the impedance detected by the impedance detector 5b and the set impedance 50Ω is smaller than the reference value Δ2□, the control circuit 6 does not change the capacitance of the variable capacitor 3a. . 1z□-501 is greater than the reference value ΔZ□, 2□
When -50 is negative, the control circuit 6 reduces the capacitance of the variable capacitor 3a via the drive circuit 7a. Also, IZ□5
When 01 is larger than the reference value ΔZ□ and 2□-50 is positive,
The control circuit 6 connects the variable capacitor 3a via the drive circuit 7a.
Increase the capacity of.

これにより、整合回路3の入り口におけるインピーダン
スの位相0□は、第8図に示すように整合状態に関係の
ない共振点(A点)及び整合状態に関係のある共振点(
B点)の二点においてoOとなるが、整合回路3内のN
点におけるインピーダンスの位相θ2は第4図のように
整合状態に関係のない共振点(A点)付近のみでOOと
なり、さらに、可変コンデンサ3bの容量に対して増加
関数となる。したがって、第2図のフローチャートのよ
うに整合回路3の入り口におけるインピーダンス位相θ
□及びインピーダンスの絶対値z1に加えて整合回路3
内のN点におけるインピーダンスの位相θ2を使用する
ことにより、整合素子3a、3bの容量があらかじめ整
合点付近に設定されていなくても整合を自動的に取るこ
とができる。
As a result, the phase 0□ of the impedance at the entrance of the matching circuit 3 is adjusted to the resonance point (point A) unrelated to the matching state and the resonance point (point A) related to the matching state, as shown in FIG.
oO at two points (point B), but N in the matching circuit 3
As shown in FIG. 4, the impedance phase θ2 at a point becomes OO only near the resonance point (point A), which is unrelated to the matching state, and furthermore, becomes an increasing function with respect to the capacitance of the variable capacitor 3b. Therefore, as shown in the flowchart of FIG. 2, the impedance phase θ at the entrance of the matching circuit 3
In addition to □ and the absolute value z1 of impedance, matching circuit 3
By using the phase θ2 of the impedance at point N within the range, matching can be automatically achieved even if the capacitances of matching elements 3a and 3b are not set in advance near the matching point.

[発明の効果コ 以上説明したように、本発明によれば、整合回路の入り
口におけるインピーダンスの位相が00付近になったと
き、整合状態に関係のない共振点か整合状態に関係のあ
る共振点かを判別しているので、整合素子の容量が可変
範囲内のいがなる値にあっても確実、がっ、自動的に整
合を取ることができる。
[Effects of the Invention] As explained above, according to the present invention, when the phase of the impedance at the entrance of the matching circuit approaches 00, the resonance point unrelated to the matching state or the resonance point related to the matching state Therefore, even if the capacitance of the matching element is at a certain value within the variable range, matching can be reliably and automatically achieved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明を実施する自動整合装置を示すブロック
図、第2図は第1図の自動整合装置の動作を説明するた
めのフローチャート、第3図は第1図の自動整合装置の
判別領域を示す図、第4図は第1図の自動整合装置の位
相の変動状態を説明するための図、第5図は従来の自動
整合装置を示すブロック図、第6図は第5図の自動整合
装置の動作を説明するためのフローチャート、第7図は
第5図の自動整合装置の判別領域を示す図、第8図は第
5図の自動整合装置の位相の変動状態を説明するための
図である。 1・・プラズマ発生装置、2・・高周波電源、3・・整
合回路、3a、3b・・可変コンデンサ、4a、4c電
流検出素子、4b・電圧検出素子、5a、5c・・位相
差検出器5b・・インピーダンス検出器、6・・制御回
路、 7a、 7b・ ・駆動回路 (久) (b) δ 図
FIG. 1 is a block diagram showing an automatic alignment device that implements the present invention, FIG. 2 is a flowchart for explaining the operation of the automatic alignment device of FIG. 1, and FIG. 3 is a discrimination method of the automatic alignment device of FIG. FIG. 4 is a diagram for explaining the phase fluctuation state of the automatic alignment device shown in FIG. 1, FIG. 5 is a block diagram showing a conventional automatic alignment device, and FIG. Flowchart for explaining the operation of the automatic alignment device, FIG. 7 is a diagram showing the discrimination area of the automatic alignment device of FIG. 5, and FIG. 8 is for explaining the phase fluctuation state of the automatic alignment device of FIG. 5. This is a diagram. 1. Plasma generator, 2. High frequency power supply, 3. Matching circuit, 3a, 3b.. Variable capacitor, 4a, 4c current detection element, 4b. Voltage detection element, 5a, 5c.. Phase difference detector 5b.・・Impedance detector, 6・・Control circuit, 7a, 7b・・Drive circuit (K) (b) δ diagram

Claims (1)

【特許請求の範囲】[Claims] (1)負荷に直列な整合素子と電源に並列な整合素子と
を有する整合回路と、この整合回路の入り口における電
流を検出する電流検出素子と、整合回路の入り口におけ
る電圧を検出する電圧検出素子と、負荷に直列な整合素
子に流れる電流を検出する電流検出素子と、整合回路の
入り口の電流、電圧より整合回路の入り口におけるイン
ピーダンスの位相と絶対値を検出する位相差検出器及び
インピーダンス検出器と、負荷に直列な整合素子に流れ
る電流と整合回路の入り口における電圧の位相差を検出
する位相差検出器と、上記二つの位相差検出器とインピ
ーダンス検出器の出力により上記整合素子の値を制御す
る制御回路とをそれぞれ有することを特徴とする自動整
合装置。
(1) A matching circuit that has a matching element in series with the load and a matching element in parallel with the power supply, a current detection element that detects the current at the entrance of the matching circuit, and a voltage detection element that detects the voltage at the entrance of the matching circuit. , a current detection element that detects the current flowing through a matching element in series with the load, and a phase difference detector and an impedance detector that detect the phase and absolute value of impedance at the entrance of the matching circuit from the current and voltage at the entrance of the matching circuit. and a phase difference detector that detects the phase difference between the current flowing through the matching element in series with the load and the voltage at the entrance of the matching circuit, and the value of the matching element is determined by the outputs of the two phase difference detectors and impedance detector. An automatic matching device characterized in that it has a control circuit for controlling the device.
JP25139189A 1989-09-27 1989-09-27 Automatic matching device Pending JPH03113906A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25139189A JPH03113906A (en) 1989-09-27 1989-09-27 Automatic matching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25139189A JPH03113906A (en) 1989-09-27 1989-09-27 Automatic matching device

Publications (1)

Publication Number Publication Date
JPH03113906A true JPH03113906A (en) 1991-05-15

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ID=17222146

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25139189A Pending JPH03113906A (en) 1989-09-27 1989-09-27 Automatic matching device

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JP (1) JPH03113906A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100977759B1 (en) * 2010-05-26 2010-08-24 주식회사유성계전 Distributing board mounted with air-cooling passage

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100977759B1 (en) * 2010-05-26 2010-08-24 주식회사유성계전 Distributing board mounted with air-cooling passage

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