JPH03110605U - - Google Patents

Info

Publication number
JPH03110605U
JPH03110605U JP1830290U JP1830290U JPH03110605U JP H03110605 U JPH03110605 U JP H03110605U JP 1830290 U JP1830290 U JP 1830290U JP 1830290 U JP1830290 U JP 1830290U JP H03110605 U JPH03110605 U JP H03110605U
Authority
JP
Japan
Prior art keywords
transistors
transformer
oscillation circuit
transistor
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1830290U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1830290U priority Critical patent/JPH03110605U/ja
Publication of JPH03110605U publication Critical patent/JPH03110605U/ja
Pending legal-status Critical Current

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Landscapes

  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案に係るテープレコーダのバイ
アス発振回路の実施例を示す回路図、第2図は従
来の実施例の回路図である。 主な符号の説明、A……発振回路、1……発振
トランス、2,3……トランジスタ、7……電源
、12……発振器、13……分周器。
FIG. 1 is a circuit diagram showing an embodiment of a bias oscillation circuit for a tape recorder according to this invention, and FIG. 2 is a circuit diagram of a conventional embodiment. Explanation of main symbols: A...Oscillation circuit, 1...Oscillation transformer, 2, 3...Transistor, 7...Power source, 12...Oscillator, 13...Frequency divider.

Claims (1)

【実用新案登録請求の範囲】 1 トランスと、2つのトランジスタとからなり
、前記2つのトランジスタの一方のトランジスタ
のコレクタは前記トランスの巻き始め側に接続し
、他方のトランジスタのコレクタは前記トランス
の巻き終り側に接続し、一方のトランジスタのベ
ースと他方のトランジスタのコレクタとは抵抗器
とコンデンサとの並列回路を介してそれぞれ接続
し、2つのトランジスタのベース間にはコンデン
サを接続し、トランスのセンタータツプと前記2
つのトランジスタのエミツタ間に電源を接続する
ようにしたテープレコーダのバイアス発振回路に
おいて、 前記2つのトランジスタのベースに所定の周波
数の信号を注入し、この信号で前記バイアス発振
回路の発振周波数をロツクするように構成したこ
とを特徴とするテープレコーダのバイアス発振回
路。 2 2つのトランジスタに注入する信号はマイク
ロコンピユータのクロツクから得るように構成し
たことを特徴とする請求項1記載のテープレコー
ダのバイアス発振回路。
[Claims for Utility Model Registration] 1 Consisting of a transformer and two transistors, the collector of one of the two transistors is connected to the winding start side of the transformer, and the collector of the other transistor is connected to the winding start side of the transformer. The base of one transistor and the collector of the other transistor are connected through a parallel circuit of a resistor and a capacitor, and a capacitor is connected between the bases of the two transistors, and the center of the transformer is connected to the terminal side. Tap and the above 2
In a tape recorder bias oscillation circuit in which a power supply is connected between the emitters of two transistors, a signal of a predetermined frequency is injected into the bases of the two transistors, and this signal locks the oscillation frequency of the bias oscillation circuit. A bias oscillation circuit for a tape recorder, characterized in that it is configured as follows. 2. The bias oscillation circuit for a tape recorder according to claim 1, wherein the signals injected into the two transistors are obtained from a clock of a microcomputer.
JP1830290U 1990-02-27 1990-02-27 Pending JPH03110605U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1830290U JPH03110605U (en) 1990-02-27 1990-02-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1830290U JPH03110605U (en) 1990-02-27 1990-02-27

Publications (1)

Publication Number Publication Date
JPH03110605U true JPH03110605U (en) 1991-11-13

Family

ID=31521465

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1830290U Pending JPH03110605U (en) 1990-02-27 1990-02-27

Country Status (1)

Country Link
JP (1) JPH03110605U (en)

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