JPH03104366A - Standby system channel loopback test system - Google Patents

Abstract

PURPOSE:To recognize the presence of occurrence of a fault of a standby system channel quickly by looping back a test data sent from a call processor via a network of a standby system and collating a received data and a test data in the call processor so as to discriminate the propriety of the standby system channel. CONSTITUTION:A loopback means 105 is provided between a demultiplex circuit 103 and a multiplex circuit 102 in a highway interface 101, a call processor 106 communicating a control signal with a line via a network 104 of a digital exchange sends a loopback command to the highway interface 101 of a standby system #1 via a network 104 of a digital exchange to form a loopback path. Moreover, a test data sent from the call processor 106 is looped back via the network 104 of the standby system and the received data and the test data in the call processor 106 are collated to discriminate the propriety of the standby system channel.

Description

[Detailed Description of the Invention] [Summary] Regarding a loopback test method for a protection communication path in a digital exchange in which communication paths are duplexed in a thermal protection type, a protection communication path that can quickly recognize whether or not a fault has occurred in the protection communication path is provided. The purpose of this test is to realize a circuit loopback test method for the backup line of a redundant digital exchange with heat reserve type, in which separation within the highway interface provided between the network of the digital exchange and the line is carried out. A loopback means is provided between the circuit and the multiplexing circuit, and the call processor, which exchanges control signals with the line side via the network, sends a loopback command to the standby system of the no way interface, and the call processor A return connection path is established, the test data sent from the call processor is returned via the backup network, and the backup is performed by comparing the received data with the test data in the eight call processors. It is characterized in that it determines whether the system communication path is good or bad.

[Industrial application field]

The present invention relates to a loopback test method for a backup communication path in a digital exchange in which the communication path is duplicated in a thermal backup type.

Normally, when duplicating an exchange, the control device and communication path device system of the exchange are duplicated, and communication lines are connected by switching between these systems. Basically, while the active system is performing replacement operations, the backup system is periodically tested. Furthermore, since a heat reserve structure that can be switched at any time is adopted, the active system and the standby system are periodically switched. If a failure occurs in the backup system, control is performed so that the active system cannot be switched from the active system to the backup system.

In the manner described above, the reliability of the system as a whole is improved.

However, in this test method, each of the multiple communication paths is sequentially and periodically tested, so it takes a long time to test each communication path, and each communication path is left untested for a long time. , this recognition is delayed when a failure occurs.

In the worst case, there may be a delay in determining the occurrence of a failure, failure to detect the occurrence of a failure, and if a failure also occurs in the active system during this time, there is a possibility that the operating system will be switched from the active system to the standby system. In this case, the switching operation between the active system and the protection system is performed in vain, and the active line of the active system may also be disconnected. For this reason, it is necessary to quickly recognize whether or not a failure has occurred in the backup communication path, to quickly restore the system, and to avoid switching over to the operating system if a failure occurs in the backup system, even if a failure occurs in the active system. There is a need.

[Conventional technology]

FIG. 8 is an overall configuration diagram of an example of the network system to which the present invention is applied, where #0 indicates the active system and #1 indicates the backup system. The structure and operation will be described below with reference to the same figure.

In FIG. 8, subscriber circuit (LC) 202 is generally B
The current supply function (Bat
terry feed), overvoltage protection function (Over
voltage protection), ringing signal sending function (Ringing). Surveillance function (Supe
rvise), A/D conversion function (Codec),
2-wire to 4-wire conversion function (Hybrid). It has a test lead-in function (Testing), etc.

In a digital switching system having a dual heat reserve type system configuration, the subscriber circuit 202 converts an analog communication signal manually input from a subscriber terminal (not shown) into a digital signal, and also converts a line processor (LPR) into a digital signal.
) 201 and send these signals to the highway interface (HWIF) 001,
101.

In the current system (#0), the above communication signals and control signals are sent from multiple subscriber terminals to each highway interface (
The multiplexing circuit (MP
X) 002, where it is time-division multiplexed. Then, the time-division multiplexed signal is transferred to the network (NW).
It is output to O O 4 +. Network (NW)
0 0 4 I is the central processing unit (CPU) 025
．． Call processing control is performed by a call processor (CPR) 006+ configured by a main memory (MM) 026, etc., and a main processor also configured by a central processing unit (CPLI) 02B, a main memory (MM) 029, etc. (MPR)027 allows call processor (C
PR) Communication control between 006+ and 006N and maintenance management of the entire system are performed.

Similar operations are performed in the backup system (#1) as well.

The network (NW) 104 has a structure as shown in FIG. In the same figure, Kami Reno\Iwei (
Speech path memory (SPM) 117. Multiplex circuit (MP
X) 1 1 5, separation circuit (DMPX) 116, control memory (CM) 1 1 B, and call processor (C
Transmission signal memory (SSM) 1 that stores various control data etc. sent from PR) 106 to the down highway DHW
19, and a received signal memory (RSM) 120 that stores various control data to be transmitted from the up-highway UHW to the call processor (CPR) 106. The above-mentioned active system (#0) network (NW) 00
41 has a similar structure.

Switching between predetermined time slots is performed by switching connection of the speech path memory (SPM) 117 in this network (NW) I04+, and separation circuit (DMPX) 1 1
The signal is output to 6, and further to a separation circuit (DMPX) within the highway interface (HWIF) 101. In the active system (#0), among the same signals, the control signal is sent to the line processor (LPR) via the subscriber circuit (LC) 202, and the communication signal is sent via the subscriber circuit (LC) 202 to the line processor (LPR). sent to the user terminal. The communication signal sent to the subscriber circuit (LC) 202 is then further sent to the subscriber terminal.

Figure 10 is the highway interface (HW IF)
101 and a multiplexing circuit in the network (NW) 104 (
MPX) 102; in this example, one frame has 32 time slots (TS);
■The time slot is an 8-bit format. highway(
The main purpose of HW) O~27 is communication between subscriber terminals, and the remaining four lines (}!W28~31) are used for call processors (W28~31).
Its main purpose is to transmit control signals, etc. from the CPR 06. In this example, highway 29 (HW29) is allocated for testing.

Also, 0 to 7 time slots (TS) in one frame
is for changing switching and transmitting/receiving control signals such as call processing signals, and time slots (TS) 8 to 31 are allocated for communication. In this example, one of the time slots (TS) for communication is allocated to as time slot 8 (T
S8) shall be allocated for testing.

FIG. 11 is a diagram showing an example of this type of conventional standby channel loopback test method.

Hereinafter, the communication path loopback test method will be explained with reference to the same figure.

In Figure 11, the highway interface (HW
IF) 101, network (NW) 104, and call processor (CPR) 106, only the backup system (#l) is shown, and the active system (#0) is omitted. The figure also shows only one set of subscriber circuits (LC) 202, and shows an example of a communication path test. When testing the communication path shown in the figure, follow the steps below.

1) Data is set in the control memory (CM) 118 so that the transmitted signal memory (SSM) 1 1 9 and the received signal memory (RSM) 120 are respectively connected to the communication path.

2) Under the control of the call processor (CPR) 106,
Times section above. Test data is stored in the area of the transmission signal memory (SSM) 119 corresponding to TS8 (TS8).

3) The test data stored in the transmission signal memory (SSM) 1 1 9 flows through the following path.

Transmission signal memory (SSM) 119 - Multiplexing circuit (MPX)
) 115 → speech path memory (SPM) 117 one separation circuit (
DMPX) 1 1 6 - Separation circuit (DMPX) 103 - Subscriber circuit (LC) 202 → Line processor (LPR
) 201 - subscriber circuit (LC) 202 - multiplex circuit (M
PX) 102 - Multiplexing circuit (MPX) 115 - Channel memory (SPM) 117 - Separation circuit (DMPX) 1 1
6- Received signal memory (RSM) 120 4) The data stored in the transmitted signal memory (SSM) 119 is written to the received signal memory (RSM) 120 by a clock supplied from a clock supply device (not shown). Data is synchronized.

5) The call processor (CPR) 106 reads the data written in the received signal memory (RSM) 1 1 9, and combines this data with the transmitted signal memory (SSM) 1 1
9 is compared to determine whether the communication path is normal or a failure has occurred.

(1) If it is determined that the communication path is normal, the switching of the control memory (CM) 118 is returned to the original state, and the plurality of communication paths are sequentially tested.

(2) If it is determined that a failure has occurred in the communication path, repeat the test multiple times, and if it is still determined that a failure has occurred, switch from the active system (#O) to the standby system (#1).
Avoid switching the operational system to Then, the switching of the control memory (CM) 11B is returned to its original state.

That is, in conventional call path testing, the call processor (CPR)
) 106 is sent back to the line processor (LPR) 201 via the highway interface (HWIF) 101. The returned test data is received by the call processor (CPR) 106, and the protection communication path is tested by comparing the transmitted data with the received data. (This is shown in FIG. 7(a) as will be described later.) [Problem to be Solved by the Invention] The return test of the backup communication path according to the conventional technology described above is performed by the subscriber circuit (LC) 202, Since this is performed via the line processor (LPR) 201 etc., it takes a considerable amount of time for the following reasons.

Multiplexing circuit (MPX) 102 and separation circuit (DMPX) 10 in highway interface (HWIF) 101
A plurality of (four in this example) line processors (LPR) 201 are connected from 3 to 3, and when testing these communication paths sequentially, inquiries are made to each line processor (LPR) in turn. After waiting for the response, it is determined whether the communication path is good or not. Therefore, it takes time for one test to go through one cycle, and the non-test period time for one communication path (the time from the end of a test to the start of the next test for one communication path) becomes long.

Therefore, the following problems arise.

1) When testing communication paths, it takes several minutes to test just one communication path, so if you try to test all the relevant communication paths in such a backup system, it will take several times that amount of time. Failure detection may be delayed, or in the worst case, a fault in the standby system (#1) that occurred during a test on the standby system (#1) may not be detected, and the fault may be detected from the active system (#0). There is a possibility that the operating system will be switched to the backup system (#1) where the error occurred.

2) As a test result, when the occurrence of a fault is detected, the suspect range includes the line processor (LPR) 205, so it takes time to determine the location of the fault, and the repair time also increases. Furthermore, in the worst case, if a failure also occurs in the active system (#0) during the repair, which tends to take a long time, communication may be interrupted.

In order to solve problems 1) and 2), etc., it is necessary to quickly recognize failures that occur during the backup system test time, and if a failure occurs in the backup system (#1), the system can be removed from the active system (#0). Preliminary system (#1)
It is necessary to control the system so that only the active system (#0) is operated until the fault in the backup system (#1) is removed.

The present invention provides a more reliable network system by overcoming the above problems.

(Means for solving problems) FIG. 1 is a diagram explaining the principle of the present invention.

Highway interface (HWIF) provided between the digital exchange network (NW) 104 and the line
Separation circuit (DMPX) 103 and multiplexing circuit (
A folding means 105 is provided between the MPX) 102, and a folding test is carried out as follows.

The call processor (CPR) 106, which exchanges control signals with the line side via the network (NW) 104, connects the backup system #1 to the highway interface (HWI).
F) Send a loopback command to 101 and connect 1,000 steps in the highway interface (HWIF) 101.
05 to connect the down highway (D1-TW) and the up highway (UHW).

After forming the return route, the Call Processor (CPR)
) 106 sends test data using a predetermined time slot. The test data is looped back from the down highway (DHW) to the up highway (UHW) within the highway interface (HWIF) 101 and received by the call processor (CPR) 106.This received test data and the call processor (CPR) 106 The quality of the backup communication path is determined by comparing the test data sent by the system.

[Effect]

According to the invention, a highway interface (HWI)
F) By providing loopback means 105 in 101, test data sent from call processor (CPR) 106 is transferred to highway interface (HWIF).
The call processor (CPR) 106 receives the returned test data and compares the transmitted data with the received data to perform a test on the backup communication path.

Therefore, since the loopback test is performed without involving the line processor (LPR) 201, the fault location can be detected quickly and the communication path system including the line processor (LPR) 201 and the highway interface (HWIF) 101 can be easily detected. It is also possible to isolate failures and prevent unnecessary switching.

〔Example〕

FIG. 2 is a control flowchart of the protection path return test method of the present invention, and FIG. 3 is a control flowchart of the call processor (CPR).
Figure 4 shows an example of communication between the line processor (LPR) and the line processor (LPR).
5 is a diagram illustrating the return route, FIG. 5 is a diagram illustrating the internal configuration of the highway interface (HWIF), and FIG. 6 is a diagram illustrating the flow of test data.

Below, in accordance with the flowchart in Figure 2, Figures 3 to 6 will be explained.
The protection line loopback test method according to the present invention will be described in detail with reference to the drawings. Here, in all of the duplex configurations shown in FIGS. 3 to 6, only the standby system (#1) is shown.

Step 107 in FIG.
PR) 106 sets the switching change data in the control memo +) (CM) 1 18. That is, in FIG. 3, the call processor (CPR) 106 has a control memory (
CM) 11B, the line processor (LPR) 201 in the channel memory (SPM) 117 and the call bus O{y7
Set the control data to exchange time slots between t(CPR)106. (In Fig. 3, the data written to address a and the data written to address b of the channel memory (SPM) 117 are stored in the control memory (CM
) 118, the data at address b is read at the timing of address a, and the data at address a is read at the timing of address b. ) Through this control, the data set in the transmission signal memory (SSM) 119 is transferred to the line processor (LPR) 201 via the speech path memory (SPM) 117.
Data from LPR) 201 is stored in speech path memory (SPM).
117 to a received signal memory (RSM) 120.

In this embodiment, as shown in FIG.
1 1 9 and switching change data for causing the received signal memory (RSM) 120 to switch is set in the control memory (CM) 11B. In addition, Highway 2
Time slot 8 (TS8) of HW 9 (HW 29) is allocated for testing the highway, and data (80H) for switching is set in time slot 8 (TS8) of the highway to be tested. Here time slot 8 (TS8), highway 29 (HW29)
) is used for testing purposes, but this is not necessarily the case.

Step 108 of FIG.
PR) 106 is the transmission signal, ++MO+J (SSM) 119
By setting the return bit to ON (1), a return route is set within the highway interface (HWIF) 101. That is, as shown in FIG. 4, in order to turn around the highway, the transmission signal memory (SS
M) The return bits of 1 1 9 are set to ON (1), and this signal is sent to the multiplexing circuit (MPX) 1 1 5, the speech path memory (SPM) 1 1 7, and the separation circuit (DMPX).
1 1 6, the downlink highway DHW is notified to the highway interface (HWIF) 1 0 1 via the highway (HW). Then, the selector (SEL) 121 is switched by this notified signal, and in the highway interface (HWIF) Lot,
That is, the separation circuit (DMPX) 103 and the multiplexing circuit (MPX)
) 102, a return route that characterizes the present invention is set. Details of this return route setting will be explained with reference to FIG. For example, in the same figure, the (32kth) signal separated by the separation circuit (DMPX) 103
+1) The first bit of time slot 1 (TSI) of the frame (k = 0.1.2, ...) is used as the loopback setting information area, and this bit is used as the call processor (CPR).
By setting it to ON (1), this return information is sent to the control device (CONT) by the dropper (D)
)1 2 4. On the other hand, time slots (TS) O to 7 that convey control information and time slots (TS) 8 to 31 that convey communication information are subscriber circuits (LC).
202, communication information (TS8-31) is read into the subscriber terminal (203) side, and control information (TSO-7) is read into the line processor (LPR) 201. Note that since the subscriber terminal (203) is connected to the active system (#o) side, no communication information is actually sent.

When the control device (CONT) 1 2 4 reads the return command, the control device (CONT) 124 selects the selector (SEL).
) 121. That is, the separation circuit (DMPX) 10
The selector (SEL) 121 combines time slots (TS) 8 to 31 of the signal from the line processor (LPR) 201 and time slots (TS) O to 7 of the signal from the line processor (LPR) 201 to form one frame. to control. The combined signals are sent to a multiplexing circuit (MPX) 102.

As a result of the above, the separation circuit (DMPX) that transmits communication information
Regarding time slots (TS) 8 to 31 of the signal from 103, the multiplexing circuit (
MPX) 102 is loaded. Therefore, if test data is set in one of time slots (TS) 8 to 3l, this test data will be transferred to the highway interface (HW).
IF) 101.

At step 109 in FIG. 2, test data (AA) is written into the transmission signal memory (SSM) 119 by the call processor (CPR) 106 as shown in FIG.

The written data is written to the received signal memory (RSM) 120 through the following path.

Transmission signal memory (SSM) 119 - Multiplexing circuit (MPX)
) 115 one communication path J Mori (SPM) 117 one separation circuit (
DMPX) 1 1 6-separation circuit (DMPX) 103
→ Selector (SEL) 121 - Multiplexing circuit (MPX) 10
2 = Multiplexing circuit (MPX) 115 - Channel memory (SP
M) 117 - separation circuit (DMPX) 1 1 6 - received signal memory (RSM) 120 By step 110 in FIG.
The data written in the RSM 119 is synchronized with the data written in the received signal memory (RSM) 120 by a clock supplied from a clock supply device (not shown).

Step 111 in FIG.
After reading the data written in the received signal memory (RSM) 120, the PR) 106 compares the read data with the written data to determine whether the highway is normal or in trouble.

1) If it is determined that the highway is normal, the second
At step 112 in the figure, the highway turnback is canceled. That is, the loopback bit of the signal sending memory (SSM) 1 1 1 is set to OFF (0), and this information is transmitted to the control device (CONT) 124 (see FIG. 6 below).
is read via the dropper (D) 122. Then, under the control of the control device (CONT) 124, the selector (S
The EL) 123 combines the time slots (TS) O to 7 of the signal from the line processor (LPR) 106 and the time slots (TS) 8 to 31 of the signal from the subscriber terminal,
Construct an I frame. In other words, the separation circuit (D
Time slot (TS) 8 of the signal from MPX) 103
~3l turnaround route is canceled.

2) If it is determined that a fault has occurred on the highway, this is notified to the active system (#O) at step 113 in FIG. 2, and the standby system (#1) is disconnected. In other words, the operating system is not switched to the standby system (#1).

In the above manner, the highway interface (HW)
The loopback path within the IF) is released, and the CM switching is restored by step 114 in FIG.

In the manner described above, the return test of the backup communication path is performed.

FIGS. 7(a) and 7(b) are diagrams for explaining the differences between the conventional example and the present invention. In the conventional communication path system test shown in FIG. 7(a), test data is transmitted from the call processor (CPR) to the highway interface (HWI).
F) line processor (LPR) 201 via 101
The road returns to the highway interface (HW).
Call Processor (CPR) 1 via IF) 101
Sent to 06.

On the other hand, in the test of the communication path system according to the present invention shown in FIG. 7(b), test data is transmitted from the call processor (CPR) to the highway interface (HWIF)
The call processor (CPR) 106 then sends the call back to the call processor (CPR) 106.

Therefore, the test time becomes faster than in the past.

〔Effect of the invention〕

The present invention provides a line processor (LPR) in the test path.
Highway interface (HWI)
F), network (NW), call processor (C
The efficiency of testing communication paths (highways) related to public relations (PR) will be dramatically improved.

As a result, the occurrence of a failure in the backup communication path can be recognized more quickly.
The following advantages arise.

1) Since the maintenance personnel can quickly recognize whether or not a failure has occurred, the response (repair/replacement) will be quick.

2) Since it is possible to reliably detect failures that occur in the backup communication path, even though a failure has occurred in the backup system, it cannot be detected, and during this time a failure also occurs in the active system, and the failure occurs in the active system. This eliminates the need to switch the operational system from one to the backup system.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the principle of the present invention. FIG. 2 is a control flowchart of the protection path return test method of the present invention. FIG. 3 is a diagram showing an example of communication between a call processor (CPR) and a line processor (LPR). , Figure 4 is a diagram of the return route, Figure 5 is the internal structure of the highway interface (}IWIF), Figure 6 is a diagram showing the flow of test data, and Figure 7 (a) is a call route test using the conventional technology. FIG. 7(b) is a schematic diagram of a communication path test according to the present invention; FIG. 8 is an overall configuration diagram of a network system according to the present invention; FIG. 9 is a configuration diagram of a network (NW); FIG. 10 is a diagram showing the connection relationship between the highway interface (HWIF) and the multiplexing circuit (MPX), and FIG. 11 is a diagram showing a backup call path loopback test method according to the prior art. The reference numerals in FIG. 1 are as follows. #〇1・1・−・−1−−1 Active system # 1 −−−−−−1・・1 Standby system 001−・−
・1・・・−・・Highway interface (HW
IF/active system) 101 - ・-----1...Highway interface (HWIF/protection system) 102-----------・--1 multiplexing circuit (MPX) 1
03-・-1---1-・1 Separation circuit (DMPX) 0
04・1・−・−−−−Network (NW/current system) 104−・−・−・−・− Network (NW・
Standby system) 105--・1・1-------1 Return means 006-- Call processor (CPR/active system) 106--・・1・1------・1 Call processor, Tsusa (C
PR/backup system)

Claims (1)

[Scope of Claims] In a standby line loopback test method for a redundant digital exchange with heat reserve, a separation circuit (103) in a highway interface (101) provided between a network (104) of a digital exchange and a line. A call processor (106) which exchanges control signals with the line side via the network (104) is connected to the highway in the standby system (#1). A return command is sent to the interface (101), the return means (105) forms a return connection path, and the test data sent from the call processor (106) is returned via the backup network (104). , the received data and the call processor (106)
1. A standby line loopback test method, characterized in that the pass/fail of the standby line call path is determined by comparing it with the test data in the standby line.