JPH03101394A - Video signal controller - Google Patents

Abstract

PURPOSE:To reproduce a synchronizing signal and a clamp by providing a motion detection circuit, a synchronization separating circuit, and a synthesis circuit to synthesize a video signal switching control signal from the output signal of the motion detection circuit and that of the synchronization separating circuit. CONSTITUTION:The motion detection circuit 21, the synchronization separating circuit 22, and the synthesis circuit 23 which synthesizes the video signal switching control signal from the output signal of the motion detection circuit 21 and that of the synchronization separating circuit 22 are provided. When a frame memory incapable of storing all the video signals including a synchronizing signal in a signal processing circuit including the frame memory is used, it is fixed so that a video signal processed between lines can be outputted in a blanking period. Thereby, it is possible to reproduce the synchronizing signal and the clamp at the rear stage of the signal processing circuit including the frame memory.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to a high-definition television receiver using a frame memory, in which a signal obtained by processing the output of a yc dividing circuit and scanning line interpolation circuit between lines or a frame The present invention relates to a video signal control device that controls switching when selecting a signal processed between signals.

Conventional technology In recent years, there has been a growing trend toward higher image quality in television receivers.
So-called TDTV, which uses a frame memory to perform YC separation and double-density scanning line interpolation, is being actively developed.

An example of a video signal control device for a high-definition television receiver using the conventional frame memory described above will be described below with reference to the drawings. FIGS. 2 and 3 are for explaining a conventional example. First, FIG. 2 is a block diagram showing an example of a signal processing circuit including a YC separation circuit and a double-density scanning line interpolation circuit in an rDTV, which includes all frame memories.

In FIG. 2, 1 is a video signal input terminal.

A line memory 2 delays the input video signal by one horizontal scanning period (hereinafter abbreviated as H) and outputs the delayed signal.

3 is an interline signal processing circuit which processes the input video signal and the input video signal delayed by IH and outputs the processed signal. 4 is a frame memory which delays the input video signal by one frame (525H) and outputs the delayed signal. Reference numeral 5 denotes an interframe signal processing circuit which processes the input video signal and the input video signal delayed by one frame and outputs the processed signal. 6 is a selection circuit which selects and outputs either a signal processed between lines or a signal processed between frames based on the output of the video signal switching control circuit. 7 is a video signal output terminal. 8 is a video signal switching control circuit.

9 is a video signal switching control signal output terminal.

FIG. 3 is a block diagram showing an example of the video signal switching control circuit 8 of FIG. 2. A conventional video signal switching control circuit is a motion detection circuit. In FIG. 0, 1 is a video signal input terminal, and 9 is a video signal switching control signal output terminal, which correspond to the same numbers in FIG.

Reference numeral 10 denotes a frame memory that delays the input video signal by one frame and outputs the delayed signal. 11 is a subtracter, and 12 is a subtracter. 13 is a low pass filter, 14 is a band pass filter, 15 is a maximum value selection circuit;
The output (m) of the band pass filter 14 is compared and the larger one is selected and outputted. 16 is a comparator that compares the output of the quantity large value selection circuit 15 with the value of the threshold input terminal 17 and outputs it. Reference numeral 18 denotes an area addition circuit, which adds the output of the comparator 16 over an area of 5 lines x 5 pixels. Reference numeral 19 denotes a spatiotemporal expansion circuit, which adds the output data of the area addition circuit 18 for the past and surrounding pixels of the pixel of interest. The value decreased by a certain value,
It compares the output data of the area addition circuit 18 of the pixel of interest and outputs the larger value. A comparator 20 compares the value of the threshold input terminal 21 with the output value of the spatio-temporal expansion circuit 19 and outputs a motion signal.

This motion signal is output to the video signal switching control signal output terminal 9.

Conventional video signal switching control circuit 8 configured as described above
The operation will be explained below.

First, the video signal switching control circuit 8 assumes that the video signal input terminal 1 receives an NTSC composite video signal.

In the NTSC system composite video signal, the color signal is multiplexed into the high frequency band of the luminance signal, and the carrier waves of the modulated color signal are in opposite phase in one frame and in phase in two frames. Therefore, in order to detect motion, it is not possible to simply take a difference of one frame, but to detect the motion by dividing it into two components: a low-frequency component of luminance, and a high-frequency component of color and luminance. The former is subtractor 11
This is realized by taking the difference between frames and extracting components up to about 2.5 MHz using a low-pass filter 13. The latter is calculated by taking the difference between two frames by a subtracter 12 and passing it to a bandpass filter 14 to give a value of 2.5M to 4.2M.
This is achieved by extracting the components between NH4. ! The large value selection circuit 15 selects the larger of the output values thus extracted, and this is the output of the interframe difference detection. The comparator 16 compares it with the value of the threshold input terminal 17 and outputs a primary motion signal.

Note that the value of this threshold input terminal 17 is not a fixed value, and for example, in a spatial edge part, an erroneous inter-frame difference output is likely to be output due to a sampling timing shift, etc., so the value should be controlled to make it more static. is being carried out. Many noise components still remain in the output components of the comparator 16 synthesized in this way, and the spatially isolated noises are removed by the area addition circuit 18.

The spatio-temporal expansion circuit 19 is a circuit that prevents failure to detect motion, and compares the output of the area addition circuit 18 with past data and data of surrounding pixels.If the spatio-temporal information is data that is determined to be motion, , select that value. In the comparator 20, the space-time expansion circuit 1 is divided into three steps, for example, dynamic, intermediate, and static, depending on the switching step of the selection circuit 6 shown in FIG.
Classify the output of 9 according to the value of the dark value person/power terminal 21,
It is output to the video signal switching control signal output terminal 9.

Problems to be Solved by the Invention However, in the above configuration, in order to reduce memory capacity, it is difficult to perform signal processing between frames using a frame memory that cannot store all video signals including synchronization signals etc. , even if data within the effective video screen range can be stored,
Data outside the effective video screen range, that is, data during the blanking period including synchronization signals and color bursts (color synchronization signals), cannot be stored, and the output processed between frames will be inaccurate, and the synchronization signal will be converted from this output signal at a later stage. In other words, there are cases where it becomes impossible to regenerate the clamp.

In view of the above problems, the present invention provides a video signal control device that can reproduce synchronization signals and clamps even when signal processing is performed using a frame memory that cannot store all video signals including synchronization signals. be.

Means for Solving the Problems In order to solve the above five problems, the video signal control device of the present invention includes a motion detection circuit for input video signals, a synchronization separation circuit for human input video signals, and a synchronization separation circuit for the output of the motion detection circuit. It is equipped with a composition circuit that combines the outputs of the circuits.

According to the above-described configuration, the present invention first detects a blanking period in the synchronization separation circuit, and selects to output a signal processed between lines outside the effective video screen range including the blanking period. Within this range, a signal processed between frames and a signal processed between lines are selected depending on the output of the motion detection circuit.

Embodiment Hereinafter, a video signal control device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of a video signal control device in one embodiment of the present invention.

In FIG. 1, 1 is a video signal input terminal, 9 is a video signal switching control No. 13 output terminal, and 21 is a motion detection circuit, which operates in the same way as the conventional example shown in FIG.

22 is a synchronization separation circuit that detects a blanking period including a synchronization signal from the input video signal. A synthesis circuit 23 synthesizes a video signal switching control signal from the output of the motion detection circuit 21 and the output of the synchronization separation circuit 22.

Regarding the video signal control device configured as above),
Let's explain its operation.

A synchronization separation circuit 22 detects a synchronization signal, and a zero synthesis circuit 23 outputs a signal indicating a blanking period including color bust.
A video signal switching control signal is generated so that the signal becomes the output of the line-to-line signal processing circuit 5. On the other hand, during a period when a video signal exists other than the blanking period, the synthesis circuit 23 is configured so that the output of the motion detection circuit 21 becomes the video signal switching control signal as it is. If the output of the motion detection circuit 21 is "static", the selection circuit 6 in FIG. Choose.

By the way, when an NTSC signal is input as a video signal, one frame consists of 525 lines and 14MH
In the case of sampling in z, the l line consists of 910 pixels. The effective range of the video signal is 483 lines, and each line is 910×O, 835 to 760 pixels.

Furthermore, when overscanning of the main screen is taken into account, the number of effective pixels per line is 760×0.92684 pixels. Therefore, the capacity of the frame memory is up to 30% compared to the case where all video signals including synchronization signals etc. are stored.
((483X 6841525 X910) 20, 69
) can be reduced.

As described above, according to this embodiment, the motion detection circuit 21 and
By providing a synchronization separation circuit 22 and a synthesis circuit 23 that synthesizes a video signal switching control signal from the output signal of the motion detection circuit 21 and the output signal of the synchronization separation circuit 22, the synchronization signal can be input to the signal processing circuit including the frame memory. Even if you use a frame memory that cannot store all video signals, if the blanking period is fixed so that the video signal processed between lines is output, the subsequent stage of the signal processing circuit including the frame memory will be able to store the synchronization signal and clamp. can be played.

Effects of the Invention As described above, according to the present invention, a motion detection circuit, a synchronization separation circuit, and a synthesis circuit for synthesizing a video signal switching control signal from an output signal of the motion detection circuit and an output signal of the synchronization separation circuit are provided. Therefore, even if signal processing between frames is performed using a frame memory that cannot store all video signals, including synchronization signals, etc., in order to reduce the required memory capacity, the blanking period is limited to the video processed between lines. The signal is fixed to be output, and the synchronization signal and clamp can be reproduced even at the subsequent stage of the circuit including the frame memory, and the cost can be reduced without sacrificing the function as a video memory.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a video signal control device according to an embodiment of the present invention, FIG. 2 is a block diagram showing an example of a signal processing circuit including a frame memory, and FIG. 3 is a block diagram of an example of a conventional video signal control device. FIG. DESCRIPTION OF SYMBOLS 1...Video signal input terminal, 9...Video signal switching control signal output terminal, 21...Motion detection circuit, 22...Synchronization separation circuit, 23・・・・・・
・Synthesis circuit.

Claims (1)

[Claims] A video signal input terminal, a line memory connected to this video signal input terminal, an interline signal processing circuit connected to the input end and output end of this line memory, and a frame memory connected to the video signal input terminal. and an interframe signal processing circuit connected to the input end and output end of the frame memory, a selection circuit for switching between the output signal of the line interline signal processing circuit and the output signal of the interframe signal processing circuit, and the video signal input. a motion detection circuit connected to the video signal input terminal, and a motion detection circuit connected to the video signal input terminal; a separation circuit;
A video signal control device comprising a synthesis circuit that synthesizes the output signal of the motion detection circuit and the output signal of the synchronization separation circuit.