JPH03101327A - Line fault detection system - Google Patents

Abstract

PURPOSE:To accurately and speedily detect a line fault by using an idle time slot in a frame as the time slot for transmitting line fault information when the line fault is detected and discriminating it with a call connection control signal bit. CONSTITUTION:When the fault occurs in a digital line (a), a fault detection circuit 1a inserts fault information and an identification number given to a multiplex device 1 into the idle time slot. The fault data passes through multiplex devices 3 and 4, is taken out from the time slot in a dropper 8a in a line controller 8, is converted for informing a digital exchange station 6 of it in a line control circuit 8c, is inserted into the prescribed time slot in an inserter 8b and is transmitted to the digital exchange station 6 through a highway 9. Fault data is displayed in a digital exchange station 5. Thus, the line fault can speedily be detected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a line failure detection method for detecting and notifying a failure occurring in a digital transmission line.

[Conventional technology]

Conventionally, failures that occur on a digital transmission path are detected by a multiplexer, and the signal bits of the call connection information on each channel are transmitted to the digital switching center.
0'' - transmitted as simultaneous call information. The digital switching center divides the 30 channels in the l bearer into 5 handling groups each consisting of 6 channels as a method for determining that this simultaneous call information is a line failure.
3 out of 6 channels in one handling group
If call information is detected during a recognition time of approximately 150m5 for a channel or more, the handling group is
We have determined that a line failure has occurred and are taking action.

[Problem to be solved by the invention]

In the conventional line fault detection described above, the signal bits for call connection control are shared for communicating line faults, so the digital switching center has to identify whether the call is a real call or a line fault. The drawback is that it is always necessary to delay the call detection process for a recognition time of about 150 ms to detect the call. Also, even if a line failure occurs when four or more of the six channels in one handling group are already in use, it cannot be recognized as a line failure because three or more channels will not be called simultaneously. Otherwise, it will be detected as an invalid call.

Therefore, if line failures occur momentarily and continuously, invalid calls will be placed and disconnected repeatedly.
This places a large burden on the processing power of the central processing unit of the digital switching center. Furthermore, the digital switching center has the problem that it is not known which multiplexer on the line has detected the fault.

An object of the present invention is to provide a line that can display to the switching center which line of the digital transmission path is at fault when a line fault occurs, without delaying call detection and without generating an invalid call. The object of the present invention is to provide a fault detection method.

[Means to solve the problem]

In the line fault detection method of the present invention, two digital exchanges are relay-connected via a digital line by a plurality of multiplexers, and a transmission rate of 2.048 Mbps is established between the exchanges and the multiplexers via a line controller. A transmission system connected by a digital interface includes a detection unit that detects a fault in the digital line based on a received signal, and an identification number assigned to the detection unit and data indicating the fault in a frame in the same direction as the received signal. a first insertion section for inserting data into an empty time slot; a pull-in section for taking out data inserted in the first insertion section; a line control unit that performs conversion for transmission to the switching center; a second insertion unit that inserts the data converted by the line control unit into a predetermined control time slot; and a second insertion unit that inserts the data extracted by the lead-in unit. and a line control device including a third insertion section that inserts into an empty time slot in a frame in the opposite direction to the received signal.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram for explaining the usage situation of the embodiment of the present invention. In FIG. 1, a multiplexing device 1 includes a fault detection circuit 1a that detects a fault in a digital line, and a fault detection circuit 1a that detects a fault in a digital line.
．． The line control device 8 includes an inserter 1b that inserts into an empty time slot of a frame in a 048 Mbps digital interface, a dropper 8a for extracting fault information, inserters 8b and 8d, and a line control circuit 8c. In FIG. 2, two opposing digital exchanges 5 and 6 are connected to a line control device 71 and a line control device 8, respectively. The line control device 7.8 is
The digital switching center 5 and the digital switching center 6 are connected via four multiplexers 1 to 4 that multiplex connect digital lines.

The operation when a failure occurs in the digital line a connecting the multiplexers 1 and 2 in FIG. 2 will be described below. The fault detection circuit 1a in the multiplexer 1 detects this fault and inserts the fault information and the identification number assigned to the multiplexer 1 into the vacant 16th time slot in the frame via the inserter 1b. insert. This fault data passes through the multiplexer 3.4, is extracted from the 16th time slot by the dropper 8a in the line control unit W8, and is converted by the line control circuit 8c in order to notify the digital switching center 6. , is inserted into a predetermined control time slot by the inserter 8b, and transmitted to the digital switching center 6 via the highway 9.

Further, upon detecting a fault, the line control device 8C immediately freezes the received signal bits for call processing control, and turns on the signal bits that would reduce the processing capacity of the central processing unit (not shown) of the digital switching center 6. / Prevent repeated off. The digital switching center 6 displays on the display that a line fault has been detected by the multiplexer 1 based on the fault data, and performs blockage processing on the corresponding line, and the line control device 8C transmits this fault data via the inserter 8d. It is inserted into the vacant 16th time slot in the frame and sent to the multiplexer 4. This fault data passes through the multiplexer t3, 1.2 and the line control device 7, and is displayed on the digital switching center 5 in the same manner as described above.

The same procedure is followed when recovering from a fault, and the fault recovery data detected by the multiplexer 1 is notified to the digital switching centers 6 and 5 through the 16th time slot. Unblocking is performed.

In the multiplexing device shown in FIG. 1 showing the configuration of this embodiment, only the fault detection circuit and inserter for the uplink are shown, and the illustration of those for the downlink is omitted.
Each of the multiplexing devices 1 to 4 includes uplink and downlink devices.

〔Effect of the invention〕

As explained above, the present invention has a transmission rate of 2.048 Mb between the digital switching center and the multiplexing device via the line control device.
In a transmission system connected by a PS digital interface, when a line fault is detected, the vacant 16th time slot in the frame is used as a time slot for transmitting line fault information, and is distinguished from the signal bit for call connection control. By doing so, it is possible to accurately and quickly detect and control line faults, prevent invalid operation of the digital switching center, and furthermore, transmit information on which multiplexer on the line has detected the fault to the digital switching center. This allows the switching center to know which line is at fault, which has the effect of greatly improving the efficiency of handling faults in digital transmission lines.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram for explaining the usage situation of the embodiment of the present invention. 1 to 4... Multiplexing device, 1a... Fault detection circuit, lb, 8b, 8d... Inserter,
5, 6...Digital exchange, 7.8...
...Line control device, 8a...Dropper, 8C.
...Line control circuit, 9...Highway. eye

Claims (1)

[Claims] Two digital switching centers are relay-connected via a digital line by a plurality of multiplexing devices, and transmission between the switching center and the multiplexing devices is performed via a line control device at a rate of 2.
In a transmission system connected by a 048 Mbps digital interface, there is a detection unit that detects a fault in the digital line based on a received signal, and a detection unit that detects an identification number assigned to the detection unit and data indicating the fault in the same direction as the received signal. The multiplexing device includes: a first insertion section that inserts data into an empty time slot in a frame; a pull-in section that takes out data inserted in the first insertion section; a line control unit that performs conversion for transmission to the switching center; a second insertion unit that inserts data converted by the line control unit into a predetermined control time slot; and data extracted by the lead-in unit. and a third insertion unit that inserts the received signal into an empty time slot in a frame in the opposite direction to the received signal.