JPH03101193A - Thick film/thin film hybrid multilayer interconnection board - Google Patents

Abstract

PURPOSE:To obtain a high density and high reliability thick film/thin film hybrid-type multilayer interconnection board by a method wherein a matching layer with which the circuit terminals of a thick film interconnection board are electrically connected to the circuit terminals of a thin film interconnection board is provided. CONSTITUTION:A ceramic interconnection board 10 is composed of alumina boards 11 on which W-conductors 12 and register marks 15 are printed and which are connected to each other with through-holes 13 filled with W and has lands 14. A thin film circuit part 20 is formed on the board 10 with a matching layer 30 composed of the exposed through-holes 13 and pads 31 attached to them between and an LSI 40 is mounted. In order to form the pad 31, the position of the hole 13 on the board surface is estimated by a computer from the register marks 15 on the board 10. The relations between the estimated position and the position of the through-hole of the thin film circuit 20 which is to be connected to the through-hole 13 are calculated to obtain an imaginary curve. The conductor pad 31 having the imaginary curve as its outline is selectively formed. The thin film circuit 20 is composed of polyimide resin films 21 and copper thin films 22. With this constitution, a thick film/thin film hybrid-type multilayer interconnection board can be obtained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a wiring board used for multilayer wiring and an LSI
In particular, the present invention relates to a thick-thin-film hybrid type multilayer wiring board structure that has high density, high manufacturing yield, and reliability, and a module using the same.

[Prior art]

As prior art, JP-A-58-73193, JP-A-61-22691, and JP-A-63-190 are known.

The technology of mounting an LSI chip on a single ceramic wiring board is becoming a mainstream mounting technology for large-scale, high-speed digital systems such as large-scale computers. Furthermore, there has also been significant technological progress in the multilayer wiring boards used in this technology.

For example, currently, a thick film wiring board is formed using a green sheet method to form an insulating layer of ceramics or glass ceramics, and a wiring conductor is made of tungsten or molybdenum, and then a thin film method is used to form a wiring section on the upper surface of the thick film wiring board. Multilayer substrates are being actively studied. One of the problems with this thick film/thin film hybrid multilayer board is that there are large variations in sintering shrinkage during the process of forming the thick film wiring board. This causes a positional shift between the patterns at the joint between the thick film wiring board and the thin film wiring portion, resulting in poor connection. By the way, currently the dimensional tolerance from the center of the thick film wiring board to its periphery is 0.
．． The limit is to keep it to about 5%. Therefore, if the distance from the center to the periphery is 50 ROM, the maximum ±
A positional shift of 250 μm will occur.

FIG. 2 shows one of the conventional techniques for solving the problem of poor connection caused by variations in the shrinkage rate of thick film wiring boards. In FIG. 2, a 4-alumina multilayer substrate (thick film wiring board) 1 has a ground made of a sintered body of tungsten, a power supply layer 2, and a via portion (thick film wiring terminal) 3 in its inner layer. The via portion 3 is formed by filling a via hole in the alumina insulating layer 4 with tungsten paste, and its diameter is set to be large in anticipation of variations in the shrinkage rate of the thick film wiring board 1.

For example, when the substrate size is 50 mm, the thickness is 250 μm or more. Reference numeral 5 denotes an insulating layer made of polyimide, and after the coated prepolymer solution is thermally cured and completely converted into polyimide, via holes are formed by photolithography using a resist. Furthermore, this via hole and an insulating layer 6 are formed. A thin film wiring section 7 is formed by alternately forming these insulating layers 5 and wirings 6. In this thick film thin film wiring board, by setting the diameter of the via portion 3 to a large diameter (approximately 500 μm), it is possible to absorb positional deviation due to variations in the shrinkage rate of the thick film wiring board 1, and prevent connection failures. can do.

In addition, Figure 3 shows that while keeping the via diameter between 150 μm and 200 μm, a film with a diameter of approximately L mm and a thickness of 3 mm is applied to the via surface.
An example is shown in which a μm'Fq plate-shaped metal pad 16 made of palladium or the like is formed. In this case, the disk-shaped metal pad 1
6, it is possible to absorb positional deviations due to variations in the shrinkage rate of the thick film wiring board 10, and it is possible to prevent connection failures.

[Problem that the invention seeks to solve]

Recent advances in the high functionality and density of LSIs have been rapid.
Even at present, the terminal pitch of LS'I is approximately 450 μm and the terminal diameter is approximately 200 μm. In order to achieve such high density, it is essential to increase the density not only in the upper thin film circuit but also in the thick film circuit.

However, the conventional substrates described above have the following drawbacks. That is, in the example shown in FIG. 2, the diameter of the via section 3 is expanded to about 0.5 mm, and in the example shown in FIG. This enlargement hinders the high density and high yield of multilayer substrates.

In order to increase the density of thick film circuits, the diameter of the pipe section 3 is increased to approximately 0.5 mm, and in the example shown in Figure 3, the diameter of the disc-shaped conductor on the thick film substrate is increased to 1 mm, which is smaller than the via diameter. Further expansion is not allowed. Unless these dimensions are maintained as they are or even reduced, it is impossible to increase the density of the substrate. However, from the above description, it is obvious that if the diameter of the via or the diameter of the disc-shaped metal pad is reduced, the number of connection failures will increase.

[Means for solving problems]

An object of the present invention is to provide a high-density thick-film-thin-film hybrid multilayer board that prevents connection failures caused by variations in shrinkage rate of ceramic or glass-ceramic wiring boards, ie, thick film wiring boards.

To achieve this objective, in a thick film/thin film hybrid multilayer wiring board in which a thin film wiring circuit is formed on a thick film wiring board, positional deviation between each circuit is absorbed at the interface between the thick film wiring circuit and the thin film wiring circuit. A matching layer is provided for electrically connecting each terminal, and some of the conductor pads formed on the matching layer have an elliptical or band-like shape. Connect directly to at least two of the via holes on the surface of the thick film substrate, the via holes on the bottom of the thin film circuit, or the via holes formed in the matching layer, and the direct connection position with the via holes is on the conductor pad. I made it so that it was not in the center but near the edge.

Forming a conductor pad connected to the via hole as described above can be achieved by the following method. That is, (1) Measure the positions of via holes on the surface of the thick film substrate by selecting via holes at the edges of the substrate, the center of the substrate, etc.; ■Classify the shrinkage state of each board into several types of patterns. (2) Prepare a connection conductor mask corresponding to each pattern and use this to form connection conductor pads. In order to do this more efficiently, we used the following method. (1) Based on the position of the thick film wiring terminal and the position of the thin film wiring, connection conductor pads corresponding to each individual board and terminal are formed using an electron beam drawing method. (2) Based on the positions of the thick-film wiring terminals and the thin-film wiring, a dot printer is used to form connection pads corresponding to each individual board and terminal.

In addition, in order to increase density and improve substrate yield, the diameter of the signal wiring via hole in the thick film wiring board was reduced to 1.50t.
It was designated as tm.

In addition, in order to facilitate position detection of via holes, etc. from optical or secondary electron images, position detection marks are formed at three or more locations on the surface of the thick film wiring board on which the thin film circuit is formed before the board is baked. It was to be.

Further, in some cases, the position detection mark may be replaced by a thick film wiring terminal exposed on the thin film side surface of the thick film wiring board.

Furthermore, in order to easily achieve high-density wiring, the shape of the main connection conductor pads was made into an ellipse, a strip, or a planar dumbbell shape, and the width of these connection conductor pads was set to 500 μm or less.

In addition, the material of the connection conductor pad can be selected from silver/palladium, platinum,
It is made of at least one metal selected from copper, aluminum, gold, nickel, chromium, tungsten, and molybdenum.

[Effect]

If the connection conductor pad is a circular pad whose center coincides with the center of a thick film via hole as in the past, the misalignment that can be absorbed by the matching layer is about 1/2 of the pitch of the via hole. . On the other hand, as in the present invention, the connection conductor pad formed on the matching layer is shaped like an ellipse or a band, and the connection position with the plurality of via holes that are directly connected to it is not in the center of the conductor pad. By placing the matching layer near the end, the positional deviation that can be absorbed by the matching layer is expanded to about the pitch of the via hole.

Furthermore, by making the matching layer not only a single layer but multiple layers,
It becomes possible to absorb positional deviations that are equal to or greater than the pitch of the via holes. As a result, it is possible to increase the density of substrates and modules by increasing the density of via holes and wiring, and furthermore, to prevent erroneous connections between thick film circuits and thin film circuits, thereby making it possible to improve the reliability of substrates and modules. The diameter of the via hole formed in the thick film substrate is determined by the current capacity flowing through it. For signal wiring with a small current capacity, the diameter may be small, but experiments have shown that the probability of conductor breakage can be reduced by setting the diameter to 150 μm or less. In other words, when filling a conductive paste into a via hole using a printing method, if the diameter of the via hole exceeds 150 μm, air is likely to be drawn into the paste filled into the via hole, and as a result, the top surface of the via hole may be damaged after printing and drying. There is a depression in the center, which can be improved to some extent by printing twice, but wire breakage is more likely to occur.

The shape of each (thick film) wiring terminal portion exposed on the surface of the thick film substrate and the connection conductor pad formed to be connected to the thin film terminal of the thin film circuit formed thereon is mainly determined by the shape of the via hole. The pad has a maximum width of 500 μm, which is slightly thicker in the form of an ellipse, band, or planar dumbbell shape, and in some cases, the middle part is made even thicker because it is used on thick film substrates such as ceramics with large surface irregularities. This is because it is highly effective in preventing wire breakage when forming pads directly on the wire.

The position detection mark on the surface of the thick film wiring board is different from the normal 11-mask or screen alignment mark, and has the following 3 types.
It has two roles. That is, ■ index for positioning the thin film circuit pattern overlaid on the thick film wiring board, ■ quantitative determination of shrinkage rate distribution of the thick film board, ■ detection and estimation of the position of each thick film conductor terminal based on ■■, It is. To accomplish these roles, position detection marks are required at least at three locations, one at the center of the substrate and two at the periphery. If the temperature distribution during firing is not uniform, the substrate will contract in a complicated manner, so more position detection marks will be required, and in some cases, it will also be necessary to use thick film conductor terminals as position detection marks to detect their positions. One end of the connection conductor pad must be connected to the thick film wiring terminal of the thick film substrate, and the other end must be connected to the thin film wiring terminal thereon. To realize this, the positional relationship of the thin film wiring terminals is known from the created thin film pattern, and the position of the thick film wiring terminals on the thick film substrate can be detected by the position detection mark. Based on this, connection conductor pads are formed in the following manner.

(2) Classify the misalignment of the thick film wiring terminal into several types of patterns 2-, prepare a mask corresponding to each pattern, and use this to form connection conductor pads.

(2) Form connection conductor pads corresponding to each individual board and terminal using an electron beam drawing method based on the positions of the thick film wiring terminals and the thin film wiring.

(2) Based on the positions of the thick-film wiring terminals and the thin-film wiring, a dot printer is used to form connection conductor pads for each individual board and terminal.

In addition, by forming the connection conductor pad with at least one metal selected from silver/palladium, platinum, copper, aluminum, gold, nickel, chromium, tungsten, and molybdenum, it is possible to It is compatible with silver/palladium, platinum, copper, tungsten, molybdenum, and gold, which are used as conductor materials, and with copper, gold, and aluminum, which are used as conductor materials for thin-film wiring circuits, and can ensure a long life (thickness). It is possible to realize a hybrid multilayer wiring board (film/thin film).

The above also applies to electrical connections between the glabella within the thin film layer. In particular, if the shrinkage rate of the thick film substrate varies greatly and cannot be absorbed entirely by one layer, the variation can be absorbed by dividing into several layers.

〔Example〕

(Example 1) Hereinafter, the present invention will be specifically explained using an example shown in FIG.

FIG. 1 is a diagram illustrating a structure in which a thin film wiring section 20 is formed on a ceramic wiring board 10 via a matching layer 30, and an LSI 40 is further mounted thereon.

The ceramic wiring board 10 includes an alumina substrate 11 consisting of five layers, on each alumina substrate 11 an inner layer conductor 12 and an alignment mark 15 are printed on the surface with tungsten paste, and the individual alumina substrates 11 are laminated. It is made by post-sintering. In this ceramic wiring board 10, there is a via hole (also known as a through hole).
13 is formed. The via holes 13 are formed by filling tungsten paste into through holes made to penetrate through each alumina substrate 11 and then sintering them. In addition, in front of the board 10,
A land 14 is formed to cover the via hole 13 exposed therefrom.

In addition, on the surface of the ceramic wiring board 10, on the bottom surface of the thin film circuit, there are via portions 13 exposed from the ceramic wiring board.
A connection conductor pad 31 is formed to electrically connect to. The shape of this connection conductor pad 31 is circular in the center;
Other than that, it has a band shape with semicircular ends, and its maximum width is 300 μm.

Note that the dimensions of the substrate 10 are 100 mm square, and the via holes have a diameter of about 100 μm and are formed at a pitch of about 450 μm.

The connection conductor pad 31 is formed as follows.

(1) Based on the sintering shrinkage data of the board prototyped in advance, clarify the positional relationship between the via holes 13 and alignment marks 15 on the surface of the ceramic wiring board by standard sintering and shrinking. Furthermore, a thin film circuit with via holes corresponding to the positions of the via holes on the surface of the ceramic wiring board formed by standard sintering and shrinkage is designed, and a mask etc. for the first lithography is prepared.

(2) The ceramic multilayer wiring board 10 is created using conventional thick film multilayer wiring and lamination technology.

(3) The positions of the alignment marks 15 placed at a total of five locations in the center and peripheral areas of the surface of the ceramic multilayer wiring board 10 are detected using a pattern recognition technique of a secondary electron image of an electron beam. Change the shape of the alignment mark from Figures 4 to 6.
Shown in the series. FIG. 4 shows that there are alignment marks at the center and four corners of the circuit wiring section. FIG. 5 shows in detail the alignment marks on the upper left of the board as representative of the four corners of the circuit wiring section. FIG. 6 shows in detail the alignment mark at the center of the circuit wiring section. In both Figures 5 and 6, the circles represent via holes on the surface of the thick film substrate.

(4) The position of the alignment mark 15 of the ceramic wiring board by standard sintering and shrinkage performed in step (1),
Depending on the deviation of the position detection result in (3), the via hole position on the surface of the ceramic wiring board is estimated using a linear approximation method using a computer.

(5) Calculate the planar positional relationship between the estimated via hole position on the surface of the ceramic wiring board and the via hole in the thin film circuit that is electrically connected to it, and find the center of the via hole in each corresponding ceramic board and thin film circuit. A virtual straight line is drawn to connect the two, and a virtual curve is drawn at a position 150 μm away from this virtual straight line.

(6) Form a copper film that will become a connection conductor pad having an outer shape of this imaginary curve. The method of film formation is: ■ Form a copper film with a thickness of about 2 μm by sputtering method. ■ Form a copper film on the copper film that is sensitive to electron beams, polymerize and harden by irradiation with the electron beam, and then develop it. Applying a negative type resist resin that does not dissolve; ■ Selectively irradiating an electron beam onto the resist resin on the copper conductor that will become the connection conductor pad 31; ■ Creating a resist that is not irradiated with an electron beam by developing and rinsing operations. Remove the resin; 1. Remove the copper not covered by the resist resin using a copper etching solution such as nitric acid; 2. Remove the resist resin covering the retina.

(7) The remaining copper film is heat-treated to form a connection conductor pad 31 densely and firmly adhered to the ceramic substrate.

(8) The thin film circuit 20 to be formed on the matching layer 30 is a four-layer thin film circuit formed using ordinary thin film technology, using polyimide resin as the insulating layer 21 and electrical conductor as the conductor 22. As a result, a thick/thin film hybrid multilayer wiring board is completed.

The 16th series from FIG. 7 outlines the steps for forming via holes and thin film circuits on the surface of a thick film substrate.

That is, FIG. 7.8 shows via holes on the surface of a thick film substrate. FIG. 7 is a plan view, and FIG. 8 is a sectional view of the via hole portion. FIG. 9.10 shows a matching layer formed on a thick film substrate. A strip-shaped connection conductor pad is formed above the via hole, and FIG. 9 shows a plan view and FIG. 10 shows a cross-sectional view. Figures 11 and 12 are diagrams in which an aluminum layer is formed on the matching layer, which is used when battering the insulating layers of the thin film circuit. Figure 11 is a plan view, Figure 12
The figure shows a cross-sectional view. Figures 13 and 14 are diagrams with the upper aluminum film removed and through holes made by dry etching in the via hole portions of the insulating layer of the thin film circuit. 1st
3 shows a plan view, and FIG. 14 shows a sectional view. Chapter 15.16
The figure shows via holes and wiring formed in an insulating layer in a thin film circuit. FIG. 15 shows a plan view, and FIG. 16 shows a sectional view.

(9) Furthermore, the module is completed by connecting the LSI 40 to the pad 23 formed on the top of the thin film circuit of the thick film/thin film hybrid multilayer board using solder made of tin and lead.

(Example 2) Similar to Example 1, using the green sheet method, an outer diameter of 10
A three-layer alumina substrate having a size of 0 mm square was formed. Via holes made of tungsten conductor and having a diameter of 70 μm are formed at a pitch of about 450 μm in the uppermost layer of the substrate.

The method of forming the connection conductor pads is the same as in Example 1.

However, the shape of the conductor pad other than the circle in the center = 19- is a planar dumbbell shape, and the maximum width of the conductor pad is 150 mm.
It is μm. The thin film circuit has two layers, and the entire board is almost the same as that in FIG. 1, although the calendar numbers are different.

(Example 3) Using molybdenum as a conductor and adopting the same green sheet method as in Example 1, a three-layer,
An alumina substrate was formed. The top layer of the substrate has a molybdenum conductor with a diameter of 1. ．． Approximately 45 50μm via holes
It is formed at a pitch of 0 μm.

Position detection marks on the surface of the substrate were placed at three locations, one at the center of the substrate and one at both ends. The maximum width of the connection conductor pad shape is 500μ.
It has an elliptical shape of m. The manufacturing process is the same as in Example 1. A schematic diagram of the matching layer section is shown in Figure 17.18. FIG. 17 is a plan view, and FIG. 18 is a sectional view.

(Example 4) Similar to Example 1, using the green sheet method, an outer diameter of 10
A 5-layer mullite substrate of 0 mm square was formed. Via holes made of tungsten conductor and having a diameter of 70 .mu.m are formed in the uppermost layer of the substrate at a pitch of about 450 .mu.m.

The method of forming the connection conductor pads is the same as in Example 1.

However, the material of the conductive pad is aluminum, and its maximum width is 150 μm. Also, the thin film circuit has 4 layers,
The same manufacturing method as in Example 1 was used except that aluminum was used as the conductor material.

(Example 5) Similar to Example 1, using the green sheet method,
A 5-layer mullite substrate of 0 mm square was formed. The diameter of the via hole for signal wiring on this board is 100 μm.

The connection conductor pad 31 is formed as follows.

(1) In advance, clarify the positional relationship between the via hole 13 and the alignment mark 15 on the surface of the ceramic wiring board by standard sintering and shrinkage calculated based on the sintering shrinkage data of the prototype board. Furthermore, via holes in the thin film circuit in contact with the matching layer are designed in correspondence with the via holes in the standard sintered and shrunk ceramic wiring board, and a photolithography mask and the like are prepared.

(2) The ceramic multilayer wiring board 10 is created using conventional thick film multilayer wiring and lamination technology.

(3) Before forming the connection conductor pad of the matching layer, the positions of the five alignment marks 15 in the center and the periphery and all the via holes are determined using the pattern recognition technology of the secondary electron image of the electron beam. To detect.

(4) The detected positions of all the via holes on the surface of the thick film substrate and the positions of all the via holes of the thin film circuit of (1), which are superimposed thereon with the alignment mark as a reference, are generally out of sync. Assuming that the thin film circuit (1) is stacked on a thick film substrate, set the X direction (horizontal direction) and Y direction (vertical direction) of the substrate, and draw an imaginary line passing through the center of the via hole on the surface of the thick film substrate. Draw in the X direction, and draw an imaginary line in the Y direction that passes through the center of the via hole on the bottom of the thin film circuit that connects to this via hole.
The position of the intersection of the virtual lines of Y is determined for each via hole using a computer.

(5) Set an imaginary line in the X direction that jumps to the center position of each via hole on the thick film substrate, and 150 μm from this imaginary line in the X direction.
A rectangle surrounded by two parallel lines separated from each other and parallel lines that are perpendicular to these lines and pass through points extrapolated by 150 μm on both sides of the virtual line in the X direction is determined.

(6,) The rectangular body obtained in (5) is formed on a thick film substrate using a copper material. This becomes the connection conductor pad. The method of forming the conductor pads is the same as in Example 1.

(7) Polyimide resin is applied and fired on the thick film substrate including the connection conductor pads to form an insulating layer with a thickness of 5 μm.

(8) An aluminum film having a thickness of 1 μm is formed on the entire surface of the insulating layer of (7) using a vapor deposition method.

(9) Apply a negative type resist resin sensitive to electron beams to the entire surface of the aluminum film and harden it.

(10) In the cured resist resin, an electron beam is selectively irradiated onto a portion outside of sunlight with a diameter of 100 μm centered on the intersection of the virtual lines of X and Y.

23- (11) Remove the resist resin that is not irradiated with the electron beam by developing and rinsing.

(12) Using an etching solution consisting of phosphoric acid, nitric acid, etc., remove the aluminum film in the portions not covered with the resist.

(13) Using a resist stripping solution, remove the resist resin covering the aluminum film.

(14) The polyimide resin film not covered with the aluminum film is removed by directional dry etching technology using oxygen gas.

(15) Using the etching solution of (12), remove the aluminum film on the polyimide resin.

(16) By electroless copper plating, copper via holes are formed in the holes in the polyimide resin film removed by dry etching.

(17) Copper is formed to a thickness of 2 μm on the polyimide resin film in which the copper via hole is formed by sputtering technology.

(18) Sensitivity to electron beams over the entire surface of the retina 24- Apply negative type resist resin and resin and harden.

(19) Set an imaginary line in the Y direction connecting the center position of the via hole at the top of the thin film circuit and the corresponding intersection of the imaginary line obtained in (4). Determine a rectangle surrounded by parallel lines of the book and parallel lines that are perpendicular to the book and pass through points extrapolated by 150 μm to both sides of the virtual line in the Y direction.

(20) In the same way as above, selective irradiation with electron beam, development and
The rectangular connection conductor pad obtained in (19) is formed on the polyimide resin film by rinsing and copper etching.

(21) The thin film circuit 20 formed on the insulating layer 21
The conductor 22 is made of polyimide resin and the conductor 22 is made of copper using an ordinary thin film technique. In this manner, a thick-film-thin-film hybrid multilayer wiring board is produced.

The situation near the matching layer is shown in Figure 19.20. FIG. 19 is a plan view, and FIG. 20 is a sectional view.

(22) Furthermore, the module is completed by connecting the LSI 40 to the pad 23 formed on the top of the thin film circuit of the thick film/thin film hybrid multilayer board using solder or the like.

(Example 6) In the same manner as in Example 1, one matching layer was formed on a five-layer thick film circuit board with an outer diameter of 100 mm square, and further four layers of thin film circuits were formed on the matching layer. The difference from Example 1 in manufacturing the substrate is the method of detecting position detection marks on the surface of the thick film substrate. That is, in this method, a thick film substrate is set on a two-dimensional coordinate measuring table, and the coordinates of the position detection mark are automatically detected from a pattern on a TV monitor through an optical microscope. The method of inputting the coordinates of this position detection mark into a computer and forming the connection conductor pads of the bonding layer based on the coordinates is the same as in the first embodiment.

(Example 7) As in Example 3, one matching layer was formed on a five-layer thick film circuit board with an outer diameter of 70 mm square, and a four-layer thin film circuit was further formed on top of the matching layer. The manufacturing method of the substrate differs from Example 3 in two points: the method of detecting position detection marks on the surface of the thick film substrate and the method of forming connection conductor pads on the matching layer. That is, in order to detect the position detection mark on the surface of the thick film substrate, the thick film substrate is set on a two-dimensional coordinate measuring table as in Example 6, and T is measured through an optical microscope.
This method automatically detects the coordinates of a position detection mark from a pattern on a V monitor. The method of inputting the coordinates of this position detection mark into a computer and forming the connection conductor pads of the bonding layer based on the coordinates is the same as in the first embodiment. Further, the connection conductor pads of the matching layer were formed by a thick film printing method using a dot printer.

Silver/palladium was used as the conductor material, the shape of the conductor pad was elliptical as in Example 3, and the maximum width was 50 mm.
It is 0 μm.

[Effects of the Invention] The structure of this embodiment provides the following effects.

First, even if the shrinkage rate of each ceramic or glass-ceramic substrate varies, the connection conductor can be formed by patterning the connection conductor pad in consideration of the connection position with the thin film circuit formed on top of it. The problem with ceramics and 7- is that poor connection between the glass-ceramic circuit and the thin film circuit formed thereon can be prevented.

Second, the shape of the connecting conductor was conventionally 1000 μm in diameter.
By reducing the width to 500 μm or less, it has become possible to increase the density of conductor wiring and also to implement high-density mounting of substrates and modules.

[Brief explanation of drawings]

1 is a diagram showing a thick film/thin film hybrid multilayer board/module consisting of a ceramic wiring board, a matching layer, a thin film circuit, and an LSI; FIG. 2 is a diagram showing an example of a conventional thick film/thin film hybrid multilayer board; Fig. 3 shows an example of a conventional thick film/thin film hybrid multilayer board, Fig. 4 shows alignment marks on the manufactured thick film board, and Fig. 5 shows the upper left corner of the four corners in Fig. 4. FIG. 6 is an enlarged view of the alignment mark in FIG. 4, and FIG. 7 is an enlarged view of the center alignment mark in FIG.
FIG. 8 is a diagram showing a cross-sectional view of the thick film substrate surface in Example 1. FIG. 9 is a diagram showing a plan view of the thick film substrate surface in Example 1. FIG. 10 is a diagram showing a plan view when a matching layer is formed on the surface of the thick film substrate in Example 1. FIG. , a diagram showing a plan view when an insulating layer and an aluminum film for patterning were formed on the surface of the matching layer in Example 1, and FIG. 13 is a diagram showing a cross-sectional view when the film is formed, FIG. 13 is a diagram showing a plan view when through holes are processed in the insulating layer of the thin film circuit in Example 1, and FIG. FIG. 15 is a diagram showing a cross-sectional view when through-holes are formed in the insulating layer of the thin film circuit in Example 1. FIG. 16 is a diagram showing a plan view when via holes and wiring are formed in the thin film circuit in Example 1. 17 is a cross-sectional view when via holes and wiring of a thin film circuit are formed in Example 1, and FIG. 17 is a plan view when via holes and wiring of a thin film circuit are formed in Example 3. FIG. 18 is a cross-sectional view when via holes and wiring for a thin film circuit are formed in Example 3, and FIG. 19 is a cross-sectional view when via holes and wiring for a thin film circuit are formed in Example 5. FIG. 20 is a diagram showing a cross-sectional view when via holes and wiring of a thin film circuit are formed in Example 5. (Explanation of symbols) 10... Ceramic wiring board, 11... Alumina substrate, 12... Inner layer conductor, 13... Via hole, 14
...Land, 15...Positioning mark, 20...
・Thin film circuit section, 21... Insulating layer, 22... Thin film conductor, 23... Pad for soldering 30... Matching layer, 31
...Connection conductor pad, 40...LSI 31- Collection 17 Fig. 8 Fig. q Fig. 0 Fig.

Claims (12)

[Claims] 1. In a thick film thin film hybrid multilayer wiring board consisting of a thick film wiring board and a thin film wiring board, a matching layer is provided for electrically connecting circuit terminals of the thick film wiring board and circuit terminals of the thin film wiring board. A thick/thin film hybrid multilayer wiring board featuring: 2. 2. The thick-thin film hybrid multilayer wiring board according to claim 1, wherein the matching layer comprises an insulating layer and a conductor pad. 3. 2. The thick film/thin film hybrid multilayer wiring board according to claim 1, wherein the diameter of the via hole of the signal wiring in the thick film wiring board is 150 μm or less. 4. 2. The thick film/thin film hybrid multilayer wiring board according to claim 1, wherein the width of the elliptical or strip-shaped connection conductor pad in the matching layer of the thick film wiring board is 500 μm or less. 5. 2. The thick film/thin film hybrid multilayer wiring board according to claim 1, wherein three or more position detection marks are formed on the surface of the thick film wiring board. 6. 2. The thick film/thin film hybrid multilayer wiring board according to claim 1, wherein the position detection mark is replaced by a thick film wiring terminal exposed on the thin film side surface of the thick film wiring board. 7. 7. The thick film/thin film hybrid multilayer wiring board according to claim 6, wherein at least one of the thick film wiring terminals is formed of a different shape or material from other thick film wiring terminals. 8. The via hole position or position detection mark on the surface of the thick film substrate is detected from the signals of secondary electrons of the electron beam, reflected electrons, etc., and the via hole is detected from the relationship between this result and the via hole in the thin film circuit connected to the thick film circuit. 2. The thick film/thin film hybrid multilayer wiring board according to claim 1, wherein the position and shape of the connecting conductor pads connecting the gaps are determined, and the connecting conductor pads are patterned using an electron beam lithography method. 9. The via hole position or position detection mark on the surface of the thick film substrate is detected from the optical image, and from this result and the positional relationship of the via hole in the thin film circuit connected to the thick film circuit, the position and shape of the connecting conductor pad connecting the via holes is determined. 2. The thick film/thin film hybrid multilayer wiring board according to claim 1, wherein the connecting conductor pad is patterned and formed using the determined pattern using an electron beam lithography method. 10. The via hole position or position detection mark on the surface of the thick film substrate is detected from the optical image, and from this result and the positional relationship of the via hole in the thin film circuit connected to the thick film circuit, the position and shape of the connecting conductor pad connecting the via holes is determined. 2. The thick film/thin film hybrid multilayer wiring board according to claim 1, wherein the connection conductor pad is patterned and formed using a printing method using a dot printer. 11. Connection conductor pads include silver/palladium, platinum, copper, aluminum, gold, nickel, chromium, tungsten,
2. The thick film/thin film hybrid multilayer wiring board according to claim 1, wherein the thick film/thin film hybrid multilayer wiring board is made of at least one metal selected from molybdenum. 12. A module characterized in that an LSI is mounted on the thick-film-thin-film hybrid multilayer substrate according to claims 1 to 11.