JPH0298118A - Wafer alignment - Google Patents

Abstract

PURPOSE:To enable the alignment with high precision to be made by a method wherein the reduction magnification is corrected by using the previously measured scaling factor value of magnification errors due to the expansion and contraction of a wafer as the reduction magnification correcting value of the optical system of a demagnification lens. CONSTITUTION:The scaling factor value whose magnification error due to the expansion and contraction of a wafer 5 caused in the formation of various films by thermal diffusion is previously measured is calculated. That is, the alignment mark positions previously inputted and the alignment marks in alignment process of non-resist coated wafers are measured at several points in multiple wafers. The reduction magnifications are corrected using the scaling factor calculated by the measured value as the magnification correcting factor. Through these procedures, the reduction magnification of the optical system 1 of a demagnification lens 3 can be corrected so that the alignment with high precision may be made on the whole shot surface without making any magnification errors at all.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to alignment of a wafer and a mask in a photolithography process in semiconductor device manufacturing.
It is related to.

(Prior Art) Conventionally, in order to align a mask and a wafer in a reduction projection exposure apparatus, an alignment mark is formed on the wafer in a previous process for each exposure shot (chip).
In order to eliminate scaling errors caused by thermal diffusion during semiconductor device manufacturing and wafer expansion/contraction and distortion that occur during the formation of various films, the wafer alignment mark is A new shot array grid is formed by the scaling factor measured at several points.

FIG. 3 is a diagram showing an example of expanding and contracting an alignment mark outward from the center of a wafer using such a conventional method.

In this figure, O indicates the alignment mark position in the alignment mark forming layer, * indicates the alignment mark position after wafer expansion/contraction, and arrows indicate the amount of expansion/contraction of the alignment mark position.

FIG. 4 is a diagram showing an example of measuring the scaling factor at two points within the wafer. In this diagram, ○ indicates the alignment mark position input in advance, . indicates the alignment mark position on the wafer without resist coating,
[Stock] indicates the alignment mark position for measuring the scaling factor. Here, a indicates the distance between two coordinate points input in advance, and b indicates the distance between two coordinate points of the alignment mark on the substrate. This a is determined from the step size input in advance, and the distance between two points from the position of the alignment mark measured on the actual wafer is measured, and b/a is used as a scaling factor. Also, regarding reduction magnification control,
The projection magnification is controlled to be constant regardless of changes due to atmospheric pressure, etc.

(Problem to be Solved by the Invention) However, in the conventional method described above, the reduction ratio is kept constant, so if the wafer expands or contracts outward, the fifth
In the shot of 15 crane size shown in the figure, even if the scaling correction is accurate and the alignment is performed with respect to the shot center, and there is no error at the shot center 01, the underlying shot has expanded or contracted by ΔL due to the expansion or contraction of the wafer, so the shot corner 02 An error ΔL/2 occurs.

In Fig. 5, ○ indicates the alignment mark position on the input grid, ・ indicates the alignment mark position after wafer expansion/contraction, + indicates the shot center (error 0), and mouth indicates the shot corner (error ΔL/2). .

SUMMARY OF THE INVENTION An object of the present invention is to provide a wafer alignment method that eliminates the above-mentioned problem of alignment errors caused by changes in the magnification of the base shot due to expansion and contraction of the wafer, and allows highly accurate alignment.

(Means for Solving the Problems) In order to solve the above problems, the present invention provides a method for aligning a wafer and a mask using a reduction projection exposure apparatus in a photolithography process in semiconductor device manufacturing.
The reduction magnification correction is performed by using the value of the scaling factor, which is obtained by measuring the magnification error due to the expansion and contraction of the wafer during thermal diffusion and the formation of various thin films, as a correction value for the reduction magnification of the optical system of the reduction lens.

(Function) According to the present invention, as described above, by correcting the reduction magnification by correcting the atmospheric pressure of the lens for the expansion and contraction of the wafer before alignment, magnification errors are eliminated and high precision is achieved over the entire shot. alignment can be performed.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic configuration diagram of a wafer alignment system showing an embodiment of the present invention.

In this figure, 1 is the illumination system, 2 is the original image (reticle),
3 is a reduction lens, 4 is an X-Y moving table, and 5 is a wafer placed on the X-Y moving table.

Therefore, first, the value of the scaling factor is calculated by measuring in advance the magnification error due to the expansion and contraction of the wafer 5 that occurs during thermal diffusion and various thin film formations, and this value is used as a correction value for the reduction magnification of the optical system of the reduction lens. Performs reduction magnification correction for the optical system.

In other words, the scaling obtained from the pre-input alignment mark position value and the values measured at several points on several wafers for the alignment mark in the process of aligning wafers without resist coating. Reduction magnification correction is performed using the factor as a magnification correction factor.

For example, the reduction magnification may be corrected by controlling the air pressure within the projection lens to change the refractive index of the air, or by other methods.

In this way, since the reduction magnification correction of the optical system of the reduction lens is performed in accordance with the value of the scaling factor, there is no magnification error, and highly accurate alignment can be performed over the entire shot.

Figure 2 shows the results of applying the present invention. In this figure, . is the alignment mark position after wafer expansion and contraction, the opening is the alignment mark position on the mask, and Δ is the alignment performed after magnification correction. The rear alignment mark position, +, is the center of Shosoto.

As shown in this figure, alignment mark position 11 after wafer expansion and contraction due to wafer expansion and contraction and alignment mark position 12 on the mask did not match, but by performing reduction magnification correction, that magnification error was removed. ,
Alignment mark position 13 after alignment
As shown in , it is possible to perform highly accurate alignment.

Note that the present invention is not limited to the above embodiments,
Various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

(Effects of the Invention) As described in detail above, according to the present invention, the alignment error caused by the change in magnification of the base shot due to expansion and contraction of the wafer is calculated using the same value as the measured scaling factor. Since exposure is performed after correcting the reduction magnification, it is possible to solve the problem of alignment errors caused by magnification errors in the base shot due to expansion and contraction of the wafer, and to perform highly accurate alignment.

[Brief explanation of the drawing]

Fig. 1 is a schematic configuration diagram of a wafer alignment system showing an embodiment of the present invention, Fig. 2 is a diagram showing the state of wafer alignment when the present invention is applied, and Fig. 3 is a diagram showing the state of wafer alignment when the present invention is applied. FIG. 4 is a diagram showing an example of measuring the scaling factor at two points within a wafer, and FIG. 5 is a diagram showing an example of alignment error due to expansion/contraction within a shot. 1...Lighting system, 2...Original picture (reticle), 3...
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Claims (1)

[Claims] In a method for aligning a wafer and a mask using a reduction projection exposure apparatus in a photolithography process in semiconductor device manufacturing, a scaling factor is obtained by measuring in advance a magnification error due to expansion and contraction of a wafer that occurs during thermal diffusion and various thin film formations. A wafer alignment method characterized by performing reduction magnification correction using the value of as a correction value for the reduction magnification of an optical system of a reduction lens.