JPH0296859A - Bus trace display - Google Patents

Abstract

PURPOSE:To display a bus trace in a form easy to read by using a microprocessor for read, and reading the contents of a bus memory through connector, and simultaneously, outputting said contents to a printer. CONSTITUTION:In the case where the contents of the bus trace memory 3 from the time of the occurrence of abnormality are outputted and displayed a bus trace outputting device 9 and a bus trace card 12 are connected by connecting the connectors 10, 10 each other, and a read/write selecting part 6 connects the address line of the bus trace memory 3 and a reading part 13. Then, the microprocessor 7 for read reads the contents of the memory 3 through the reading part 13 and the connectors 10, 10, and prints and outputs said data by a printer 8 through a printer interface part 14. Thus, the bus trace can be displayed in the form easy to read.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bus trace display device that reads and displays operation history information of a microprocessor from a bus trace memory in which it is stored.

[Conventional technology]

FIG. 2 is a block connection diagram showing a conventional bus trace display device. In the figure, 1 is a microprocessor (hereinafter referred to as CPU), and 2 is a memory card, which is another card (not shown) in which the CPU 1 is.

A bus for accessing process input/output cards; 3 is a bus trace memory that stores information such as addresses when CPU 1 accesses other cards via bus 2; 4 is a bus trace memory for displaying the contents of bus trace memory 3; A light emitting diode (hereinafter referred to as LED), 5 is a switch for setting the bus trace memory address to be displayed on LED 4, 6 is a read/write selection section, and 11 is a CPU.
1 is a CPU card installed, and 12 is a bus trace card on which a bus trace circuit is mounted.

Next, the operation will be explained. Operation history information such as addresses when the CPU 1 accesses other cards via the bus 2 is stored in the bus trace memory 3 according to the write mode setting by the read/write selection section 6. Further, when an abnormality occurs, writing to the bus trace memory 3 is prohibited.

On the other hand, in order to display the contents of the bus trace memory 3, the read mode setting by the read/write selector 6 connects the line of the read address designation switch 5 and the address line of the bus trace memory 3. continue,
By setting the read address designation switch 5 to the scale at any point in time, the contents of the bus trace memory 3 at the point in time are
Displayed in binary number on ED4.

[Problem to be solved by the invention]

Since the conventional bus trace display device is configured as described above, it is necessary to provide the LED 4 for displaying the bus trace and the read address designation switch 5 in the bus trace card 12, and also for displaying address information. Since it is expressed as a binary number, there are problems such as having to read it with an LED and convert it to the required hexadecimal number.

Incidentally, as an approximation technique, there is Japanese Patent Application Laid-Open No. 146514/1983.

This invention was made in order to solve the above-mentioned problems.The readout section and display section of the bus trace memory are externally attached, and they can be attached only when necessary using a connector, and the buttons and display are made easy to read. The object of the present invention is to obtain a bus trace display device capable of displaying, for example, hexadecimal numbers.

[Means to solve the problem]

A bus trace display device according to the present invention uses a reading microprocessor to read the contents of a bus trace memory via a connector, and outputs the contents to a printer.

[For production]

The reading microprocessor of the present invention reads memory contents from a bus trace memory on a bus trace card connected by a removable connector so that the memory contents can be displayed in an easily readable form on an external printer.

[Embodiments of the invention]

An embodiment of the present invention will be explained below. 1st
In the figure, 7 is a reading microprocessor, 8
9 is the printer, and 9 is the reading microprocessor 7.
, printer8. The bus trace output device includes a readout section 13 and a printer interface section 14 as one unit, and 10 is a connector for connecting the bus trace output device 9 and the bus trace cart 12. Note that other blocks that are the same as those shown in FIG. 2 are designated by the same reference numerals, and redundant explanation thereof will be omitted.

Next, the operation will be explained. First, when outputting and displaying the contents of the bus trace memory 3 from the time of the abnormality occurrence,
The bus trace output device 9 and the bus trace card 12,
Connect the connectors 10.10 together. By connecting the bus trace output device 9 in this manner, the read/write selection unit 6 connects the address line of the bus trace memory 3 and the read unit 13. As a result, the reading microprocessor 7 reads out the contents of the bus trace memory 3 via the reading section 13 and the connector 10. Print out by.

Although the printer 8 was used for display in the above embodiment, a 7-segment fluorescent display tube was used.

A CRT display, plasma display, or the like may be installed in parallel.

〔Effect of the invention〕

As described above, according to the present invention, since the reading microprocessor and printer are externally attached to the bus trace memory, LEDs for displaying bus traces that are not normally used can be installed in the normally operating system. Not only does it not need to be provided on the race card, but by using a printer, it can be printed in an easy-to-read format and can be kept as a record.

[Brief explanation of drawings]

FIG. 1 is a block connection diagram showing a bus trace display device according to an embodiment of the present invention, and FIG. 2 is a block connection diagram showing a conventional bus trace display device. 1 is a microprocessor, 2 is a path, 3 is a bus trace memory, 7 is a read microprocessor, 8 is a printer, and 0 is a connector. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] There is a bus trace memory that stores operation history information such as addresses when the microprocessor accesses other cards via the bus, and the contents of this bus trace memory are read through the connector, and the read contents are sent to an external printer. A bus trace display device equipped with a reading microprocessor for printing out data.