JPH029449U - - Google Patents

Info

Publication number
JPH029449U
JPH029449U JP1988086577U JP8657788U JPH029449U JP H029449 U JPH029449 U JP H029449U JP 1988086577 U JP1988086577 U JP 1988086577U JP 8657788 U JP8657788 U JP 8657788U JP H029449 U JPH029449 U JP H029449U
Authority
JP
Japan
Prior art keywords
island
groove
molded package
cage
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988086577U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988086577U priority Critical patent/JPH029449U/ja
Publication of JPH029449U publication Critical patent/JPH029449U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の実施例を示すモールドパツケ
ージ用アイランドの構成図、第２図はそのアイラ
ンドを有するモールドパツケージの断面図、第３
図は従来のモールドパツケージの断面図、第４図
は従来のモールドパツケージの反り状態を示す断
面図、第５図は従来の補強材を有するモールドパ
ツケージの断面図、第６図及び第７図は従来のモ
ールドパツケージに作用する硬化収縮時の応力の
説明図、第８図は本考案の第２実施例を示すモー
ルドパツケージ用アイランドの構成図、第９図は
本考案の第３実施例を示すモールドパツケージ用
アイランドの構成図である。 １１，２１，３１……アイランド、１５……モ
ールド樹脂、１９，２２，３２……溝。 FIG. 1 is a configuration diagram of an island for a mold package showing an embodiment of the present invention, FIG. 2 is a sectional view of a mold package having the island, and FIG.
The figure is a sectional view of a conventional molded package, FIG. 4 is a sectional view showing a warped state of a conventional molded package, FIG. 5 is a sectional view of a conventional molded package with a reinforcing material, and FIGS. 6 and 7 are An explanatory diagram of the stress acting on a conventional mold package during curing shrinkage, Fig. 8 is a configuration diagram of an island for a mold package showing a second embodiment of the present invention, and Fig. 9 shows a third embodiment of the present invention. FIG. 3 is a configuration diagram of an island for a mold package. 11, 21, 31... Island, 15... Mold resin, 19, 22, 32... Groove.

Claims (1)

【実用新案登録請求の範囲】 (1) モールドパツケージ用アイランドの中心に
対称な模様の溝を具備するモールドパツケージ用
アイランドの構造。 (2) 前記溝はアイランドのプレス加工時に同時
に形成してなる請求項１記載のモールドパツケー
ジ用アイランドの構造。[Claims for Utility Model Registration] (1) A structure of an island for a molded package cage that has a groove with a symmetrical pattern in the center of the island for a molded package cage. (2) The structure of an island for a mold package according to claim 1, wherein the groove is formed simultaneously during press working of the island.
JP1988086577U 1988-07-01 1988-07-01 Pending JPH029449U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988086577U JPH029449U (en) 1988-07-01 1988-07-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988086577U JPH029449U (en) 1988-07-01 1988-07-01

Publications (1)

Publication Number Publication Date
JPH029449U true JPH029449U (en) 1990-01-22

Family

ID=31311215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988086577U Pending JPH029449U (en) 1988-07-01 1988-07-01

Country Status (1)

Country Link
JP (1) JPH029449U (en)

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