JPH0291859A - Recorder - Google Patents
RecorderInfo
- Publication number
- JPH0291859A JPH0291859A JP24334288A JP24334288A JPH0291859A JP H0291859 A JPH0291859 A JP H0291859A JP 24334288 A JP24334288 A JP 24334288A JP 24334288 A JP24334288 A JP 24334288A JP H0291859 A JPH0291859 A JP H0291859A
- Authority
- JP
- Japan
- Prior art keywords
- recording
- digital
- signal processing
- circuit
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 16
- 238000006243 chemical reaction Methods 0.000 description 7
- 230000005236 sound signal Effects 0.000 description 4
- 238000001514 detection method Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、例えばディジタルオーディオチーに関する
。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to, for example, a digital audio system.
この発明は、ディジタルデータを発生するディジタル信
号発生源と、このディジタル信号発生源からのディジタ
ルデータを信号処理して記録する信号処理手段とを備え
た記録装置において、ディジタル信号発生源と信号処理
手段の間にバッファメモリを設け、記録開始と同時にデ
ィジタル信号発生源からのデータをバッファメモリに記
jQし、メカ機構が立ち上ったら順次バッファメモリ内
のディジタルデータを信号処理手段を通してテープ上に
記録するようにすることにより、記録動作を記録開始の
指示と同時に瞬時に行うことができ、記録する情報(音
)の頭切れを防止できるようにしたものである。The present invention provides a recording apparatus including a digital signal generation source that generates digital data, and a signal processing means that processes and records the digital data from the digital signal generation source. A buffer memory is provided in between, and the data from the digital signal generation source is recorded in the buffer memory at the same time as recording starts, and when the mechanical mechanism starts up, the digital data in the buffer memory is sequentially recorded on the tape through the signal processing means. By doing so, the recording operation can be performed instantaneously at the same time as the instruction to start recording is given, and it is possible to prevent the beginning of the recorded information (sound) from being cut off.
従来のDATの如き記録装置は、記録開始と同時にアナ
ログ入力信号をA/D変換してPCMデータとなして、
これをPCM信号処理回路で信号処理を行うようにして
いたが、実際のテープ上への記録は、メカ機構の立ち上
がりを待った後に開始するようにしていた。Conventional recording devices such as DAT convert analog input signals into PCM data at the same time as recording starts.
This signal processing was performed by a PCM signal processing circuit, but the actual recording onto the tape was started after waiting for the mechanical mechanism to start up.
つまり記録開始と同時にドラムを回転させ、ドラムが定
常回転になった所で次にピンチローラを圧着させ、テー
プを送りそこで始めてテープ上への記録を行うようにし
ていた。In other words, the drum was rotated at the same time as recording started, and when the drum reached steady rotation, the pinch roller was next pressed against the drum, and the tape was fed and recording on the tape was started from there.
ところが、上述の如き従来の記録装置の場合、ドラムの
立ち上がりまで約1秒以上、また更にメ機状態からでも
メカ機構の立ち上がり(定速走行)までの時間はかかる
ことになり、記録開始の指示(記録用キーを押したとき
)からの実際のテープ上への記録は遅れていた。従って
記録動作を記録開始の指示と同時に瞬時に行うことがで
きず、記録する情報(音)の頭切れを生じる欠点があっ
た。However, in the case of conventional recording devices such as those mentioned above, it takes about 1 second or more for the drum to start up, and it takes even more time for the mechanical mechanism to start up (constant speed running) even from a mechanical state, so it takes a long time for the drum to start up (constant speed running). The actual recording onto tape from (when the record key was pressed) was delayed. Therefore, the recording operation cannot be performed instantaneously at the same time as the recording start instruction is given, and there is a drawback that the beginning of the recorded information (sound) is cut off.
この発明は斯る点に鑑みてなされたもので、記録開始の
指示と同時に瞬時に記録動作を行うことができる記録装
置を提供するものである。The present invention has been made in view of the above problems, and an object thereof is to provide a recording apparatus that can perform a recording operation instantly at the same time as an instruction to start recording is given.
この発明による記録装置は、ディジタルデータを発生す
るディジタル信号発生源(1〜4.17〜19)と、こ
のディジタル信号発生源(1〜4.17〜19)からの
ディジタルデータを信号処理して記録する信号処理手段
(7〜10)とを備えた記録装置において、ディジタル
信号発生源(1〜4,17〜19)と信号処理手段(7
〜10)の間にバッファメモ1月5)を設け、記録開始
と同時にディジタル信号発生源(1〜4.17〜19)
からのディジタルデータをバッファメモ1月5)に記憶
し、メカ機構が立ち上ったら順次バッファメモ1月5)
内のディジタルデータを信号処理手段(7〜10)を通
してテープ上に記録するように構成している。The recording device according to the present invention includes a digital signal generation source (1 to 4.17 to 19) that generates digital data, and a signal processing of the digital data from this digital signal generation source (1 to 4.17 to 19). In a recording apparatus equipped with signal processing means (7 to 10) for recording, digital signal generation sources (1 to 4, 17 to 19) and signal processing means (7 to 19) are provided.
A buffer memo is provided between January 5) and 10), and the digital signal source (1 to 4, 17 to 19) is set up at the same time as recording starts.
The digital data from January 5) is stored in the buffer memo (January 5), and when the mechanical system starts up, the digital data is stored in the buffer memo (January 5).
The digital data contained in the tape is recorded on the tape through signal processing means (7 to 10).
(作 用)
ディジタル信号発生源(1〜4.17〜19)と信号処
理手段(7〜lO)のPCM信号処理回路(7)との間
にバッファメモ1月5)を設ける。そして、記録開始と
同時にディジタルデータ信号発生源(1〜4.17〜1
9)からのディジタルデータをバッファメモ1月5)に
記憶し、メカ機構が立ち上って安定したら順次バッファ
メモリ(5)内のディジタルデータを読み出して信号処
理手段(7〜10)を通してテープ上に記録する。これ
により、記録動作を記録開始の指示、つまり記録用キー
が押されると同時に行うことができ、音の頭切れを防止
することができる。(Function) A buffer memory (January 5) is provided between the digital signal generation source (1 to 4, 17 to 19) and the PCM signal processing circuit (7) of the signal processing means (7 to 10). At the same time as recording starts, the digital data signal generation source (1 to 4.17 to 1
The digital data from 9) is stored in the buffer memory (January 5), and when the mechanical mechanism starts up and stabilizes, the digital data in the buffer memory (5) is sequentially read out and recorded on the tape through the signal processing means (7 to 10). do. Thereby, the recording operation can be performed simultaneously with the instruction to start recording, that is, when the recording key is pressed, and it is possible to prevent the beginning of the sound from cutting off.
以下、この発明の一実施例を添付図面に基づいて詳しく
説明する。Hereinafter, one embodiment of the present invention will be described in detail based on the accompanying drawings.
図において、(IL)及び(IR)は夫々Lチャンネル
及びRチャンネルのアナログオーディオ信号が供給され
る入力端子であって、入力端子(IL)からのLチャン
ネルのアナログオーディオ信号は可変抵抗器(IL’)
バッファ回路(2L)及びローパスフィルタ(3L)を
通じてA/D変換回路(4L)に供給され、ここでディ
ジタルデータ(PCMデータ)に変換され、同様に入力
端子 (IR)からのRチャンネルのアナログオーディ
オ信号は可変抵抗器(IR’)、バッファ回路(2R)
及びローパスフィルタ(3R)を通してA/D変換回路
(4R)に供給され、ここでディジタルデータ(PCM
データ)に変換される。なお、これ等(IL〜4L)と
(IR〜4R)は一種のディジタル信号発生源を形成す
る。In the figure, (IL) and (IR) are input terminals to which L channel and R channel analog audio signals are supplied, respectively, and the L channel analog audio signal from the input terminal (IL) is connected to a variable resistor (IL). ')
It is supplied to the A/D conversion circuit (4L) through a buffer circuit (2L) and a low-pass filter (3L), where it is converted to digital data (PCM data), and analog audio of the R channel is also output from the input terminal (IR). Signal is variable resistor (IR'), buffer circuit (2R)
and is supplied to the A/D conversion circuit (4R) through the low-pass filter (3R), where the digital data (PCM
data). Note that these (IL-4L) and (IR-4R) form a kind of digital signal generation source.
AID変換回路(4L)及び(4R)で変換されたディ
ジタルデータは一時的にバッファメモリ(5)に記憶さ
れる。そして、中央処理装置(CPU)+61でメカ機
構(図示せず)が立ち上ったことが検出されると、CP
Ut61からの指令によりへソファメモリ(5)に記憶
されているディジタルデータが順次読み出されてPCM
信号処理回路(7)に供給されて、ここでRA M +
81等を使用して変調やインタリーブ或いは誤り検出符
号の付加等の所定の信号処理を受ける。The digital data converted by the AID conversion circuits (4L) and (4R) is temporarily stored in the buffer memory (5). Then, when the central processing unit (CPU) +61 detects that a mechanical mechanism (not shown) has started up, the CPU
The digital data stored in the sofa memory (5) is sequentially read out according to the command from the Ut61, and the PCM
is supplied to the signal processing circuit (7), where RAM +
81, etc., to undergo predetermined signal processing such as modulation, interleaving, and addition of an error detection code.
PCM信号処理回路(7)で信号処理されたPCMデー
タはRFアンプ(9)で増幅されてドラム(10)に取
り付けられた回転ヘッド(図示せず)に供給され、これ
によりテープ(図示せず)上に記録される。The PCM data signal-processed by the PCM signal processing circuit (7) is amplified by the RF amplifier (9) and supplied to a rotating head (not shown) attached to the drum (10). ) recorded above.
一方、回転ヘッドによりテープを走査して得られた再生
信号はRFアンプ(9)で増幅されてPCM信号処理回
路(7)に供給され、ここでRA M +8j等を使用
して復調やデインタリーブ或いは誤り検出や訂正等所定
の1ε号処理を受ける。On the other hand, the reproduced signal obtained by scanning the tape with the rotating head is amplified by the RF amplifier (9) and supplied to the PCM signal processing circuit (7), where it is demodulated and deinterleaved using RAM +8j etc. Alternatively, it undergoes predetermined 1ε processing such as error detection and correction.
PCM信号処理回路(7)で信号処理されたPCMデー
タはディジタルフィルタ(11)を通してA/D変喚回
路(12)に供給され、ここでアナログ信号に変換され
、LチャンネルとRチャンネルのアナログオーディオ信
号に分離される。The PCM data signal-processed by the PCM signal processing circuit (7) is supplied to the A/D conversion circuit (12) through a digital filter (11), where it is converted to an analog signal, and the analog audio of the L channel and R channel is generated. Separated into signals.
分離されたLチャンネルのアナログオーディオ信号はロ
ーパスフィルタ(13L)及び、バッファ回路(14L
)を通して出力端子(15L)に取り出され、一方Rチ
ャンネルのアナログオーディオ信号はローパスフィルタ
(13R)及びバッファ回路(14R)を通して出力端
子(15R)に取り出される。The separated L channel analog audio signal is passed through a low pass filter (13L) and a buffer circuit (14L).
), and the analog audio signal of the R channel is taken out to the output terminal (15R) through a low-pass filter (13R) and a buffer circuit (14R).
なお、(16L)及び(16R)はミューティング時オ
ンとされるスイッチである。また、記録時に記録されて
いる信号をモニタするときは、同図に破線で示す様に、
A/D変換回路(4L)及び(4R)の出力をディジタ
ルフィルタ(11)の入力端に直接供給して聞くように
すればよい。Note that (16L) and (16R) are switches that are turned on during muting. Also, when monitoring the recorded signal during recording, as shown by the broken line in the same figure,
The outputs of the A/D conversion circuits (4L) and (4R) may be directly supplied to the input terminal of the digital filter (11) for listening.
また、(17)はディジタル信号が直接供給される入力
端子であって、この入力端子(17)からのディジタル
信号はバッファ回路(18)及びディジタル110回路
り19)を通して−たんバッファメモリ(5)に記憶さ
れ、CP U (61でメカ機構が立ち上がったことが
検出されるとCP U +6jからの指令によりバッフ
ァメモ1月5)内のディジタルデータが順次読み出され
てPCM信号処理回路(7)に供給され、ここで所定の
信号処理を受ける。そしてRFアンプ(9)で増幅され
た後ドラム(10)の回転ヘッドによりテープ上に記録
される。なお、(17)〜(19)は一種のディジタル
信号発生源を形成する。Further, (17) is an input terminal to which a digital signal is directly supplied, and the digital signal from this input terminal (17) is passed through a buffer circuit (18) and a digital 110 circuit (19) to a buffer memory (5). The digital data in the CPU (when the start-up of the mechanical mechanism is detected in 61, the buffer memo is sent by a command from CPU +6j) is sequentially read out and sent to the PCM signal processing circuit (7). The signal is supplied to the signal processing station, where it undergoes predetermined signal processing. After being amplified by the RF amplifier (9), the signal is recorded on the tape by the rotating head of the drum (10). Note that (17) to (19) form a kind of digital signal generation source.
一方回転ヘッドによりテープを走査して得られた再生信
号はRFアンプ(4)で増幅させてPCM信号処理回路
(7)に供給され、ここで所定の信号処理を受けて、デ
ィジタル110回路(19)、バッフ1回路(20)及
びトランス(21)を介して出力端子(22)に取り出
される。On the other hand, the playback signal obtained by scanning the tape with the rotating head is amplified by the RF amplifier (4) and supplied to the PCM signal processing circuit (7), where it undergoes predetermined signal processing and is converted into a digital 110 circuit (19). ), is taken out to the output terminal (22) via the buffer 1 circuit (20) and the transformer (21).
このようにして本実施例では記録開始と同時にA/D変
換回路(4L)及び(4R)又はディジタル110回路
(19)からのPCMデータをバッファメモリ(5)に
記憶し、メカ機構が立ち上がったら順次バッファメモリ
(5)内のPCMデータをPCMli号処理回路(7)
等を通してテープ上に記録しているので、記録が瞬時に
始められ、実質的にメカ機構の立ち上がりを無視でき、
音の頭切れを防止できる。また、音の立ち上がりを検出
しているいわゆるスター 1−ID信号等のサブコード
を実際より早く記録できる。つまり、PCMデータがバ
ッファメモリに入っている間にサブコードをテープ上に
記録できる。In this way, in this embodiment, PCM data from the A/D conversion circuits (4L) and (4R) or the digital 110 circuit (19) is stored in the buffer memory (5) at the same time as recording starts, and when the mechanical mechanism starts up, the PCM data is stored in the buffer memory (5). The PCM data in the buffer memory (5) is sequentially transferred to the PCMli processing circuit (7).
Since recording is performed on the tape through the
This prevents the beginning of the sound from cutting off. Furthermore, subcodes such as the so-called star 1-ID signal, which detects the rise of a sound, can be recorded earlier than actually. That is, subcodes can be recorded on tape while the PCM data is in the buffer memory.
なお、上述の実施例ではこの発明をDATに適用した場
合であるが、その他オートリバース機能を有するテープ
レコーダ等にも同様に適用可能である。In the above-described embodiment, the present invention is applied to a DAT, but it can be similarly applied to other tape recorders having an auto-reverse function.
上述の如くこの発明によれば、ディジタル信号発生源と
信号処理手段との間にバッファメモリを設け、記録開始
と同時にディジタル信号発生源からのディジタルデータ
をバッファメモリに記憶し、メカ機構が立ち上がったら
順次バッファメモリ内のデータを信号処理手段を通して
テープ上に記録するようにしたので、記録動作を記録開
始の指示と同時に瞬時に行うことができ、記録情報(音
)の頭切れを防止することができる。As described above, according to the present invention, a buffer memory is provided between the digital signal generation source and the signal processing means, and the digital data from the digital signal generation source is stored in the buffer memory at the same time as recording starts, and when the mechanical mechanism starts up, Since the data in the buffer memory is sequentially recorded onto the tape through the signal processing means, the recording operation can be performed instantaneously at the same time as the instruction to start recording, and it is possible to prevent the beginning of the recorded information (sound) from being cut off. can.
添付図面はこの発明の一実施例を示す回路構成図である
。
(IL) 、 (IR) ; (7+は入力端子、(
2L) 、 (2R) 、 (slはバッファ回路、(
3L) 、 (311)はローパスフィルタ、(4L)
、 (411)はA/D変換回路、(5)はバッファ
メモリ、(6)は中央処理装置(CP U) 、+71
はPCM信号処理回路、(8)はRAM、+91はRF
アンプ、はドラム、
(19)はディジタル110回路である。
代
理
人
伊
藤
貞
同
松
隈
秀
盛The accompanying drawing is a circuit diagram showing an embodiment of the present invention. (IL), (IR); (7+ is the input terminal, (
2L), (2R), (sl is a buffer circuit, (
3L), (311) is a low pass filter, (4L)
, (411) is the A/D conversion circuit, (5) is the buffer memory, (6) is the central processing unit (CPU), +71
is PCM signal processing circuit, (8) is RAM, +91 is RF
The amplifier is a drum, and (19) is a digital 110 circuit. Agent Sadado Ito Hidemori Matsukuma
Claims (1)
、該ディジタル信号発生源からのディジタルデータを信
号処理して記録する信号処理手段とを備えた記録装置に
おいて、 上記ディジタル信号発生源と上記信号処理手段の間にバ
ッファメモリを設け、 記録開始と同時に上記ディジタル信号発生源からのディ
ジタルデータを上記バッファメモリに記憶し、 メカ機構が立ち上ったら順次上記バッファメモリ内のデ
ィジタルデータを上記信号処理手段を通してテープ上に
記録するようにしたことを特徴とする記録装置。[Scope of Claims] A recording device comprising a digital signal generation source that generates digital data, and a signal processing means that performs signal processing on the digital data from the digital signal generation source and records the digital signal generation source. A buffer memory is provided between the signal processing means, and the digital data from the digital signal generation source is stored in the buffer memory at the same time as recording starts, and when the mechanical mechanism starts up, the digital data in the buffer memory is sequentially processed by the signal processing. A recording device characterized in that it records on a tape through means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63243342A JP2701365B2 (en) | 1988-09-28 | 1988-09-28 | Recording device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63243342A JP2701365B2 (en) | 1988-09-28 | 1988-09-28 | Recording device |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16392597A Division JPH1055619A (en) | 1997-06-20 | 1997-06-20 | Recording and reproducing device for recording medium |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0291859A true JPH0291859A (en) | 1990-03-30 |
JP2701365B2 JP2701365B2 (en) | 1998-01-21 |
Family
ID=17102399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63243342A Expired - Lifetime JP2701365B2 (en) | 1988-09-28 | 1988-09-28 | Recording device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2701365B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02156474A (en) * | 1988-12-08 | 1990-06-15 | Alpine Electron Inc | Recording method for dat device |
US7934106B2 (en) | 2004-12-27 | 2011-04-26 | Panasonic Corporation | Power control for fast initialization of recording apparatus |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6437963U (en) * | 1987-09-02 | 1989-03-07 |
-
1988
- 1988-09-28 JP JP63243342A patent/JP2701365B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6437963U (en) * | 1987-09-02 | 1989-03-07 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02156474A (en) * | 1988-12-08 | 1990-06-15 | Alpine Electron Inc | Recording method for dat device |
US7934106B2 (en) | 2004-12-27 | 2011-04-26 | Panasonic Corporation | Power control for fast initialization of recording apparatus |
Also Published As
Publication number | Publication date |
---|---|
JP2701365B2 (en) | 1998-01-21 |
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