JPH0287730A - Code error detection circuit - Google Patents

Abstract

PURPOSE:To detect a code error of a voice signal subject to digital conversion by obtaining an average level calculation value of a voice signal subject to digital conversion for a prescribed time and comparing a differential value output of its mean value with an output of an upper/lower limit allowable value generator. CONSTITUTION:An 8-bit voice signal (a) from an input terminal 1 and a clock (b) phase-locked to the voice signal (a) from an input terminal 2 are inputted to an average calculator 3 in which a mean value of levels of the signal (a) for a prescribed time is calculated and the mean value C and a mean value fetch data (f) are outputted to a differential circuit 4. Then the circuit 4 takes a difference of the mean value C on a time axis and outputs a difference alphato a comparator 6. The the comparator 6 outputs it to an output terminal 7 that no signal (a) is in error when the signal is within a predetermined upper and lower limits given by a permissible signal (e) representing the upper limit, lower limit of the predetermined allowable range with respect to a difference 0 outputted from an allowable value generator 5 and there is an error if the signal is at the outside of the range.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a circuit for detecting code errors, and particularly to a code error circuit for detecting code errors in a digital audio signal that is A/D converted and transmitted. This relates to a detection circuit.

[Conventional technology]

Conventionally, as a circuit for detecting code errors in digital audio signals that are A/D converted and transmitted, a parity check circuit that adds a redundant pit for detecting 1-bit errors on the transmitting side and checks it on the receiving side has been used. be.

[Problem to be solved by the invention]

In the conventional parity check circuit described above, in order to detect errors, a circuit for adding redundant bits for error detection and a checking circuit are required, which increases the hardware size. Furthermore, since redundant pits for detecting errors are transmitted, there is a problem in that a correspondingly large amount of transmission capacity is required.

[Means to solve the problem]

The code error detection circuit of the present invention includes an average value calculator that inputs an audio signal converted into a digital signal, calculates and outputs the average value of the level of the audio signal over a predetermined time, and an average value calculator that calculates and outputs the average level of the audio signal over a predetermined time. A difference circuit that receives the output of the calculator as an input and outputs the difference value of the needle position difference on the time axis of the above average value, a tolerance value generator that generates upper and lower limit values of a predetermined tolerance range, and the above difference circuit. and a comparator that compares the difference value from the output from the tolerance generator with the output of the tolerance generator, and compares the difference value with the output of the tolerance generator to detect code errors in the audio signal converted to a digital signal. It is designed to detect.

[For production]

In the present invention, a code error in a digital audio signal that is transmitted after A/D conversion is detected.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In the figure, 1 and 2 are input terminals, 3 is an average value calculator that inputs an audio signal converted into a digital signal, calculates and outputs the average level of the audio signal at a predetermined time, and 4 A difference circuit which takes the output of the average value calculator 3 as input, calculates the difference between the above average values on the time axis, and outputs the difference value, and 5 is a tolerance value that generates the upper and lower limit values of a predetermined tolerance range. 6 is a comparator that compares the difference value from the difference circuit 4 with the output of the tolerance generator 5; 7 is an output terminal.

The difference value from the difference circuit 4 is compared with the output of the tolerance generator 5 to detect a code error in the audio signal converted into a digital signal.

Next, the operation of the embodiment shown in FIG. 1 will be explained.

First, an 8-bit audio signal a from input terminal 1 and a clock b whose phase is synchronized with audio signal a from input terminal 2 are input to average value calculator 3. Calculate the average value of the time levels, and calculate this average value C
and the average value captured data f are output to the difference circuit 4. Then, this difference circuit 4 takes the difference of the average value C on the time axis and outputs the difference value d to the comparator 6.

Next, in the comparator 6, the tolerance signal indicating the upper and lower limits of a predetermined tolerance range is input to the difference value 0 (zero) outputted by the tolerance value generator 5, and the difference value d is inputted to the difference value 0. (zero)
If the audio signal a is within the range of the upper and lower limits given by the allowable signal e, the audio signal a is free of errors, and if it is outside the range, a message is sent to the output terminal T that there is an error υ.

FIG. 2 is a block diagram showing a specific example of the configuration of the average value calculator 3 in FIG. 1.

In FIG. 2, the same reference numerals as in FIG. 1 indicate corresponding parts; 31 is an adder, 32, 33 is a register, and 34 is a pulse generator.

Next, the operation will be explained.

First, the adder 31 adds the audio signal a and the 8-bit data output from the register 32, and adds the 8-bit added data g, with the least significant bit removed, to the register 32 and the register 3.
Output to 3. Then, the pulse generator 34 outputs a clock b
is input, a reset signal is inputted to the register 32, and the average value capture data f is outputted to the register 33 and the difference circuit 4 shown in FIG. 1, respectively.

Next, this register 32 initializes the interval for calculating the average value using the reset signal hK, inputs the clock b, and outputs the addition data g delayed by 1 bit. Then, in the register 33, the average value input data f
Then, the average value C of the average value calculation section of the addition data g output from the adder 31 is taken in and output to the difference circuit 4.

FIG. 3 is a block diagram showing a specific example of the configuration of the differential circuit 4 in FIG. 1.

In FIG. 3, the same reference numerals as in FIG. 1 indicate corresponding parts, 41 is a register, and 42 is a subtracter.

Next, the operation will be explained.

The register 41 inputs the average value C and the average position input data f, and receives the average value delayed data l which is the average value C delayed by 1 bit.
is output to the subtracter 42, which inputs the average value C, calculates the difference with the average value delayed data l, and outputs the difference value d.

FIGS. 4(a) to 4(G) are waveform diagrams showing operation waveforms of each part in FIGS. 2 and 3.

In this Figure 4, (a), 佽), ■, (2))
, (fl, illusion, (i), (d) are each signal and data a, b, h, in FIGS. 2 and 3, respectively.
They correspond to g, f, c, t, and d, respectively. And X,
No. X+1...) (+H indicates an audio signal, and A, B, and C indicate average values.

FIG. 5 is an explanatory diagram showing the relationship between the tolerance signal e output from the tolerance generator 5 in FIG. 1 and the calculated difference value d.

In FIG. 5, the upper and lower limits of the allowable range of the difference value output from the allowable value generator 5 are assumed to be 0+E and OE. E represents a tolerance value. Further, the range between the upper limit and the lower limit is expressed as F. If the difference value d output from the difference circuit 4 is within the range represented by F (the part marked with ■), and if there is no error in the audio signal a and it is outside the range represented by F (the 0 part), then
This means that an error has occurred in the audio signal a.

Generally speaking, if you average the sound level over a long period of time,
It converges to near V and reaches a certain constant level, but if the DC voltage of the audio input to the A/D converter changes due to some influence during the process of converting it into a digital signal, it will not become near Ov. Therefore, the difference value is converged to 0 by taking the difference on the time axis of the level averaged over a long period of time, and if the difference value exceeds the vicinity of 0, it is judged as an error.

Therefore, it is possible to suppress the influence of changes in DC voltage and detect only errors in the digitized audio signal.

〔Effect of the invention〕

As explained above, the present invention has the advantage of being able to detect code errors by adding simple hardware to the receiving section. Furthermore, since there is no need to add redundant bits for error detection, the transmission capacity can be reduced accordingly.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a specific example of the configuration of the average value calculator in FIG. 1, and FIG. 3 is a block diagram showing a specific example of the differential circuit in FIG. A block diagram showing a configuration example, FIG. 4 is a waveform diagram showing the operating waveforms in FIGS. 2 and 3, and FIG. 5 shows the tolerance signal output from the tolerance generator in FIG. 1 and the calculated difference value. It is an explanatory diagram showing the relationship. 3...φ average value calculator, 4-... difference circuit, 5...
... Tolerance generator, 6... Comparator.

Claims (1)

[Claims] an average value calculator that inputs an audio signal converted into a digital signal, calculates and outputs the average value of the level of the audio signal over a predetermined time; A difference circuit that takes a difference between values on a time axis and outputs a difference value, a tolerance value generator that generates upper and lower limit values of a predetermined tolerance range, and a difference value from the difference circuit and the tolerance value generation. and a comparator for comparing the difference value with the output of the tolerance value generator, and detects a code error in the audio signal converted into a digital signal by comparing the difference value and the output of the tolerance value generator. code error detection circuit.