JPH0287189A - Matrix display panel driving circuit - Google Patents

Abstract

PURPOSE:To reduce the rising the falling variation of driving pulses by varying and controlling the value of an inductor or capacitor so that the time constant of the resonance circuit composed of the inductor and floating capacitor is constant. CONSTITUTION:This circuit has plural changeover switches 14 which are each connected to a driving electrode of a matrix display panel 9 at one end and the variable inductor 15 which forms the resonance circuit together with the capacitor of the driving electrode while connected to the other-terminal sides of the parallel connected changeover switches 14, and the value of the variable inductor 15 is controlled matching variation in the composite value of the capacity of the driving electrodes by the switching of the changeover switches 14. Consequently, many driving electrodes connected of the matrix display panel 9 can be driven by a small number of recovery circuits and even if the number of the driving electrodes connected to the recovery circuits varies with time, the rising and falling time of the driving panel can be made constant.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to a drive circuit for a matrix display panel such as a plasma display panel (hereinafter referred to as PDP), and particularly relates to a drive circuit for a matrix display panel such as a plasma display panel (hereinafter referred to as PDP). The present invention relates to an IJ display panel drive circuit suitable for

[Conventional technology]

A matrix display panel is a panel consisting of pixels arranged in a matrix and multiple drive electrodes connected to each pixel.The light emission brightness or transmission of each pixel is adjusted by the drive signal applied to each drive electrode. This is a panel that changes the rate and displays images.

The drive signal applied to the drive electrode is a pulse signal, and brightness is controlled by controlling the width and height of this pulse or the number of pulses applied within a certain period of time.

The most common method of applying such a drive pulse is to use a switch to switch between a plurality of power supply outputs having different voltages to form a drive pulse, and apply the pulse to a load, that is, a drive electrode.

! What is described in Japanese Patent Application Laid-Open No. 58-115986 (,
Insert an inductor L between the output of the drive circuit and the electrode,
A method of driving display pulses using a drive circuit with a power supply voltage lower than the desired pulse voltage, as in JP-A-61-152997, consists of a tank circuit that resonates with the panel capacitance, and reduces electrical energy loss when driving a capacitive load. (There is a method to drive the display panel so that

[Problem to be solved by the invention]

A stray capacitance including the pixel capacitance is attached to the drive electrode of the display panel D, and this stray capacitance is charged and discharged as pulses are applied. Pulse voltage to V.

If the stray capacitance to be charged and discharged is C, then the capacitance C increases with charging.
1 c v2 of electrical energy is stored in the , and this electrical energy is released by means of an electric discharge.

In the method of applying drive pulses by switching the power supply voltage, the power loss during electrical work from the high potential power source to the low potential power source is Cv2. Furthermore, in reality, since there is an effective resistance R in the path of the charging and discharging current, the upper Cv2 is lost due to the resistance in the GEL circuit during charging, and in the end, the loss associated with charging and discharging is CV for each pulse. The power loss associated with this stray capacitance charging and discharging is reactive power that is unnecessary for pulse display.
It is preferable to have as few as possible. However, in the method of switching the power supply voltage, this reactive power is always generated, especially for the applied pulse 1! This reactive power becomes large in EL (electroluminescent panels) and FDPs, which have high power consumption.

Furthermore, as the number of pixels and drive electrodes of the display panel increases due to the increase in size, stray capacitance also increases and reactive power also increases.

As a countermeasure against this, there is a method of inserting an inductor L into each electrode and driving it as shown in Japanese Patent Application Laid-Open No. 58-115985. A driving pulse with a predetermined pulse height is applied to the LCR resonant circuit.The loss in this LCR resonant circuit is smaller as R is smaller (and can be almost ignored by optimal design.The loss at this time is accumulated in stray capacitance. 1!fi is the loss of energy flowing from the high potential side to the low potential side, which is half of the method described above.
1 c v2 per pulse, halving the loss. However, the method disclosed in JP-A-58-115986 requires an inductor to be provided close to each electrode, and if the number of electrodes is large, it will be difficult to put it into practical use.

A known example described in JP-A-61-152997 is LC
A tank circuit is provided to recover the electrical energy accumulated in the floating capacitance, and the reactive power accompanying charging and discharging of the floating capacitance is further reduced compared to the known example of JP-A-58-115986. Moreover, due to multiple driving of the display panel electrodes, the tank circuit described above can be reduced to a small number of circuits, and the number of required front inductors can also be reduced to a small number. Then, the stray capacitance C changes and the resonant frequency of the tank circuit changes.That is, the rising edge of the drive pulse,
The falling edge will change.

It is undesirable that the rising and falling edges of the drive pulse change depending on the screen content. In particular, as the number of drive electrodes increases due to size increase, precision is required in the timing of pulses applied to the row electrodes and the nine column electrodes. In the worst case, it may become impossible to display due to changes in the rise and fall of the pulse.

The present invention provides a drive circuit that applies a drive pulse using a resonant circuit of an inductor L and a drive electrode floating capacitance IC, and that has little change in the rise and fall of the drive pulse even when pulse electrodes are multiplexed. The purpose is to

[Means to solve the charge]

The above object is achieved by variably controlling the value of the inductor L or the capacitance CO so that the time constant of the resonant circuit constituted by the inductor L and the stray capacitance C is constant.

That is, (a) detect the multiplicity of the drive electrodes at the time of applying the drive pulse, and change the value of the inductor L based on the detected data.

(b) Detects the multiplicity of the drive electrodes at the time of applying the drive pulse, connects the stray capacitance based on the detected data, and changes the external capacitance value.

Alternatively, f4 provides an external capacitor having a value equal to the stray capacitance of each electrode in parallel with each electrode, and connects a drive circuit to the external capacitor when a drive electrode is not selected.

In particular, the purpose of the effort is achieved.

[Effect]

In (a) above, the stray capacitance C is calculated based on the multiplicity of the drive electrodes.
changes. Assuming that each electrode has an equal stray capacitance of Co,
On the other hand, the basic value Lo of the inductor is determined so as to satisfy πJLo Co during the rising edge t of the pulse.

If the multiplicity of drive electrodes is r, stray capacitance C = rC.

becomes. At this time, for example, if r inductors of value Lo are connected in parallel, the inductance of the resonant circuit will be yr
V/Le = yrV' LoCo * t, no change.

Furthermore, L'+ 2Lo, 221. If inductors such as , . . . are used, the required number will be further reduced.

Similarly, in (b) above, the capacitance 1irc+e of the resonant circuit can be made constant by changing the external capacitance i#C that is set in parallel with the stray capacitance C. That is, assuming the number of drive electrodes as
Change C so that nco=c+c is always satisfied. At this time, if the value of the inductor is set to L=Lo/n, the rise of the pulse due to resonance will be zv't, (C+C'
) = πJ LoCo middle t, Tonari doesn't change.

Further, even when the f→ is mentioned above, the negative capacitance value of the resonant circuit is always nc.

Therefore, the rise of the pulse due to resonance does not change.

〔Example〕

Examples of the present invention will be described in detail below.

FIG. 1 is a tth memory-type plasma display panel (F) having an auxiliary anode, illustrating a first embodiment of the present invention.
DP) is a block diagram of a drive circuit.

The block diagram shows the input terminal 1, synchronous control circuit 2, A/D memory circuit 3, auxiliary anode pulse generation circuit 4, cathode pulse generation circuit 5, cathode pulse generation circuit 6, auxiliary anode driver 7,
It is composed of a cathode driver 8, a memory type FDP 9, a power recovery circuit 500, and a switch array 14. Among these, memory type PDP q has anode A.

Discharge cells P11 to Pnw having a cathode K and an auxiliary anode 8A
.

It has a structure in which m pieces are arranged in the horizontal direction (horizontal direction) and nine pieces are arranged in the vertical direction (vertical direction). Each of these horizontally lined discharges''w
"P11~P゛-・P21~P2-... Pl, ~
P1, the anode A is drawn out in common, and the driving anode terminals (or electrodes) A+, A2,...An
, It is connected to the. The cathode KFi is drawn out in common,
2. to the driving cathode terminal (or electrode) Kl of the book.・
...Connected to K4. 82. Then, to each discharge cell P++ to Pal and Pl2 arranged in the vertical direction. ..., P
The auxiliary anode SA is commonly drawn out for each P□ to ll, and m driving auxiliary anode terminals (or electrodes) S+, S2 .・・・
- Connected to S-. These driving electrode terminals A1~
A-, +~%, 81~S, anode floating capacity fPr CA I -% Chn, cathode floating capacity i1
Cx+ 4 CK+s, auxiliary anode floating capacitance @ Cs 1
~CB.

is attached. Furthermore, the recovery circuit 50 includes a capacitor 10, switches 11 to 15, a variable inductor 15, and a power supply terminal 100. The t-tree embodiment shown in FIG. 1 is a configuration example in which a recovery circuit is applied to the driving anode terminals A1 to A of a memory type FDP 9.

The circuit operation in the block diagram shown in FIG. 1 is as follows.

A video signal is input to input terminal 1. Based on this input signal, the synchronization control circuit 2 generates synchronization signals necessary for circuit operation of each section.

The A/D memory circuit 5 converts the input signal into a digital signal and stores it in memory. The auxiliary anode circuit 4 generates a signal (auxiliary anode pulse) necessary for driving the auxiliary anode based on the stored human image signal. This auxiliary anode pulse is transmitted via the auxiliary anode driver 7 to the auxiliary anode terminals 81-8. , is applied to , .

In the cathode pulse generation circuit 6, a signal (cathode pulse) necessary for cathode drive is generated based on the signal from the synchronous control circuit 2. This cathode pulse is applied to the cathode terminals 1 to 1 through the cathode driver 8.

The anode pulse generation circuit 5 generates a signal (anode pulse) necessary for anode drive based on the signal from the synchronous control circuit 2. Based on the information of this anode pulse, the recovery circuit 500
The value of the variable inductor 15 constituting the circuit is controlled, and the opening and closing of the switches 11 to 15 and 14 are controlled, and a drive pulse (with the same timing as the anode pulse) is applied to the anode terminal A1-8%.

As described above, three types of signals are required to drive the memory type PDP 9 in the first embodiment: an auxiliary anode pulse, a cathode pulse, and an anode pulse.

These timing relationships will be explained using the timing chart shown in FIG.

The cathode pulse Kp in FIG. 2 is a companion pulse for vertically scanning the memory type PDP 9. A pulse kO of 1 is applied to the cathode terminal, and this pulse &0 is applied to the cathode terminal 2.for example every horizontal period. One cycle of vertical scanning (subfield scanning) is performed by applying the signals to KM, . . . . FIG. 2 further shows that in addition to the scanning by the pulse ko,
, kx, ks to perform vertical scanning (subfield scanning). In this way, one field of an ordinary television screen is composed of a plurality of subfield screens obtained by performing a plurality of vertical scans. Note that by applying this cathode pulse, an auxiliary discharge is generated between the cathode and auxiliary anode (between K-8A) of discharge cells P++ to P□, but this auxiliary discharge cannot be observed from outside the memory type FDP 9. .

The auxiliary anode pulse 8F is the tth one for horizontally scanning the memory type PDP 9, and is applied in synchronization with the timing of the cathode pulse Kp. For example, if the input image signal is B b
It is assumed that the A/D conversion is performed at t and the information is stored in the A/D memory circuit 5. In accordance with the vertical scanning by the pulse ko of the cathode pulse Kp, an auxiliary anode pulse SP is sent to the auxiliary anode terminal 81 based on the lower bit information of the A/D data.
~Apply to S book. In this way, the first subfield screen is displayed based on the least significant bit information of the image signal. Similarly, for the cathode pulse, +, k2. &3. , ky, and sequentially apply an auxiliary anode pulse SP based on the next most significant bit information of the image signal. In this way, eight subfield screens are sequentially displayed based on the information for each bit.In addition, in order to apply this auxiliary anode pulse 8p, between the cathode and anode of discharge cells P+t to Pa, (Between K and A), the secondary discharge transitions from the auxiliary discharge and a secondary main discharge occurs, but since the main discharge at this time is a weak discharge, the display screen at this stage is hardly visible.

The anode pulse Ap is generated at the transition of the auxiliary discharge 7
This is to maintain the main discharge between 7 and -A, and the generated brightness of the discharge cell can be determined by the number of applied pulses. That is, anode pulses of αθ are applied to the anode terminals A1 to AfI in accordance with the first vertical scanning by the cathode pulse ko. Thus, the discharge cell selected during the first vertical scan is α. Repeats the light emission. Similarly @
2. Fifth. ...In accordance with the 8th vertical scan, it is contradictory α
1. α2. By applying α1 Ill pulses, the discharge cells selected at the time of each sub-field display are moved by α1°, and light emission is repeated α7 times.

Here, for example, α0=4°α1=8. α2”16+...
If a7=512, by displaying the subfields a total of 8 times, the discharge cell can be adjusted to a total of 0, 4, 8 degrees, 121 degrees, by any combination of α0 to α7. ...By repeating any one of the 1020 times of light emission, it is possible to display a screen with 256 gradations. It should be noted that the main discharge between -A due to the application of the anode pulse Ap is stronger than the main discharge between -A due to the transition of the auxiliary discharge. Varies depending on the number of pulses.

FIG. 2 (-) shows the cathode pulse, the auxiliary anode pulse,
In addition to the anode pulse, the control pulse of the switch 14 and the output pulse of the recovery circuit 500 are also shown.

The output pulse of the recovery circuit 500 shown in FIG. 2(a) has the same repetition frequency and pulse width as the anode pulse AP, and is, for example, a continuous ratio pulse. The pulses qo, q1 . applied to the switch 14-1. '72.9s...The switch closes. Depending on this closing timing, the output pulse of the recovery circuit 500 is α. ,α,.

α2. αS, . . . are applied to the anode terminal A1. The switches 14-2, 14-5, . . . are applied with delay ratio pulses of 1H each (pulse 11) applied to the previous switch.

In this way, pulses identical to the aforementioned anode pulses α0 to α7 are applied to the anode terminals A1 to An via the switches 14-1 to 14-n. In addition, sea urchin, which will be explained later,
The control pulse applied to the switch 14 may be a signal other than the same repetition frequency and pulse width as the anode pulse Ap shown in FIG. 2.

Next, the operation of the recovery circuit 500 shown in FIG. 1 will be explained using the principle circuit shown in FIG. 5 and the waveform diagram shown in FIG. 4.

The circuit shown in FIG. 3 includes a capacitor 10, a switch 11,
12.15, inductor 20. A power supply terminal 100 is its main component. The same components as in FIG. 1 are given the same reference numerals. Furthermore, the switch in the actual circuit,
The effective resistance of inductors, etc., and the floating capacitance collectively have a resistance of 1o.
1R and capacitor 101C. Terminal 102
The anode terminals A1 to A11 shown in FIG. Also,
The inductor 20 shown in FIG. 5 represents the value of the variable inductor 15 shown in FIG. 1 at a certain time. Note that the recovery circuit essentially forms a resonant circuit of the capacitor 105 and the inductor 20, although other configurations are possible.

The circuit operation in FIG. 5 will be explained using the waveform diagram in FIG. 4 as well. In the initial state at time t=Q, switch 11.
12 is OFF and the switch 13 is ON, and the terminal voltage of the capacitor 10 is VB, 72 with respect to the voltage v8 of the main power supply terminal 100. Since the switch 15 is ON, the capacitor 105 is in a discharged state, and therefore the voltage Vo at its terminal 102 is zero. The capacitance of the capacitor 10 is sufficiently large, and its terminal voltage is VS in the following operations.
Assume that the value remains /2.

At time t, switch 15 is opened and switch 11 is closed. At this moment, a current It due to resonance flows from the capacitor 10 to the capacitor 105 side through the inductor 2o. Assuming that the value of the inductor 2o is Ln, the capacitance value of the capacitor 101C is C/, the capacitance value of the capacitor 105 is Co, and the value of the resistor 1o1R is R, assuming that R is small, Vo,
It is expressed as follows.

VS α IL=---mmi 6" R's ・・・・・・(2) here reach.

On the other hand, ■! , keV, the waveform F becomes a waveform F which is more advanced than the time 1. ．． 1. Then, IL = □ Vsα-- At time t2, the maximum IL-IA (=-62''',)1 becomes υ.

At time 1S, switch 11 is opened and switch 12 is closed. At time 1S, the particle voltage vO of the capacitor 105
has almost reached Vs, and by closing the switch 12, the voltage at the power supply terminal 100 is fixed to V8.

In this way, the rising edge of the pulse shown in FIG. 4 is formed.

0-100% rise time of this pulse1. From the above equation, π 1, = − π (vibrational resonance condition of the LCR circuit).

It is expressed as 2πVLC (4). However, Vo at the moment when the switch 12 is closed at the heel time t5 is not exactly 8. The moment it closes, the capacitor 105 will be charged to Vs.

Since this charging is performed from the VLVi power supply terminal 100 side via the resistor 101R, more precisely, a rise due to a transient phenomenon of CR is added. This is indicated by circle D (L7'j
Therefore, the circle E is also indicated as follows. However, in this embodiment, the circled portion is not included in the rise time because the average is sufficiently small. In reality, C1R is 100F each at most.
F' is about 500, and the CR time constant at this time is CR=5rLJP, which can be ignored for a pulse of about t, = 1 μs. After the required time has elapsed, at time t4, switch 12 is opened and switch 11 is closed. close. At this point, the Vs terminal voltage of capacitor 0 is -, and the terminal chamber pressure of capacitor 05 is Vs.
s, the switch 11 is closed and the current of the LCI% resonance circuit flows from the interfilm capacitor 05 side to the capacitor 0 side.

Thereafter, the voltage VO changes as shown in C in FIG. 4 in the same way as the rise A of the pulse shown in FIG.

In this process, the current IL flows in the opposite direction to that at the pulse rise, and becomes as shown in G in FIG.

At time t6, vO reaches the minimum value, momentary switch 11 is opened, and switch 15 is closed.

In this way, the circuit shown in FIG. 3 completes one cycle, returns to its initial state, and one pulse is formed. The falling time tl of this pulse is exactly the same as t, and becomes tfzπV/hill.

The power P lost by the circuit shown in FIG. 5 when it performs one cycle of operation is:
Loss P1 due to the current It flowing through -1 (B) C caused by closing the switch 12 at time 1s
Loss P2 due to the transient current flowing through the resistor 101-1 during the R transition period (c) Time 'a ~ ea +7) L Loss Ps due to the current IL flowing through the resistor 101-1 at the time of CR resonance c) Switch at time t4 CR caused by closing 1S
This is the total loss P4 due to the transient current flowing through the resistor 101-1 during the transition period E. When this is calculated, CVs' -z -CVs uJ Further, using equation (5) and (4), P≧t-R2 -.-CVs L (5).

From equation (5), the loss of the recovery circuit shown in FIG. 5 is reduced by t multiplied by the coefficient 7·π compared to the fR method, which applies pulses by switching the power supply voltage.

For example, 1. =1μj, a=soΩ, and C=100PF, the recovery circuit has a loss of 0.0125 X eVs per pulse, which is smaller than CVs.

The recovery circuit 500 shown in FIG. 1 operates on the same principle as the recovery circuit shown in FIG. 5 above. (6, in FIG. 1, a switch 14 is provided, and one recovery @ path 500 is configured to apply an anode pulse to a plurality of anode terminals A1 to AII+. Each anode terminal A1 to A% is Floating volume ieA+~
Since CAa is attached, the resonant capacitance of the recovery circuit SOO changes depending on whether the switch 14 is opened or closed.

Floating capacitance icA+~CAN of individual anode terminals A1~AfI
This is a substantially constant value, and this is referred to as CAQ. Assuming that one of the switches 14 is closed,
The resonant capacitance of the recovery circuit 500 is jlC=ICho.

For simplicity, in the following explanation, the resistor 101R shown in Figure S is used.
Elements corresponding to 1 volume fT101C will be omitted.

When the resonant capacitance C of the recovery circuit 500 changes, the rising edge t7 of the pulse changes according to equation (4). In order to avoid this, the variable inductor 15 is used in the inductor portion of the recovery circuit 500 in the embodiment shown in FIG.

There are various methods of configuring the variable inductor 15. Next, an example will be explained.

FIG. 5 shows a method in which nine inductors 21-1 to 21- are connected in parallel by switching and connecting nine switches 51 to each switch. Here, terminal 15-1
．． 15-2 and 15-5 are terminals connected to the switch 11, the switch 12.15, and the anode pulse generating circuit 5 shown in FIG. 1, respectively.

Opening/closing is performed based on binary coded data of the number of switches closed on the several circuit side.

FIG. 6 shows a method of combining n inductors 22-1 to 22- connected in parallel by switching n switches 52 and connecting them in parallel. Terminals 15-1 to 15-5 are the same as shown in FIG.

The n inductors 22 all have the same value LO, and can be synthesized by opening and closing the switch 52.
Since it changes as cho,...ncha, 2' ≧
Le......(
6) Using the minimum integer number of inductors, the inductance L can also be varied for any displacement of C, CL = ChoLO (= constant)
-... (It can be made to be C. For example, if Le = 480,) If 29 inductors are used. As will be described later, the rotation of the switch 51 in the switch 14 shown in FIG. 1 corresponds one-to-one with the change in the resonant capacitance C.
= CAG L.

can be easily realized. This can be done by making the number of switches 52 closed match the number of switches 14 shown in FIG. 1 closed on the recovery circuit 500 side.

FIG. 7 shows an example of controlling inductance using a saturable reactor 25 and a current source 55. Terminal 15-1~
15-5 is the same as shown in Figure 5.6.

A signal is applied to the terminal 15-5 from the anode pulse generation circuit based on the open/closed state of the switch 14 shown in FIG.

The current source 55 responds to the signal applied to this terminal 15-3.
The current value flowing through the primary winding 25-1 of the saturable 11 axle 25 is controlled by changing the current value.

In this way, the inductance of the secondary winding 25-2 can be changed by changing the magnetic permeability of the magnetic core of the saturable 1; acdle 2S. For example, if we use the number of primary windings NO, the number of secondary windings NL, the cross-sectional area A of the magnetic core, the average magnetic path length t, the magnetic permeability μ, and the current flowing through the primary winding 25-1 Ot, The inductance L of the secondary winding 25-2 is expressed by . However, in equation (7-2), the magnetic permeability μ is NoI
It is shown that it is expressed by a function fB-□ of o/z, and its shape can be found from the B-H curve of the magnetic core [B: magnetic flux density, H: magnetic field]. When the magnetic field H becomes thicker and the magnetic flux density B begins to saturate to the value of BO, it becomes inversely proportional to the relationship B=μH and becomes small (that is, the inductance L of the secondary winding 25-2 becomes smaller). , can be controlled by the current IO.The range of the inductance L that can be varied by the saturable 11 actuator 55 largely depends on the properties of the magnetic core. If the width is large, this may not be possible. This can be solved by providing multiple recovery circuits 500 and reducing the number of drive electrodes for each recovery circuit. Next, the configuration of the t-th anode pulse generation circuit 5 that controls these variable inductors 15 will be explained.

FIG. 8 shows an example of the configuration of the alternate anode pulse generating circuit 5 that controls the variable inductor 15 shown in FIG. 5 and having a nine-circuit configuration.

The circuit shown in FIG. 8 is ROM51. rL-1 tl) De
Delay circuit 52 consisting of lay52-1 to lay52-4-1.
Encoder 53. An input terminal 5-1 for inputting a signal from the synchronous control circuit 2. Output terminal 5-2 that outputs anode pulse
．． It is composed of a control signal output terminal 5-3 for the variable inductor 15.

The waveform of the anode pulse is stored in the ROMsl and read out based on the synchronous control signal applied to the input terminal 5-1. The read signal output from ROM5t is
The signals obtained by being sequentially delayed by the delay circuit 52 are 8
2. ...Selected as Bs. These signals Bl to ByL have the same timing as the signals applied to the anode terminals A1 to ATL, respectively, and are supplied as control signals to the friend recovery circuit 500 and switch 14 as shown in FIG. 1 via the output terminal 5-2. be done. By carefully counting the number of pulses of the signals 81 to B at the same time, it is possible to know whether the switch 14 is open or closed.

In order to control the variable inductor circuit shown in FIG. 5, the number of switches closed on the recovery circuit side (that is, the number of pulses from 81 to BrL) can be binarized and the following data can be used. In the figure, signals 81 to Bn are code-converted by a decimal to binary encoder 55 and output from a terminal 5-5.

FIG. 9 shows a variable inductor 15 having the circuit configuration shown in FIG.
This is an example of the configuration of an anode pulse generation circuit 5 for controlling the circuit for use.

The circuit configuration shown in FIG. 9 has a structure obtained by removing the encoder 55 from the circuit configuration shown in FIG. 8. In other words, in order to control the variable inductor circuit shown in FIG. 6, the number of switches 52 shown in FIG. 6 that are closed is equal to the number of switches 14 shown in FIG. 1 that are closed on the recovery circuit side ( The number of pulses of the signal 81 to Ba) may be adjusted.

The embodiment shown in FIG. 9 has such a configuration, and the signals 81 to B are output as they are from the terminal 5-5 for controlling the switch 52 in FIG. 6.

FIG. 10 shows a variable inductor 1 having the circuit configuration shown in FIG.
This is a ninth example of the configuration of the anode pulse generation circuit 5 that controls the anode pulse generation circuit 5.

The circuit configuration shown in FIG. 10 is a t configuration in which the encoder 55 is replaced with the D/A converter 54 in the circuit configuration shown in FIG. That is, in order to control the variable inductor circuit shown in FIG. 7, the number of switches 14 shown in FIG. 1 that are closed on the recovery circuit side is converted into an analog signal, and this analog signal is used to What is necessary is to control the variable current source 55 shown in FIG. In FIG. 10, the D/A conversion signals of signals B1 to Bn are outputted from the terminal 5-5 as control signals for the variable current source 55 in FIG. 7. An example of the configuration of the variable inductor 15 and the preliminary anode pulse generation circuit 5 that controls the variable inductor 15 in the embodiment has been described. It is also possible to control the variable inductor 15 with another configuration, and in this case, the value of the variable inductor 15 is controlled in response to changes in the resonant capacitance C of the recovery circuit, so that the product CL satisfies the pulse rise specification. When the value is set to a value, the same effect as described in the above embodiment is obtained.

Here, as a feature of the nine-memory type FDP used in the first embodiment, the configuration shown in FIG. 1 has anode terminals A1 to AJL at a constant potential (in FIG. It has a special configuration in which it is hooked to the ground potential (the same applies to other cathodes and auxiliary anode terminals).

That is, as described in the timing chart shown in FIG. 2, the hole auxiliary discharge generated in the discharge cell by the cathode pulse Kp is transferred to the main discharge by the auxiliary anode pulse Sp, but the anode terminal A+-An is in an open state. This is because this transition will not occur if it remains as it is.

On the other hand, in the recovery circuit shown in FIG.
It is necessary to close the switch 15 to the ground potential side during the OW period.◎ As a simple example of adjusting these two requirements, in FIG. 1, the switch 15 is provided for the recovery circuit 500, and the The drive switch 14 is configured to be switched to either the recovery circuit 500 or the ground side.

However, this embodiment is not limited to the above-described construction, and other constructions are also possible.

FIG. 11 shows the recovery circuit 500 and switch 1 shown in FIG.
4 is shown. In the recovery circuit 500 shown in FIG. 11, the switch 15 of the recovery circuit 500 shown in FIG. 1 is removed. That is, in FIG. 11, the switch 14 also functions as the switch 15 of the recovery circuit 500.

Furthermore, % @i2 figure shows the recovery circuit 500 in figure 1.
An embodiment is described in which switches 15 and 14 are provided for each of the anode terminals A1 to A. In this case, a structure in which the portion corresponding to the switch 14 shown in FIG. 1 simply opens and closes like the switch 14 is sufficient. Of course, FIG. 12 can also be regarded as a t configuration in which the switch 12 is provided for each of the anode terminals A1 to A3 from the configuration shown in FIG. 11. That is, the 12th
This is because the switches 15-1-15-n shown in the figure perform the same function as short-terminating the switches 14-1 to 14-n shown in FIG. 11 to the ground side.

In the nine embodiments shown in FIG. 11 and FIG. 12, the control timing of the switch 14 or 14 is different.

FIG. 15 shows the timing of the signal Q applied to the switch 14 in the configuration shown in FIG. 11. When the anode pulse Ap is not applied to the anode terminals A1 to A1, the switch 14 is connected to the ground potential. That is, the switch 14 is controlled at the same timing as the anode pulse AP. Therefore, the anode pulse AP and the control signal Q of the switch 14 are the same signal.

FIG. 14 shows the timing of the signal Q applied to the switch 14 in the configuration shown in FIG. 12. When the anode pulse Ap is not applied to the anode terminals A1 to A1, the switches 15-1 to 15-n in FIG. 12 are closed to set them to the ground potential. Therefore, if the switch 14 is closed for at least the period during which the anode pulse Ap passes, the switch 14 is not operated. For example, anode terminals A1 to AT
When applying only two anode pulses to L and stopping, the signal Q applied to the switch 14 overrides the two anode pulses. , the pulses shown in FIG. 14 are sufficient.

Of course, the switch 14 in the circuit shown in FIG. 12 can also be controlled at the timing shown in FIG. 15. In addition,
The switch 14 in FIG. 1 can be controlled at any timing in FIGS. 15 and 14.

The circuit configuration shown in FIG. 1 is a configuration in which one power recovery circuit 500 drives a plurality of anode terminals A1 to AFL. However, this embodiment is limited to the case where one power recovery circuit 500 is used. It's not a thing.

FIG. 15 shows an embodiment in which the anode terminals A1 to An are driven by a recovery circuit 501 consisting of, for example, two systems. Basically, the only difference is that the recovery circuit 500 in FIG. 1 is replaced with the recovery circuit 501 in FIG. 15.

In FIG. 15, using a recovery circuit 501 consisting of two systems, two sets of adjacent electrodes A1 to At++ are used.
~ Drive An. Two variable inductors 15α and 15
The stones are divided into two groups and the π-yō electrodes A1~kt and Az+
It is controlled based on the information of the anode pulse applied to + to A7L. The recovery circuit 501 has two systems, but one capacitor
0 can be common. If you want the pulse timing of the two systems to be exactly the same, use switches 11α and 11.
6 can also be combined into one. The configuration shown in Fig. 1 is simpler, but there are cases where the total value of the anode stray capacitances cAl to eAw is too large to be driven by only one recovery circuit,
In cases where the number of anode electrodes A1 to Af& is too large to accommodate the variable width and control of the variable inductor 15, the configuration shown in FIG. 15 in which the recovery circuit is divided into two systems is also effective. Furthermore, there may be a case where the recovery circuit is divided into two or more systems and driven.

Although this embodiment assumes that each anode electrode is driven separately, for example, when driving a panel divided into upper and lower halves, the two electrodes can be driven at exactly the same time.

That is, the nine divided anodes t'pi of the upper and lower panels can be simultaneously driven by one recovery circuit. At this time, for example, the number of switches 14 is halved, and one switch 14-1 has two
It works if you connect it to the anode electrode of the book and select it at the same time.

The above are examples of controlling the inductor of the recovery circuit and their effects. Similar effects can be obtained by using a configuration in which the resonant barrel is controlled as another embodiment.

FIG. 16 shows the next configuration in which the recovery circuit 500 in FIG. 1 is replaced with a recovery circuit 502. The rest of the configuration is the same as the embodiment shown in FIG. 1. The recovery circuit 502 is similar to the configuration shown in FIG. The difference is that a capacitor (condenser) 16 is connected as a load.In other words, the total value of the anode stray capacitance (CAT, !: set), which is the load of the recovery circuit 502, changes depending on the open/closed state of the switch 14. Capacitor 16 (capacitance #value CAO and e
<) is inserted in parallel with this stray capacitance to compensate for its change, and the total value with the stray capacitance C2CAT + CAO=
const.

Each anode terminal A1~A! % floating capacitance 1cAl~CAI% is equal CAO, the total value CAT is O<,
It changes within the range of CAT≦ncho. Therefore, the value CAO of the variable capacitor 16 should be at least 0≦CAO≦nc
If it can be varied within the range of ho, CAT −4−CAO=
It can be ncho. In this embodiment as well, the same effects as in the t embodiment shown in FIG. 1 can be obtained.

FIG. 17K shows an example of the circuit configuration of the variable capacitor 16.
An embodiment in which one switch 25-1 to 25-no provided in parallel is switched and t capacitors 26-1 to 26-no provided between each switch and the ground potential are combined in parallel. show. Here, terminal 16-1 is switch 12.1
5, 16-2 is a terminal connected to the switch 14, and 16-5 is a terminal connected to the anode pulse generating circuit 5, respectively.

The value of capacitor 26-1 is CAo, and the value of capacitor 26-2 is
The value of f 2CAO, ...the value of capacitor 26-no is 2
1CAO, the capacitance value 0 that can be synthesized by opening and closing the switch 25 is O, CAo, 2C
ho.

5eAo...(2'-') CAO. The total value of anode stray capacitance CAT is also O, CAo, 2c＾o-・
Since it changes to 7LCAO, 2 no 1 ≧ le
・・・・・・ （
By using the minimum integer number of capacitors that satisfy 9), the resonant capacitance ic of the recovery circuit 502 for any change in CAr is L: : CAT + eA.

2rLCA〇2const, -...<10)
Then, the product with the value of inductor 20 is L:
L=njiAO−L=conzt, --(11). The opening/closing of the switch 25 is performed based on the following data obtained by digitizing the number of switches 14 in FIG. 16 that are closed to the ground side.

In FIG. 18, n switches 27-1 to 27- are switched and connected to each switch, and 7t-n capacitors 28 are connected to each switch.
A method of synthesizing -1 to 28-n by parallel connection is shown.

Terminals 16-1 to 16-5 are the same as respective terminals 16-1 to 16-5 in the embodiment of FIG.

One capacitor 28 has the same value Co, and the capacitance value C can be synthesized by opening and closing the switch 2 days.
AodO, COA, 2(:OA, 5COA,
Mountain, 7LCOA. This change has a one-to-one correspondence with the change in the total value of anode stray capacitance (:AT, and for any integer r≦dew, when CAT=rcCAo, CAO=-(
rL-r) If controlled by CAO, then C=CAT-4-Cperson0=nCh.

= con, lIt, 1・…(
12) can be easily realized. That is, the number of closed switches in switch 27 is calculated as switch 1 in FIG.
4 should match the number of switches closed to the ground side.

The anode pulse generating circuit 5 for controlling the variable inductor shown in FIG. 17 or 18 is similar to the circuit shown in FIG. 8 or 9, respectively, and the following circuit is used.

FIG. 19 is a configuration example of a prescribed anode pulse generation circuit 5 that controls the circuit shown in FIG.
The signals 81 to B are applied at the same timing as the signals applied to the anode terminals A1 to A5 shown in FIG.
When ~B, % is Low, the switch 14 in FIG. 16 is closed to the ground potential side. In order to control the variable capacitor circuit shown in FIG. 17, the number of switches (sunawachi 81 to 13.0 pulses) that are closed to the ground potential side in the switch 14 is converted into a binary number, and the following data is used. In the circuit shown in FIG. 19, signals 81 to Bn are connected to inverters 55-1 to 5
After the signal is inverted at a terminal 5-5, the code is converted by a decimal to binary encoder 55 and output from a terminal 5-5.

The circuit shown in FIG. 20 is a configuration example of the anode pulse generation circuit 5 for controlling the circuit for the variable capacitor 15 shown in FIG. 18.

The circuit shown in FIG. 20 has a t configuration by removing the encoder 55 from the circuit shown in FIG. 19. To control the variable capacitor circuit shown in FIG. 18, the number of switches 14 shown in FIG. 16 that are closed to the ground potential side (the number of pulses of the signal t3+-B-) Just match the number of switches. In the embodiment shown in FIG. 20, signals 81-B are connected to inverter 55-1.
After being inverted at 55-n, the signal is output, and is used as a signal for controlling the switch 27 in Figure @18.

FIG. 21 shows a recovery circuit 505 having a configuration similar to the recovery circuit 502 shown in FIG. 16 but excluding the variable capacitor 16.
This is an example in which . In the embodiment shown in FIG. 21, switch 14 in FIG. 16 is further replaced with switch 17 and capacitor 18-IA-113-n. All other configurations are the same as in FIG. 16.

Switch 17 is nffAo switch pair 17-1-17-
4, and each switch pair is, for example, 17-1α and 1
7- Consists of two switches like IA.

For example, switch 17-1α has the same function as switch 14-1, and when applying an anode pulse, closes to the recovery circuit 505 side to connect anode terminal A1 to the recovery circuit. When no anode pulse is applied, the switch 17-1α is closed to the ground potential side to keep the anode terminal A1 at a constant potential. On the other hand switch B
-1b has one end connected to the recovery circuit 505, and the other end is grounded and connected to the capacitor 18-1. When the switch 17-1α is closed to the recovery circuit 505 side, the switch 17-IA is opened, and when the switch 17-1α is closed to the ground potential side, the switch 17-1h is closed. . The same applies to the other switch pairs 17-2 to 17-n.

From the side of the recovery circuit 505, switch 1
7 is switched, the anode stray capacitance CAI~CA
Either I% or capacitors 18-1 to IB-n are always connected. If the anode stray capacitance is 0 + P-CAR, and the capacitance values of capacitors 18-1^18-3 are all CAO, then the composite value C of the capacitances connected to the recovery circuit 505 is always a constant value C=nC^0
@ L7t Therefore, the product with the value of the fixed inductor 20 is LC = nchoL = corLjt, ...-(15
), and even if the open/closed state of the switch 17 changes, the rising and falling edges of the output pulse of the recovery circuit 505 do not change.

Above, in FIGS. 1 to 21, embodiments of the present invention in the case of driving the anode terminals A1 to A11 of a memory type FDP 9 have been described. Next, an embodiment of the present invention in which the auxiliary anode terminal S1^8 is driven will be described.

FIG. 22 is a block diagram showing an embodiment of the present invention in the case of driving the auxiliary anode terminal SI-1.

The block diagram shown in FIG. 22 is basically the same as the block diagram shown in FIG. 1, but the arrangement of the memory type PDP 9 is rotated by 90 degrees. The anode terminal A I-As is driven by the anode driver 19, and the auxiliary anode terminals 81 to 81 are switched by the WL switch 214 and connected to the recovery circuit 504.
It is configured to be driven by Other configurations li@1
Same as the figure.

Since it is necessary to apply a negative pulse to the auxiliary anode terminals 81 to 8 grooves, the configuration of the switch 214 is reversed to that of the switch 14 in FIG. 1. That is, the auxiliary anode terminal 81~8m
When not applying the auxiliary anode pulse to s, switch 21
4 is closed to the constant potential (ground potential in FIG. 22) side.

The recovery circuit 504 is also configured to be able to apply negative pulses. That is, switch 212. 215 is arranged oppositely to the switch 12.15 in FIG. is opened and switch 215 is closed to connect the output terminal to a constant potential (ground potential in FIG. 22). switch 2
A switch 11 is closed only during the rising and falling periods of the pulse, and plays the same role as the switch 1o in FIG.

Capacitor 210 has the same function as capacitor 10 of FIG. 1, but is connected in reverse polarity. That is, the second
The grounded terminal side of the capacitor 210 in FIG. 2 is a positive potential terminal.

The recovery circuit 504 in FIG. 22 includes switches 211 to 215.
and variable inductor 215 are controlled by information from auxiliary anode pulse generation circuit 4. The variable inductor 215 has the same configuration as shown in FIGS. 5 to 7, and its control is described in the explanation of FIGS. The object of the present invention can be achieved by keeping it constant.

FIG. 25 shows the variable inductor 215 of FIG. 22 which is shown in FIG. 51 and configured with nine direction paths.
5 shows a configuration example of a companion auxiliary anode pulse generation circuit 4 that controls the auxiliary anode pulse generator 5. The circuit shown in FIG. 25 has input terminals 4-1. Shift register 41. Latch circuit 42° latched good signal output terminal 4-2. Encoder 45 that converts the latched good signal from decimal to binary. It consists of a converted signal output terminal 4-5 for the encoder 45 and an input terminal 4-1 for a control signal inputted from the synchronous control circuit 2 for controlling these.

Signals υ1 to D outputted from the terminal 4-2 are control signals for controlling the opening and closing of switch 214 (and switches 211 to 215) in FIG. 22. These signals D1 to D.

If the code is converted by the encoder 45 from pulse number t - decimal to binary and the good signal is used to control the switch, the fifth
A variable inductor 215 having the same configuration as shown in the figure can be controlled.

FIG. 24 shows that the variable inductor 215 in FIG.
Auxiliary anode pulse generation circuit 4 for controlling variable inductor 215 when configured with the circuit shown in the figure
This is a configuration example.

The auxiliary anode pulse generating circuit 4 shown in FIG. 24 has a structure obtained by removing the encoder 45 from the circuit shown in FIG. 25. That is, when the variable inductor 215 circuit having the circuit configuration shown in FIG. 6 is used, switch 3 in FIG.
2, the number of closed switches 214 in FIG.
It is only necessary to control so that the number of these closed on the recovery circuit 504 side is the same.In the embodiment shown in FIG. .

FIG. 25 shows an embodiment of the auxiliary anode pulse generation circuit 4 that controls the variable inductor 215 when the variable inductor 215 is configured with the circuit shown in FIG.

The circuit shown in FIG. 25 has a configuration in which the encoder 45 of the circuit shown in FIG. 25 is replaced with a [)/A converter 44.

That is, when the variable inductor 215 is configured with the circuit shown in FIG. 7, the variable current source 35 in FIG.
At step 14, a digital signal indicating the number of switches closed on the recovery circuit side is converted and then controlled using an analog signal.

In other words, in Figure @25, the signal Llt~[)I@ is A/D
It is converted and output from terminal 4-5. A good signal is output from terminal 5-3 and is input from terminal 15-5 in the 8g7 diagram.
The inductance value of the secondary winding 25-2 changes. In this way, the inductance value of the variable inductor 215 is controlled, and the resonance time constant is kept constant.◎ As mentioned above, the driving of the auxiliary anode terminal is also performed as shown in Figs. 1 to 7, which are examples of driving the anode terminal. An example similar to that shown in the figure is established. In other embodiments of driving the anode terminal in FIGS. 8 to 21, each embodiment can be applied by replacing the anode terminal with an auxiliary anode terminal. In this case, as shown in FIG.
is controlled by the auxiliary anode pulse generation circuit 4.

The above is a description of the embodiments of the present invention for driving the anode terminal and auxiliary anode terminal of a memory type PDP. In principle, the cathode terminal is driven so that the cathode pulses applied to the cathode terminal do not overlap at the same time. In other words, even if all cathode terminals are driven using a recovery circuit, a plurality of cathode terminals will be driven simultaneously, and the number of cathode terminals will not change over time. That is, the resonant capacitance of the recovery circuit does not change in principle. In addition, although the cathode terminal can be driven by the drive circuit according to the circuit shown in FIGS. 1 to 21 of the present invention, it is not necessary to control the inductor of the recovery circuit. Of course, the present invention can be applied when the load capacity of the recovery circuit changes. Note that the effects of the embodiments of the present invention are not limited to driving the memo 11 type FDP as described above. Another matrix display panel, ELD (Elactro-Lrtbm)
ingjcarLca -Display) panel and VFD (Vaccum -FILLoracant-
L) izplay) Pulse etc. or original DC type,
A similar effect can be obtained when driving an AC type FDP.

FIG. 26 is a block diagram of a circuit that drives a capacitively loaded panel 509, such as an ELD4) AC type PDP. The panel 509 has n pixels vertically and m pixels horizontally.
ij, and is driven by nine vertical scanning electrodes v1 to v5 and m horizontal scanning electrodes H1 to H. For example, pixel E is selected by horizontal scanning electrode Hi and vertical scanning electrode V).

In the embodiment shown in FIG. 26, the auxiliary anodes 81 to 5L11 in FIG. 22 are replaced with horizontal scanning electrodes H1 to HI11, and the cathode terminals 1 to 1 are replaced with vertical scanning electrodes v1 to vI%. 1! It has a configuration in which the poles v1 to v9 are driven by a vertical scanning driver 508, and the horizontal scanning electrodes are switched by a switch 514 and driven by a recovery circuit 505. Further, the pulses necessary for the vertical driver 508 are generated by the vertical scanning pulse generation circuit 506, and the switch 5149 recovery circuit 50
A signal for controlling the switch 551 of the 5-work recovery circuit 505 is obtained from the horizontal scanning pulse generation circuit 504.

Other video input terminals 5o1. A/D memory circuit 505
The synchronous control circuit 502 has the same function as each of the nine circuits shown in FIG. Panel 50 of Figure 26
In 9, the scanning electrode v is on the 8th side of pixels ETf~L+m.
1~V,, )(+~H, larger than the stray capacitance, 26th
In the illustrated embodiment, the scan electrode stray capacitance of panel 509 is omitted.

The recovery circuit 505 in FIG. 26 includes inductors 521-1 to 521-1.
521-) and a switch 551, which corresponds to the circuit shown in FIG. The switch 514 is composed of m switches 514-1 that simply open and close.
~514-rn.

A drive pulse is applied to the horizontal scanning electrodes H1 to H by opening and closing a switch 514. This opening/closing information is input from the horizontal scanning pulse generation circuit 504.

Then, by opening and closing this switch 514, the recovery circuit 50
Although the resonant capacitance of the horizontal pulse generating circuit 5 changes, the horizontal pulse generating circuit 5
Switching of recovery circuit 505 using information from 04 1-1~
351- and inductances 521-1 to 52
1-)', it is possible to align the rising or falling edges of the output pulses of the recovery circuit 505. In the embodiment shown in FIG. 26, controlling the composite value of inductance by opening and closing the switch 351 to keep the resonance time constant constant is exactly the same as in the embodiment shown in FIGS. 1 to 21. Therefore, the explanation will be omitted.

Although various embodiments have been described above, these embodiments are based on the configuration of the recovery circuit 500 shown in FIG. Capacitors in circuits10. switch 11
．． Inductor 20. Switch 12゜15 to recovery circuit 50
However, in an embodiment in which the inductor 20 is replaced with the variable inductor 15, for example, in the recovery circuit 500 in FIG.
A configuration in which the number of switches 11 is apparently added or removed is also possible.

FIG. 27 shows a configuration example different from the recovery circuit shown in FIG. 1 when the circuit shown in FIG. 5 is used as the variable inductor 15 of the recovery circuit 500 shown in FIG. 27th
In the embodiment shown in the figure, a switch inductor 21. Switch 12. Is, tL%%l switch 14-1
A switch 14 consisting of ~14-rules. Output terminal A+ ~ A+
% and a power supply terminal 100. Of these,
Capacitor 10. Switch 12.15.14. terminal 10
0 and terminals A1-Ay+ are the same as shown in FIG.

@27 In the figure, each switch 11-1 constituting the switch 11 is connected in series with the inductor 21-IP-21-, respectively. By opening and closing the switches 11-1 to 11-no constituting the switch 11 at the rising and falling edges of the output pulse of the recovery circuit, it has the functions of both the switch 11 in FIG. 1 and the switch 31 in FIG. 5. It has additional functions. That is, for example, if the switches 11-1 and 11-2 are closed when they are fully turned, the inductor 2
A resonant circuit that resonates with the parallel combined inductances of 1-1, 21-2 is formed.

The values of the inductors 21-1 to 21- are hLo, respectively.

5 has exactly the same effect as applying the circuit of FIG. 5 to the expendable inductor in recovery circuit 500 of FIG.

That is, if the number of openings and closings of the switch 11 is controlled according to the opening and closing state of the switch 14, the inductor 21 and the terminals A1 to
A? By keeping the resonance time constant with the stray capacitance associated with I constant, it is possible to align the rise and fall times of the drive pulses to desired values.

Therefore, the circuit configuration shown in FIG. 27 is essentially the same as the collection port jig 500 shown in FIG. I understand that.

Further, for example, it is also possible to use another configuration as the switch 11 that constitutes the recovery circuit 500 in FIG. 3.

The embodiment shown in FIG. 28 is an example in which the switch 11 in FIG. 2 is configured with another switch 411. Inductor 20 of capacitor 10 shown in the embodiment shown in FIG. Switch 12.15. Terminal 102. The load capacity 105° power supply terminal 100 is exactly the same as that shown in FIG. 2, and switch 11 in FIG. 2 is replaced by switch 4 in FIG.
There is only 61 pieces instead of 11. However, for simplicity, the CR circuit 101 in FIG. 2 is omitted in FIG. 28.

The switch 411 further includes switches 411-α, 411
-6, diode 11-c, and all-d. In the embodiment shown in FIG. 28, the switch 411-α is closed at the rising edge of the drive pulse, and at this time the capacitor 10
to switch 411-α and diode IL11-C.

Inductor 20. Current flows through capacitor 105, forming a resonant circuit. At the falling edge of the drive pulse, the switch 411-6 is closed, and at this time, the capacitor 105 is connected to the inductor 20. Diode 411-d.

Current flows into capacitor 10 through switch 411-4, forming a resonant circuit.

In Fig. 28, switch 411 constitutes switch 4.
The switch 411 has exactly the same function as the switch 11 in FIG. 2, except that the switches 11-α and 411-1 open and close alternately at the rising and falling edges of the drive pulse. For example, in a semiconductor circuit where the switch 411-α is configured with a P-MOS transistor and the switch 411-6 is configured with an n-Mo5t-transistor, the configuration of the switch 411 may be particularly convenient. A configuration of switch 411 as shown in the figure is used.

As shown in the embodiment of FIG. 28, the effect of the present invention is the same even if the portion corresponding to the switch 11 of the recovery circuit 500 is replaced with a switch 411. As an example, FIG. 29 shows an embodiment in which each of the switches 11-1 to 11- in FIG. 27 is replaced with a switch 411.

In FIG. 29, for the sake of simplicity, the number is set to 5, and the configuration of the recovery circuit that can drive the maximum number of electrodes A1 to A7 at this time is shown. Capacitor 10 in Figure 29. switch 12
．． 15. Switch 14. Terminals A1 to A7. The power terminals 100 are the same as those shown in FIG. 27, and the five inductors 421-1 to 42 in FIG.
1- Corresponding inductor 21 in S jdWfJ27 diagram
-1 to 21-5.

In FIG. 29, the switch 11-1°1 in FIG.
1-2.11-5 are fl and 411-α5411, respectively.
-d.

411-d to 411-α, 411 to all-α
- Bamboo is replaced with a switch consisting of d.

Inductor 421-1. 421-2. 421-5 value Lo L.

When ``@*-'' are respectively, the switches 411-α and 411-α are activated at the rising edge of the drive pulse.

411-J, 411-8. 411-
4Lo Lo L.

Depending on how it is closed, %” l l l ~I-
The values of can be synthesized. That is, 5 of switches 4-14
When the switches 411-α and 411-α are closed on the recovery circuit side, the switches 411-α and 411-α are closed simultaneously at the rising edge of the drive pulse, and the switches 411-4 and 411-4 are simultaneously closed at the falling edge of the drive pulse. −α.

411-α. 411'-4,411-8,411-
4 should be controlled. The same applies to other cases, so the effect of the present invention in the embodiment of FIG. 29.

The result is exactly the same as the embodiment shown in FIG. 27. In other words, it is possible to replace the part corresponding to the switch 11 of the recovery circuit 500 with the switch 411 shown in FIG. The effect remains unchanged ('1゜ [Effect of the invention] According to the present invention, a large number of drive electrodes of a matrix display panel can be driven with a small number of recovery circuits, and the number of drive electrodes connected to the recovery circuit changes with time. However, it has the effect of making the rise and fall times of the drive panel constant.
The recovery circuit can be easily applied to a 1x display panel, and there is an effect that the drive circuit can be easily reduced in power, cost, and compactness.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a drive circuit showing a first embodiment using one system of the recovery circuit of the present invention, FIG. 2 is a main drive signal timing chart for explaining the operation of FIG. 1, and FIG. The figure is a circuit diagram for explaining the principle operation of the recovery circuit used in the block diagram of Figure 1, Figure 4 is a signal waveform diagram for explaining the circuit of Figure 5, and Figure 5 is a circuit diagram for explaining the principle operation of the recovery circuit used in the block diagram of Figure 1. FIG. 6 is a circuit diagram showing a first configuration example of the variable inductor, FIG. 6 is a circuit diagram showing a second configuration example of the variable inductor in FIG. 1, and FIG. 7 is a circuit diagram showing a third configuration example of the variable inductor in FIG. 1. Figure 8 is a circuit diagram showing a circuit for controlling the circuit in Figure 6, Figure 9 is a circuit diagram showing a circuit for controlling the circuit in Figure 7, and Figure 10 is a circuit diagram for controlling the circuit in Figure 8. 11 and 12 are circuit diagrams showing a circuit for controlling the circuit, and FIG. 15 is a circuit diagram showing other configuration examples of the switch and recovery circuit in FIG. 1, respectively.
Fig. 14 is an applied signal waveform diagram for explaining the circuit operation of Figs. 11 and 12, respectively, and Fig. 15 shows the recovery circuit 2.
A block diagram corresponding to FIG. 1 for explaining the systematic system of the present invention in detail, FIG. 16 is a block diagram of a drive circuit showing an embodiment using a recovery circuit with other control, and FIG. The first variable capacitor in the recovery circuit used in the figure
18 is a circuit diagram showing a second embodiment of the variable capacitor shown in FIG. 16, and FIGS. 19 and 20 are circuit diagrams for controlling the circuits shown in FIGS. 17 and 18, respectively. FIG. 21 is a partial block diagram showing an embodiment of the present invention when the recovery circuit does not include a variable inductor or capacitor, and FIG. 22 is a circuit diagram showing the present invention in other drive electrodes of a plasma display. A block diagram of the drive circuit when the embodiment is applied, FIGS. 25, 24, and 25 are circuit diagrams showing a circuit that controls the variable inductor of FIG. 22, and FIG. 26 is a circuit diagram showing a circuit that controls the variable inductor of FIG. FIG. 27 is a circuit diagram showing another example of a recovery circuit using a variable inductor, and FIG. 28 is a block diagram showing another example of the structure of a recovery circuit using a variable inductor. Circuit diagram, FIG. 29 is a circuit diagram showing a specific example of the recovery circuit of FIG. 28. Explanation of symbols 1...Video input terminal 2...Synchronization control circuit 5...A/D mesori circuit 4...Auxiliary anode pulse generation circuit 5...Anode pulse generation circuit 6...Cathode pulse Generation circuit 7... Auxiliary anode driver 8... Cathode driver 10... Capacitor 11, 12.15.14.31. ro2.25.27.1
7.211. 212, 215. 214. 511, 512.
515. 514゜11, 411...Switch 15...Variable inductor CAI-CA...Anode stray capacitance Cs+~Csm...Auxiliary anode stray capacitance Cx+~C++
n...Cathode stray capacitance A+ -A tool...Anode terminal 81-8 scrap...Auxiliary anode terminal 1~2...Cathode terminal 20, 21.22. 21.21.421...Inductor 25...Saturable reactor 55...Current source 26, 28. 18... Capacitor 9... Memory type POP 309... Capacitor 41 matrix display panel 52...
Delay circuit 55.45...Encoder sa, 4a...D/A converter 55...Inverter 41...Shift register 42...Latch 30B...Vertical driver 506...Vertical scanning pulse generation Circuit 304...Horizontal scanning pulse generation circuit 501...Video input terminal 502...Synchronization control circuit 503...A/D memory circuit 411-c, all-d, all-c+ 4
11-d+411-d2. 411-cm, 41
1-ds , , , die 1l-cx ode

Claims (1)

[Claims] 1. A drive circuit for a matrix display panel in which a plurality of pixels are arranged in a matrix, comprising a plurality of changeover switches each having one end connected to a drive electrode of the matrix display panel;
a variable inductor that is connected to the other end of the changeover switch connected in parallel to form a resonant circuit with the capacitance of the drive electrode; A matrix display panel drive circuit characterized in that the value of the variable inductor is also controlled. 2. The variable inductor consists of a plurality of inductors and an open/close switch connected in series to each of the plurality of inductors, and the value of the inductor is determined by opening and closing the switch and composing the plurality of inductors. 2. A matrix display panel drive circuit according to claim 1, wherein the matrix display panel drive circuit is characterized in that: 3. The plurality of inductors constituting the variable inductor have values of 1, 1/2, 1/2^2, ... 1/
3. The matrix display panel drive circuit according to claim 2, wherein the inductor value has an inductor value with a ratio of 2^j, and the inductor value is synthesized by connecting a plurality of inductors having the inductor value in parallel. 4. The variable inductor is characterized in that the plurality of inductors constituting the variable inductor have equal inductance values, and the inductor values are synthesized by connecting the plurality of inductors having the same inductance values in parallel. The matrix display panel drive circuit according to claim 2. 5. The variable inductor has a saturable reactor and a current control circuit that controls the inductance value of the saturable reactor, and the current control circuit controls the saturable reactor according to a signal based on the number of openings and closings of the changeover switch of the drive electrode. 2. The matrix display panel driving circuit according to claim 1, wherein the matrix display panel driving circuit controls the inductor so that the value of the inductor changes. 6. A plurality of systems of the variable inductor and the changeover switch are provided, and the driving electrodes of the matrix display panel are divided, and the variable inductor and the changeover switch of each of the plurality of systems are used for driving. 2.Claim 3,
The matrix display panel drive circuit according to claim 4 or 5. 7. A drive circuit for a matrix display panel in which a plurality of pixels are arranged in a matrix, the plurality of changeover switches each having one end connected to a drive electrode of the matrix display panel;
an inductor connected to the other end of the parallel-connected changeover switch to form a resonant circuit with the capacitance of the drive electrode; and an inductor connected in parallel to the capacitance of the drive electrode to form a resonant circuit together with the capacitance of the drive electrode. a variable capacitor serving as a resonant capacitor, and a value of the variable capacitor is controlled in accordance with a change in a composite value of capacitances of the drive electrodes due to switching of the changeover switch. 8. The variable capacitor has a plurality of capacitors and an on/off switch connected in series to each of the plurality of capacitors, and the capacitance value is determined by opening/closing the on/off switch and composing the plurality of capacitors. 8. The matrix display panel drive circuit according to claim 7, wherein: is variable. 9. The variable capacitor according to claim 8, wherein the plurality of capacitors constituting the variable capacitor have a capacitance value with a ratio of 1, 2, 2^2, ...2^j, and have the capacitance value. 9. The matrix display panel driving circuit according to claim 8, wherein a plurality of capacitors are connected in parallel to synthesize a capacitance value. 10. The variable capacitor is characterized in that the plurality of capacitors constituting it have equal capacitance values, and the capacitance values are synthesized by connecting the plurality of capacitors having the same capacitance values in parallel. The matrix display panel drive circuit according to claim 8. 11. A plurality of systems of the inductor, the changeover switch, and the variable capacitor are provided, and the drive electrodes of the matrix display panel are divided and driven for each system. The matrix display panel drive circuit according to claim 10. 12. A drive circuit for a matrix display panel in which a plurality of pixels are arranged in a matrix, which includes an inductor, a plurality of external capacitors whose ends are grounded in an alternating current manner, a drive electrode of the matrix display panel, and the external capacitor. the other end of the capacitor and the inductor, the inductor and the drive electrode capacitor or the external capacitor are configured to form a resonant circuit, and the value of the external capacitor is A matrix display panel drive circuit characterized in that the capacitance value of the corresponding drive electrode is set substantially equal to the capacitance value of the drive electrode. 13. A plurality of systems are provided with the inductor, the changeover switch, and the external capacitor, and the drive electrodes of the matrix display panel are divided and driven for each system.
The described matrix display panel drive circuit. 14. The matrix display panel is a memory type plasma display panel driven by an anode electrode, an auxiliary anode electrode, and a cathode electrode, and the drive electrode is connected to the anode electrode. 6. The matrix display panel drive circuit according to any one of 6. 15. The matrix display panel is a memory-type plasma display panel driven by an anode electrode, an auxiliary anode electrode, and a cathode electrode, and the drive electrode is connected to the anode electrode, and the variable inductor is connected to the anode of the memory-type plasma display panel. 7. The matrix display panel drive circuit according to claim 1, wherein the matrix display panel drive circuit is controlled by a signal based on a drive panel. 16. The matrix display panel is a liquid crystal display panel, and the variable inductor is controlled by a signal based on a horizontal scanning panel of the matrix display panel. matrix display panel drive circuit.