JPH028497B2 - - Google Patents

Info

Publication number
JPH028497B2
JPH028497B2 JP17242484A JP17242484A JPH028497B2 JP H028497 B2 JPH028497 B2 JP H028497B2 JP 17242484 A JP17242484 A JP 17242484A JP 17242484 A JP17242484 A JP 17242484A JP H028497 B2 JPH028497 B2 JP H028497B2
Authority
JP
Japan
Prior art keywords
signal
circuit
level
mute
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP17242484A
Other languages
Japanese (ja)
Other versions
JPS6152032A (en
Inventor
Yoshihisa Takeda
Shoji Iwasaki
Shigeru Takeuchi
Tetsuyuki Mannaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Faurecia Clarion Electronics Co Ltd
Original Assignee
Clarion Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Clarion Co Ltd filed Critical Clarion Co Ltd
Priority to JP17242484A priority Critical patent/JPS6152032A/en
Publication of JPS6152032A publication Critical patent/JPS6152032A/en
Publication of JPH028497B2 publication Critical patent/JPH028497B2/ja
Granted legal-status Critical Current

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  • Noise Elimination (AREA)

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は受信機に使用されるミユート回路に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to a mute circuit used in a receiver.

[従来の技術] 従来のこの種のミユート回路は、第4図に示す
ように、信号レベル検出回路28が入力信号を所
定のしきい値レベルと比較して、入力信号がしき
い値レベルを上回つているとき「L」レベルとな
る第5図に示すような信号を発生し、この
信号が「H」レベルのとき(すなわち入力信号が
しきい値レベルを下回つているとき)ミユート実
行回路26が出力信号にミユートをかけて不要な
ノイズを除去するようになつていた。
[Prior Art] As shown in FIG. 4, in a conventional mute circuit of this type, a signal level detection circuit 28 compares an input signal with a predetermined threshold level, and determines whether the input signal exceeds the threshold level. When the input signal is above the threshold level, a signal as shown in Fig. 5 is generated which becomes "L" level, and when this signal is "H" level (that is, when the input signal is below the threshold level), mute is executed. The circuit 26 muted the output signal to remove unnecessary noise.

[発明が解決しようとする問題点] しかしながら、このような従来のものは、安定
した強電界が得られる受信環境においては有効で
あるが、たとえば移動無線局のようにフエージン
グ等によつて入力信号がしきい値レベルを越えて
その上下に変動する場合には、逆に受信信号その
ものが非常に聴き取りにくくなつてしまう。その
ため、しきい値レベルを下げたり、またはミユー
トを止める等の操作をしなければならなくて不便
である等の問題点があつた。
[Problems to be Solved by the Invention] However, although these conventional methods are effective in a receiving environment where a stable and strong electric field can be obtained, for example, in a mobile radio station, the input signal may be affected by fading, etc. If the signal exceeds the threshold level and fluctuates above and below it, the received signal itself becomes very difficult to hear. Therefore, there were problems such as the inconvenience of having to perform operations such as lowering the threshold level or stopping the mute.

この発明は上記従来のもののもつ問題点を解決
して、入力信号がしきい値レベルを越えてその上
下に変動しても受信信号を良好に聴き取ることの
できるミユート回路を提供することを目的とする
ものである。
An object of the present invention is to solve the problems of the above-mentioned conventional circuits and to provide a mute circuit that allows a received signal to be heard well even if the input signal exceeds the threshold level and fluctuates above and below the threshold level. That is.

[問題点を解決するための手段] この発明は上記目的を達成するため、入力信号
が所定のレベルを下回つているとき出力信号にミ
ユートをかけるミユート実行回路と、入力信号が
あらかじめ決められた頻度を上回つて前記レベル
の上下に変動するとき前記ミユート実行回路のミ
ユートを解除させる回路とを具えたものである。
[Means for Solving the Problems] In order to achieve the above object, the present invention includes a mute execution circuit that mutes an output signal when the input signal is below a predetermined level, and a mute execution circuit that mutes the output signal when the input signal is below a predetermined level. and a circuit for canceling the mute of the mute execution circuit when the mute level fluctuates above and below the level more than the frequency.

[作用] この発明は上記手段を採用したことにより、た
とえば受信環境が弱電界から強電界に、またはこ
れとは逆に変化して入力信号が所定のレベル(し
きい値レベル)の上下に変動するとき、入力信号
が安定するまでの間、ミユートをかけることを自
動的に中断することとなる。
[Function] By employing the above means, the present invention allows the input signal to fluctuate above and below a predetermined level (threshold level), for example, when the receiving environment changes from a weak electric field to a strong electric field, or vice versa. When this happens, muting is automatically interrupted until the input signal stabilizes.

[実施例] 以下、図面に示すこの発明の実施例について説
明する。
[Example] Hereinafter, an example of the present invention shown in the drawings will be described.

第1図はこの発明の一実施例を示し、1はアン
テナ、2は混合回路、3は局部発振回路、4は
IF回路、5は検波回路、6はミユート実行回路、
7はスピーカ、8はアンテナ1から混合回路2お
よびIF回路4を通つた入力信号を所定のしきい
値レベルと比較して、入力信号がしきい値レベル
を上回つているとき「L」レベルとなる信号
を発生する信号レベル検出回路、9はミユート
制御回路であつて、信号の状態があらかじ
め決められた頻度(たとえば一定時間内の変化の
回数)を上回つて変化するとき「L」レベルとな
る信号(ミユート解除信号)を発生する
信号レベル変化判断回路10と、信号と
OPEN信号とがともに「H」レベルのとき
「H」レベルのMUTE信号(ミユート信号)を
発生するAND回路11とから構成されている。
そしてミユート実行回路6は、MUTE信号が
「H」レベルのとき出力信号にミユートをかけて
不要なノイズを除去するようになつている。
FIG. 1 shows an embodiment of the present invention, where 1 is an antenna, 2 is a mixing circuit, 3 is a local oscillation circuit, and 4 is a local oscillation circuit.
IF circuit, 5 is a detection circuit, 6 is a mute execution circuit,
7 is a speaker, 8 is an input signal that has passed through the mixing circuit 2 and IF circuit 4 from the antenna 1 and is compared with a predetermined threshold level, and when the input signal exceeds the threshold level, the signal goes to "L" level. 9 is a mute control circuit which generates a signal that changes to "L" level when the state of the signal changes more than a predetermined frequency (for example, the number of changes within a certain period of time). A signal level change judgment circuit 10 that generates a signal (mute cancellation signal), and a signal
It is composed of an AND circuit 11 that generates a MUTE signal at the "H" level when both the OPEN signals are at the "H" level.
The mute execution circuit 6 is configured to mute the output signal to remove unnecessary noise when the MUTE signal is at the "H" level.

上記のミユート回路は、受信環境が弱電界から
強電界に変化する場合、第2図に示すように、
CD信号の状態変化があらかじめ決められた頻
度を上回るまでの微小時間は信号が
「H」レベルのままであるためMUTE信号は
CD信号に連動するが、前記の頻度を上回ると
OPEN信号が「L」レベルとなるため信号
の引続く状態変化にかかわらずMUTE信号
は「L」レベルとなつてミユートが解除されて中
断し、その後信号の安定状態が一定時間持
続すると信号が「H」レベルとなつて
CD信号とMUTE信号とが連動することとな
る。
When the receiving environment changes from a weak electric field to a strong electric field, the above-mentioned miute circuit, as shown in Fig. 2,
The MUTE signal remains at the "H" level for a short period of time until the state change of the CD signal exceeds a predetermined frequency.
It is linked to the CD signal, but if the frequency exceeds the above
Since the OPEN signal goes to the "L" level, the MUTE signal goes to the "L" level regardless of the subsequent state change of the signal, and the mute is canceled and interrupted. After that, if the signal remains stable for a certain period of time, the signal goes to the "L" level. Became “H” level
The CD signal and MUTE signal will be linked.

また、受信環境が強電界から弱電界に変化する
場合は第3図に示すように動作し、この場合も第
2図の場合と同様であるので説明を省略する。
Further, when the receiving environment changes from a strong electric field to a weak electric field, the operation is as shown in FIG. 3, and since this case is also the same as the case of FIG. 2, the explanation will be omitted.

なお、上記実施例では信号レベル検出回路8を
使用したがこれに代えてスケルチ回路を使用して
もよく、また信号レベル変化判断回路10はタイ
マ、カウンタおよびラツチを使用したハードロジ
ツクによつて簡単に構成することができるし、ま
たAND回路11を含めてミユート制御回路9全
体をマイクロコンピユータによつて構成してもよ
い。
Although the signal level detection circuit 8 is used in the above embodiment, a squelch circuit may be used in place of this, and the signal level change judgment circuit 10 can be easily implemented by hardware logic using a timer, counter, and latch. Alternatively, the entire mute control circuit 9 including the AND circuit 11 may be configured by a microcomputer.

[発明の効果] この発明は上記のように構成したので、入力信
号が所定のレベルの上下に変動しても受信信号を
良好に聴き取ることができ、そのためフエージン
グの激しい移動無線局に最適である他、一般の無
線システムまたは劣悪環境下の有線通信システム
にも適用することができる等のすぐれた効果を有
するものである。
[Effects of the Invention] Since the present invention is configured as described above, the received signal can be heard well even if the input signal fluctuates above and below a predetermined level, and is therefore ideal for mobile radio stations that experience severe fading. In addition, it has excellent effects such as being applicable to general wireless systems or wired communication systems in poor environments.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示すブロツク
図、第2,3図は第1図のものの動作を示すタイ
ミングチヤート、第4図は従来のものの一例を示
すブロツク図、第5図は第4図のものの動作を示
すタイミングチヤートである。 1,21……アンテナ、2,22……混合回
路、3,23……局部発振回路、4,24……
IF回路、5,25……検波回路、6,26……
ミユート実行回路、7,27……スピーカ、8,
28……信号レベル検出回路、9……ミユート制
御回路、10……信号レベル変化判断回路、11
……AND回路。
FIG. 1 is a block diagram showing an embodiment of the present invention, FIGS. 2 and 3 are timing charts showing the operation of the device shown in FIG. 1, FIG. 4 is a block diagram showing an example of the conventional device, and FIG. 4 is a timing chart showing the operation of the device shown in FIG. 4. 1, 21... Antenna, 2, 22... Mixing circuit, 3, 23... Local oscillation circuit, 4, 24...
IF circuit, 5, 25...Detection circuit, 6, 26...
Mute execution circuit, 7, 27... speaker, 8,
28...Signal level detection circuit, 9...Mute control circuit, 10...Signal level change judgment circuit, 11
...AND circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 入力信号が所定のレベルを下回つているとき
出力信号にミユートをかけるミユート実行回路
と、入力信号があらかじめ決められた頻度を上回
つて前記レベルの上下に変動するとき前記ミユー
ト実行回路のミユートを解除させる回路とを具え
ていることを特徴とするミユート回路。
1. A mute execution circuit that mutes an output signal when the input signal is below a predetermined level, and a mute execution circuit that mutes the output signal when the input signal fluctuates above and below the level more than a predetermined frequency. A miute circuit characterized by comprising a circuit for releasing the .
JP17242484A 1984-08-21 1984-08-21 Muting circuit Granted JPS6152032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17242484A JPS6152032A (en) 1984-08-21 1984-08-21 Muting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17242484A JPS6152032A (en) 1984-08-21 1984-08-21 Muting circuit

Publications (2)

Publication Number Publication Date
JPS6152032A JPS6152032A (en) 1986-03-14
JPH028497B2 true JPH028497B2 (en) 1990-02-26

Family

ID=15941711

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17242484A Granted JPS6152032A (en) 1984-08-21 1984-08-21 Muting circuit

Country Status (1)

Country Link
JP (1) JPS6152032A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS643342U (en) * 1987-06-26 1989-01-10
JP5115441B2 (en) * 2008-10-16 2013-01-09 アイコム株式会社 COMMUNICATION DEVICE, COMMUNICATION DEVICE CONTROL METHOD, AND COMPUTER PROGRAM

Also Published As

Publication number Publication date
JPS6152032A (en) 1986-03-14

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