JPH0284834A - Inter-cross polarization interference compensator - Google Patents

Abstract

PURPOSE:To prevent inter-cross polarization interference compensating capacity from being lowered and to operate a device at code speed by compensating delay difference between a main polarization and a cross polarization being generated due to fading on a transmission path, etc., adaptively and providing a phase control circuit, etc. CONSTITUTION:A cross polarization demodulation circuit 41 identifies and demodulates the signal of inputted cross polarization, and a clock generation circuit 42 generates a clock to be used in the decision of the timing of signal identification at the circuit 41. Also, the phase control circuit 45 judges the direction of the phase of a timing clock to obtain the optimum interference compensation effect by adjusting in a direction to lead or lag based on relation between the error of a main polarization demodulation signal before applying interference compensation and the inclination of a compensation signal. Then, the phase of the timing clock supplied from the circuit 42 to the circuit 41 is adjusted in a direction of judged result. In such a way, the compensation signal is generated at a compensation signal generation circuit 43 based on the demodulation signal whose identification timing is set at the optimum level, and the inter-cross polarization interference compensation capacity can be prevented from being lowered by suppressing an interference signal, in the main polarization by using the compensation signal, and also, the device can be operated at the code speed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Summary) This invention relates to a cross-polarization interference compensation device in a cross-polarization shared transmission system receiver.

An interference system that adaptively compensates for the delay difference between the main polarization and the cross-polarization caused by fading in the transmission path, prevents the cross-polarization interference compensation ability from decreasing, and operates at the code speed. The purpose is to provide a compensation device.

a cross-polarization demodulation circuit that identifies and demodulates cross-polarization signals;
A clock generation circuit that generates a clock used to determine the timing of signal identification in the cross-polarization demodulation circuit, a compensation signal generation circuit that generates a compensation signal that cancels an interference signal based on the demodulation signal of the cross-polarization demodulation circuit, and a compensation signal. A synthesis circuit that removes the interference signal in the main polarization using the compensation signal of the generation circuit, and an interference signal suppression effect based on the relationship between the error of the main polarization demodulated signal before interference compensation and the slope of the compensation signal. and a phase control circuit for controlling the phase of the clock of the clock generation circuit so that the phase of the clock of the clock generation circuit is increased.

(Industrial Application Field) The present invention relates to a cross-polarization interference compensation device in a cross-polarization shared transmission system receiver.

(Conventional technology) In order to improve the efficiency of using 8 frequencies in digital wireless communication systems, multi-leveling is being promoted, and currently 256 QA
The M method has even been introduced to test lines for practical use. Along with this multi-value.

Attempts have also been made to simply double the transmission capacity in the same frequency band compared to the conventional single-polarization transmission system by sharing the polarization planes of the main polarization and cross-polarization.

A communication system based on this cross-polarization shared transmission method is shown in Figure 7. In Figure 7, 20 and 30 are transmitters for vertical polarization V and horizontal polarization H, respectively, and 21 to 27 are on the vertical polarization V side. The receiving devices 31 to 37 are horizontally polarized H side receiving devices.

21.31 is a receiving section, and 22.32 is a demodulation circuit.

23.33 is a discriminator that identifies main polarization signals; 24.3
4 is a discriminator that discriminates signals on the cross-polarized side.

25.35 is a transversal equalizer that equalizes the demodulated signal of the main polarization, 26.3'6 is a compensation signal generation circuit that generates a compensation signal for removing the interference signal in the main polarization, 2
7.37 is a synthesis circuit that removes interference signals by subtracting a compensation signal from the main polarization. Here, the compensation signal generation circuits 26 and 36 generally use transversal filters.

This system uses vertical polarization V and horizontal polarization H in a wireless transmission path.
When interference occurs between the two polarized waves and one polarized wave (main polarized wave) leaks into the other polarized wave (cross polarized wave) as an interference wave, in the receiving device on the main polarized side.

A compensation signal having a frequency characteristic opposite to that of the interference signal in the main polarization is created by waveform-shaping the cross-polarized waves, and this compensation signal cancels the interference signal to compensate for the interference between the cross-polarized waves. A cross-polarization interference compensator is used to suppress this interference between polarizations.

FIG. 8 shows a cross-polarization interference compensation device in the case where the vertical polarization V is the main polarization. As shown in FIG. 8, the discriminators 23 and 24 are composed of A/D converters, A/
As the timing clock for the D converters 23 and 24, the clock cycle of the data signal extracted and reproduced from the demodulation circuit 22 in the clock reproduction circuit 28 is used.

[Problem to be solved by the invention]

In a conventional cross-polarization interference compensation device, the compensation ability is degraded if there is a delay difference between the interference signal included in the main polarization and the compensation signal for interference wave compensation created on the receiving side. This delay difference occurs based on the propagation distance difference between the main polarization and the cross polarization due to multipath fading in the wireless transmission path.

The above-mentioned decrease in compensation ability can be explained as follows. FIG. 9 shows the phase relationship between the main polarization and the cross-polarization just before cross-polarization interference occurs in the transmission path. Here, the interference wave to the main polarization is naturally in the same phase as the cross polarization.

On the other hand, when the main polarized wave and the cross-polarized wave are received by the receiving device in a state where there is a propagation path difference between them in the transmission path, the phase relationship between the main polarized wave and the cross-polarized wave is shown in Fig. 1θ, for example. As shown in FIG. 9, the phase of the cross-polarized waves is delayed by τ compared to the phase relationship shown in FIG. In the discriminator of the demodulation circuit of the receiving device, t1
', both the main polarization and the cross polarization are identified at time t2.

Here, what is the suppression of interference signals leaking into the main polarization?

This is done by subtracting from the main polarization a compensation signal that has been waveform-shaped with cross-polarized waves so that the characteristics are equal to those of this interference signal. However, since the compensation signal is generated based on the cross-polarized wave identified with a phase different from that of the interference signal in the main polarization, the error between the compensation signal and the interference signal is large (
Therefore, the compensation ability decreases.

When there is a propagation delay difference between the main polarization and the cross polarization in this way, the conventional method is as shown in FIG. 8, for example.

By matching the delay differences between A and A' on the input side of the discriminators 23 and 24, the phases of the interference signal and the compensation signal included on the main polarization side are set to be in an optimal state.

However, if a random delay difference occurs between the main polarization and the cross-polarization due to multipath fading in the transmission path, this cannot be compensated for, and the interference compensation ability of the cross-polarization interference compensator is limited. Significant deterioration is inevitable.

As a countermeasure for this, T
Instead of a space-type transversal filter, a
The device may be constructed using a fractional space type transversal filter that is not affected by delay, such as a T/2 space type tosi transversal filter. However, in this case, the operation clock of the discriminator is slower than that of the T space type Therefore, the A/D converter used is required to have twice the operating speed.

Therefore, it is an object of the present invention to adaptively compensate for the delay difference between the main polarization and the cross-polarization caused by fading in the transmission path, to prevent the deterioration of the cross-polarization interference compensation ability, and to The object of the present invention is to provide an interference compensation device that operates at high speed.

[Means to solve the problem]

FIG. 1 is a principle block diagram according to the present invention.

The cross-polarization interference compensation device according to the present invention includes a cross-polarization demodulation circuit 41 that identifies and demodulates a cross-polarization signal, and a clock that generates a clock used to determine the timing of signal identification in the cross-polarization demodulation circuit 41. a generation circuit 42; a compensation signal generation circuit 43 that generates a compensation signal that cancels the interference signal based on the demodulated signal of the cross-polarization demodulation circuit 41; The phase of the clock of the clock generation circuit 42 is adjusted so that the effect of suppressing the interference signal becomes greater based on the relationship between the error of the main polarization FFFI signal before interference compensation and the slope of the compensation signal. [Function] The phase control circuit 45 advances the phase of the timing clock based on the relationship between the error of the main polarization demodulated signal before interference compensation and the slope of the compensation signal. It is determined in which direction the delay should be adjusted in order to obtain the optimal interference compensation effect, and the phase of the timing clock supplied from the clock generation circuit 42 to the cross-polarization demodulation circuit 41 is adjusted in that direction. . A compensation signal is generated in the compensation signal generation circuit 43 based on the demodulated signal whose identification timing is optimized in this way, and this is used to suppress the interference signal in the main polarization.

〔Example〕

The present invention will be described in detail below with reference to two drawings. FIG. 2 is a block diagram showing a cross-polarization interference compensation device as an embodiment of the present invention. This embodiment device uses 64-value QAM
Although the present invention is applied to a system receiver, only a circuit for channel 1 is shown in the drawing for the sake of simplification. Also, interference between the I channel and Q channel is ignored here.

In FIG. 2, the received main polarized wave is demodulated by a demodulation circuit 1, and the signal level of the output signal is discriminated by a discriminator 2 consisting of an A/D converter. In this example, 64-value CAM
Therefore, the number of levels (multilevel number) of the demodulated signal of the main polarization is 8, and 3 bits (PI, P2
．． In addition to the data signal of P3), 2 bins) (1) 4,
It is assumed that a total of 5-bit signals including an error signal of Pζ) are output.

After the distortion of the output signal from the discriminator 2 is equalized by an equalizer 3, the interference wave component is removed by a subtracter 9.

It is output as output data Do.

On the other hand, the cross-polarized waves are demodulated by a demodulation circuit 6 and input to a discriminator 7 consisting of an A/D converter, where the level is discriminated, and then input to a compensation signal generation circuit 8 consisting of a T-space type transversal filter. Ru. The compensation signal generation circuit 8 generates a compensation signal for canceling the interference wave signal in the main polarization.
It is generated based on the output signal of the a-divider 7 and sent to the subtracter 9.

Reference numeral 4 denotes a clock regeneration circuit which extracts and regenerates a clock having the period of the information symbol from the demodulated signal of the main polarization. This clock is supplied to the discriminator 2 and used as a timing clock for signal discrimination, and is also supplied to the discriminator 7 after being shifted by the phase amount formed by the phase shifter 5, and is used as a timing clock for signal discrimination. It is said to be 7 years old.

The phase amount of the phase shifter 5 is adaptively controlled by a control circuit 10. The control circuit 1O includes a slope determination circuit 11, a control stop determination circuit 12. Correlator 13. It is configured to include an integrating circuit 14 and the like.

The compensation signal ym from the compensation signal generation circuit 8 is input to the slope determination circuit 11, which determines whether the slope of the compensation signal 7 is positive or negative and outputs it as a slope signal 9 to the correlator 13. For example, as shown in FIG. 3, this slope determination circuit 11 includes two delay elements 111 and 112 connected in series, and a ROMI l3 whose input and output are used as address inputs.
The slope of the signal transition of the compensation signal 7 at time to in the eye diagram as shown in FIG. 4 is determined and outputted as the slope signal 9.

The control stop determination circuit 12 receives an error signal a2 between the compensation signal yx from the compensation signal generation circuit 8 and the interference-compensated main polarization output data D from the subtracter 9 (lower 2 of the output data D).
Based on these signals, it is determined whether or not to stop the phase shift operation of the phase shifter 5, and the error signal ε1 and/or the compensation signal y are respectively generated. If the value is smaller than a certain value, an operation stop signal is output to the integrating circuit 14.

The correlation 313 consists of an exclusive OR circuit, and p! ! The nine slope signals from the bias determination circuit 11 and the error signal ε1 of the data signal before interference compensation from the equalizer 3 (P4 and P5 of the lower two bits of the output data of the equalizer 3) are input. The correlation between the positive and negative values of the slope signal 9 and the positive and negative values of the error signal ε1 is determined by exclusive OR, and the result is "O" or "
l' is output to the signal integration circuit 14.

The integration circuit 14 is composed of an up/down counter that counts constant period clocks, and is configured to switch between an amplifier count mode and a down count mode according to the output signal from the correlator 13, and phase-shifts the count value. Output to device 5.

Then, upon receiving a stop signal from the control stop determination circuit 12, the integrating operation (counting operation) is stopped.

The operation of the example device will be described below. The interference signal contained in the main polarization is canceled by the compensation signal y generated by the compensation signal generation circuit 8, thereby performing interference compensation. At this time, it is necessary that the error between the interference signal and the compensation signal be small in order to increase the interference compensation effect. 5, it is necessary to adjust it appropriately.

This phase adjustment method is performed in detail as follows. That is, as shown in FIG.

If we know whether the slope of the compensation signal y+t is positive or negative and whether the error signal a1 is positive or negative, it is possible to determine whether the phase of the identification timing clock of the 9WA separate unit 7 should be moved in the advance or delay direction to obtain the optimal identification timing. can.

Therefore, the correlation between the positive and negative slopes of the compensation signal yx and the error signal ε is determined by the correlator 13, and based on the result, an output signal of an advance instruction or a delay instruction is outputted to the integration circuit 14.

The integrating circuit 14 performs up/down counting according to this lead/lag output, and the phase shifter 5 performs up/down counting according to the count value.
The phase lead/lag direction and the amount of deviation thereof are controlled.

As a result, the interference compensation process has been properly performed, so when the error signal C2 of the output data Do after interference compensation becomes smaller than a predetermined value, the control stop determination circuit 12 detects this and the integrator circuit 14 is stopped to fix the phase state. Furthermore, if the compensation signal y+t is smaller than a predetermined value, it can be determined that the value of the interference wave is also small.

In such a case, interference compensation processing is not necessary.

The control stop determination circuit 12 detects this and stops the operation of the integrating circuit 14 to fix the phase.

Various modifications are possible in carrying out the present invention. For example, the above-described embodiment was based on a transversal filter having a one-dimensional configuration.

Of course, this is not limited to this.9 For example, in a multi-level QAM type communication device, orthogonal 2
The invention can be implemented using transversal filters of dimensional configuration. FIG. 6 is a diagram showing the configuration of the compensation signal generation circuit portion in the case of such a two-dimensional configuration. Four transversal filter sections are provided in the compensation signal generation circuit so as to also compensate for interference between the channel and the Q channel.

It is also clear that the present invention is applicable to either analog or digital circuits.

〔Effect of the invention〕

According to the present invention, even if the delay difference between the main polarization and the cross-polarization changes randomly due to fading or the like, this is compensated for by adaptively controlling the signal identification timing on the cross-polarization side, and the delay difference is absorbed. This can prevent the ability to compensate for cross-polarized waves from being degraded due to the occurrence of a delay difference between polarized waves. Furthermore, the transversal filter used to generate the compensation signal can be of the T-space type, and as a result, when the code speed is increased compared to the fractional-space type, restrictions on the upper limit of the frequency of the elements used can be relaxed. can.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the principle of the present invention; FIG. 2 is a block diagram showing an embodiment of the present invention and a cross-polarization interference compensating device. FIG. 3 is a block diagram showing the configuration of a control stop determination circuit of the embodiment device. 4 and 5 are explanatory diagrams of the operation of the embodiment device. FIG. 6 is a block diagram of a modification in which the present invention is applied to a two-dimensional cross-polarization interference compensation device. FIG. 7 is a block diagram showing a schematic configuration example of a conventional polarization sharing system. FIG. 8 is a block diagram showing a conventional cross-polarization interference compensation device. FIG. 9 and FIG. 10 are diagrams explaining the reason why the interference compensation ability decreases due to the delay difference between polarized waves. In fig. 1.6.22.32--Demodulation circuit 2.7, 23.24.33.34--Discriminator 3.25
．． 36...Equalizer 4.28-Clock regeneration circuit 5-Phase shifter 8.26.36--Compensation signal generation circuit 9-Subtractor 10-111 Control circuit 11--Slope determination circuit 12 - Control stop judgment circuit 13 - Correlator 14 - Integrator circuit Present invention 1 Kui ice - 6,59i, ring block diagram Figure 1 Figure 5 (ADD) Itosa 411 constant circuit @f; Minute 11 11 3 4 Fig. Orthogonal 2 source isolation 1; J Locator shape tide 11 Fig. 6 11 generation stop of editing common system Fig. 7 Thousand cross dance It jL! As a follow-up, the current correlation at the time of J1 season 39-1 is shown in Figure 9.

Claims (1)

[Claims] A cross-polarization interference compensation device for suppressing the influence of interference waves in the main polarization leaking from the cross-polarization in a cross-polarization shared transmission system receiver, the device comprising: A cross-polarization demodulation circuit (4) that identifies and demodulates
1) A clock generation circuit (42) that generates a clock used to determine the timing of signal identification in the cross-polarization demodulation circuit; and a compensation circuit that generates a compensation signal that cancels the interference signal based on the demodulation signal of the cross-polarization demodulation circuit. a signal generation circuit (43), a synthesis circuit (44) that removes the interference signal in the main polarization using the compensation signal of the compensation signal generation circuit, and a synthesis circuit (44) that removes the interference signal in the main polarization demodulated signal before the interference compensation. A cross-wave interference compensation device comprising: a phase control circuit (45) that controls the phase of the clock of the clock generation circuit so that the interference signal suppression effect is increased based on the relationship with the slope of the compensation signal.