JPH0284432U - - Google Patents

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Publication number
JPH0284432U
JPH0284432U JP16420088U JP16420088U JPH0284432U JP H0284432 U JPH0284432 U JP H0284432U JP 16420088 U JP16420088 U JP 16420088U JP 16420088 U JP16420088 U JP 16420088U JP H0284432 U JPH0284432 U JP H0284432U
Authority
JP
Japan
Prior art keywords
digital signal
pll circuit
selection circuit
section
selection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16420088U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16420088U priority Critical patent/JPH0284432U/ja
Publication of JPH0284432U publication Critical patent/JPH0284432U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示すブロツク図、
第２図ａ，ｂは本考案の説明に供するタイミング
チヤート図。 １……制御装置、２……デイジタル信号選択回
路、３……ＤＡＩＦ復調器、４……デイジタルフ
イルタ、５……Ｄ／Ａ変換器、６，７……インバ
ータ、８……ＡＮＤ回路、１０〜１２……入力端
子、１３……出力端子、ＳＷ１〜ＳＷ３……スイ
ツチ、Ｑ１〜Ｑ３……トランジスタ、Ｄ１〜Ｄ３
……発光ダイオード。 FIG. 1 is a block diagram showing an embodiment of the present invention.
FIGS. 2a and 2b are timing charts for explaining the present invention. DESCRIPTION OF SYMBOLS 1... Control device, 2... Digital signal selection circuit, 3... DAIF demodulator, 4... Digital filter, 5... D/A converter, 6, 7... Inverter, 8... AND circuit, 10 ~12...Input terminal, 13...Output terminal, SW1-SW3...Switch, Q1-Q3...Transistor, D1-D3
...Light emitting diode.

Claims (1)

【実用新案登録請求の範囲】 入力される複数のデイジタル信号のうち一つの
デイジタル信号を選択すべく操作される入力切換
操作部と、 該入力切換操作部の操作に基づき、対応するデ
イジタル信号を選択する選択回路と、 選択されたデイジタル信号に含まれるクロツク
信号にロツク可能なＰＬＬ回路と、 前記選択回路の選択動作を表示すべく、複数の
表示器からなる表示部と、 前記選択回路の選択動作に対応して前記複数の
表示器のうち一の表示器を点燈制御すると共に、
前記ＰＬＬ回路が前記選択回路によつて選択され
たデイジタル信号にロツクした場合、前記一の表
示器を第１の点燈状態に、また、前記ＰＬＬ回路
が前記選択回路によつて選択されたデイジタル信
号にロツクしない場合、前記一の表示器を第２の
点燈状態に制御する制御部とからなることを特徴
とするデイジタル信号切換装置。[Claims for Utility Model Registration] An input switching operation section that is operated to select one digital signal from among a plurality of input digital signals, and a corresponding digital signal is selected based on the operation of the input switching operation section. a PLL circuit capable of locking to a clock signal included in the selected digital signal; a display section comprising a plurality of indicators for displaying the selection operation of the selection circuit; controlling one of the plurality of indicators to turn on in response to the above, and
When the PLL circuit locks to the digital signal selected by the selection circuit, the one indicator is turned on in the first lighting state, and the PLL circuit locks to the digital signal selected by the selection circuit. 1. A digital signal switching device comprising: a control section that controls said one display to a second lighting state when the signal is not locked.
JP16420088U 1988-12-19 1988-12-19 Pending JPH0284432U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16420088U JPH0284432U (en) 1988-12-19 1988-12-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16420088U JPH0284432U (en) 1988-12-19 1988-12-19

Publications (1)

Publication Number Publication Date
JPH0284432U true JPH0284432U (en) 1990-06-29

Family

ID=31449604

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16420088U Pending JPH0284432U (en) 1988-12-19 1988-12-19

Country Status (1)

Country Link
JP (1) JPH0284432U (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5884341A (en) * 1981-11-12 1983-05-20 Toshiba Corp Signal processing method
JPS58187874A (en) * 1982-04-26 1983-11-02 Chino Works Ltd Input switching circuit
JPS59171212A (en) * 1983-03-17 1984-09-27 Matsushita Electric Ind Co Ltd Tuning display device
JPS6081923A (en) * 1983-10-12 1985-05-10 Nec Corp Phase synchronous oscillating device
JPS6370952A (en) * 1986-09-12 1988-03-31 Mitsubishi Electric Corp Cassette tape deck
JPS63142715A (en) * 1986-12-04 1988-06-15 Nec Corp Subordinate synchronization circuit
JPS63151219A (en) * 1986-12-16 1988-06-23 Fujitsu Ltd Pll oscillator

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5884341A (en) * 1981-11-12 1983-05-20 Toshiba Corp Signal processing method
JPS58187874A (en) * 1982-04-26 1983-11-02 Chino Works Ltd Input switching circuit
JPS59171212A (en) * 1983-03-17 1984-09-27 Matsushita Electric Ind Co Ltd Tuning display device
JPS6081923A (en) * 1983-10-12 1985-05-10 Nec Corp Phase synchronous oscillating device
JPS6370952A (en) * 1986-09-12 1988-03-31 Mitsubishi Electric Corp Cassette tape deck
JPS63142715A (en) * 1986-12-04 1988-06-15 Nec Corp Subordinate synchronization circuit
JPS63151219A (en) * 1986-12-16 1988-06-23 Fujitsu Ltd Pll oscillator

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