JPH0277920U - - Google Patents

Info

Publication number
JPH0277920U
JPH0277920U JP15693088U JP15693088U JPH0277920U JP H0277920 U JPH0277920 U JP H0277920U JP 15693088 U JP15693088 U JP 15693088U JP 15693088 U JP15693088 U JP 15693088U JP H0277920 U JPH0277920 U JP H0277920U
Authority
JP
Japan
Prior art keywords
power amplifying
resistor
amplifying transistor
transistor
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15693088U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15693088U priority Critical patent/JPH0277920U/ja
Publication of JPH0277920U publication Critical patent/JPH0277920U/ja
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示す一部省略電気回
路図、第2図はハイブリツドICの同一部省略電
気回路図、第3図は従来例を示す一部省略電気回
路図である。 同図中、2はハイブリツドIC、3は負荷、2
1はリレードライバ、Q1〜Q3とQ21はトラ
ンジスタ、Q11〜Q17はハイブリツドICを
構成するトランジスタ、D1とD2はダイオード
、C1〜C3はコンデンサ、R1〜R22は抵抗
、Ryはリレーである。
FIG. 1 is a partially omitted electric circuit diagram showing an embodiment of the present invention, FIG. 2 is a partially omitted electric circuit diagram of a hybrid IC, and FIG. 3 is a partially omitted electric circuit diagram showing a conventional example. In the figure, 2 is a hybrid IC, 3 is a load, 2
1 is a relay driver, Q1 to Q3 and Q21 are transistors, Q11 to Q17 are transistors forming a hybrid IC, D1 and D2 are diodes, C1 to C3 are capacitors, R1 to R22 are resistors, and Ry is a relay.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電力増幅トランジスタを含む音声等の電力増幅
装置の同電力増幅トランジスタに直列に接続した
抵抗を介し、同抵抗に流れる電流が増大したとき
、同抵抗により同電流の増大を電圧検出し、同検
出電圧に基づきコンデンサと抵抗からなる第1の
時定数による時間後に同電力増幅トランジスタの
前段に帰還してミユートせしめると共に、同ミユ
ートを前記コンデンサを共通とする第2の時定数
による時間後に解除するように構成したことを特
徴とする過負荷保護回路。
When the current flowing through the resistor increases through a resistor connected in series with the power amplifying transistor of an audio power amplifying device including a power amplifying transistor, the increase in the current is detected as a voltage by the resistor, and the detected voltage is Based on this, the transistor returns to the previous stage of the power amplifying transistor to mute after a time determined by a first time constant consisting of a capacitor and a resistor, and releases the muted state after a time determined by a second time constant that uses the capacitor in common. An overload protection circuit characterized by comprising:
JP15693088U 1988-11-30 1988-11-30 Pending JPH0277920U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15693088U JPH0277920U (en) 1988-11-30 1988-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15693088U JPH0277920U (en) 1988-11-30 1988-11-30

Publications (1)

Publication Number Publication Date
JPH0277920U true JPH0277920U (en) 1990-06-14

Family

ID=31435917

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15693088U Pending JPH0277920U (en) 1988-11-30 1988-11-30

Country Status (1)

Country Link
JP (1) JPH0277920U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006092940A1 (en) * 2005-02-28 2006-09-08 Pioneer Corporation Electric power amplifying apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006092940A1 (en) * 2005-02-28 2006-09-08 Pioneer Corporation Electric power amplifying apparatus

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