JPH027680A - Image pickup device - Google Patents

Abstract

PURPOSE:To use a circuit of a usual speed for the decision of layout or focusing by limiting a designation signal designating a picture element to read a photoelectric conversion signal of an image pickup means within a prescribed range or varying the signal to be changed for each picture element of a prescribed number. CONSTITUTION:A decoder driver 20 according to a clock pulse from a clock generating circuit 22 gives an address signal designating a cell Pi, j reading the signal to a vertical address decoder 12 and a horizontal address decoder 14. A signal of a cell of a row (p) is read by an output of the vertical address decoder 12 and a signal of a line (q) in the signal of the cell of the row (p) is fed to an output amplifier 16 by the horizontal address decoder 14, and a photoelectric conversion signal of a cell Pp, q is outputted at an output terminal 18. Thus, even if the image pickup element with high resolution is in use, it is possible to extract a signal required for decision of layout and focusing as the signal of a low band and the circuit at the usual speed as the processing circuit system is utilized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an imaging device, and more specifically, to an imaging device equipped with a high-pixel imaging means.

[Conventional technology]

In recent years, image sensors having several million pixels have been developed and prototyped. If it is a conventional image sensor with about 400,000 pixels, NT
If you want to get an SC television signal, use 4 f.
It would have been sufficient to drive the image sensor with a master clock of approximately 100 MHz (#14M)lz) and process it using a normal video signal processing circuit.

[Problem to be solved by the invention]

However, when using an image sensor with several million pixels, NTS
In the configuration of the C-type video signal processing circuit, the band is too narrow and the capability of the image sensor cannot be fully utilized. In other words, in order to fully utilize the capabilities of such a high-resolution image sensor, it is necessary to use a signal processing method with a very wide band, such as the HDTV (high-definition) method.
As the band becomes wider, it becomes more complicated and expensive than the conventional NTSC system, and furthermore, a video monitor device with a correspondingly high band is required.

Considering the actual usage of an imaging device, there is no need for high-speed processing, that is, high-bandwidth processing, except for real-time video projection across the entire screen, composition determination, and focusing. do not have. For example, when signal processing a single image signal output from an image sensor, not only the signal processing itself but also the output from the image sensor need not be so fast. On the other hand, if the required band is narrowed by low-speed output, a conventional relatively inexpensive video signal processing circuit can be used. However, as mentioned above, it is necessary to be able to monitor the shadow image in real time when determining the composition or adjusting the focus.

Accordingly, an object of the present invention is to provide an imaging device using a high-resolution imaging element, which is cheaper and has a simpler structure.

[Means to solve the problem]

An imaging device according to the present invention includes an imaging means, a designation means for designating a pixel from which a photoelectric conversion signal of the imaging means is to be read, and a designation signal generated by the designation means that is limited to a predetermined range or a predetermined number of pixels. The present invention is characterized by comprising a designation changing means for changing the designation so that it changes for each pixel.

[Effect]

By the above-mentioned specification change means, the signal within the predetermined area or the thinned out signal can be read out at a lower speed,
Normal speed circuitry can be used for composition and focusing.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings. In addition,
As an image sensor, an MO3 type solid-state image sensor is taken as an example, but the same applies to other image sensors.

FIG. 1 shows a schematic configuration diagram of an image sensor 10. As shown in FIG. P+,tN
=1 to n, j=1 to m) are photoelectric conversion cells forming each pixel, and are arranged in a matrix. M.O.B.
(i = 1 to n, j = 1 to m) are photoelectric conversion cells Pi, j
The transistors Mr-+1MJ, z, -1M1.
The gate of s (i = 1.2, −, n) is
Output V+ of vertical address decoder 12 (i=1~
n), and its drains are connected to the respective corresponding photoelectric conversion cells P i+ I+ P i+ 2Pt, +a
(i = 1.2.---, n).

Also, the transistor M l+ jt M t+ jt-
・-1M7. The drains of j (j=1 to m) are commonly connected to a MOS transistor N (j=1 to m). The gates of the transistors N= (j=l-m) are each connected to the output Hj (j=1-m) of the horizontal address decoder 14, and their sources are connected to the input side of the output amplifier 16.

Reference numeral 18 indicates an output terminal of the image sensor 10, and reference numeral 20 indicates a cell P, 1. This is a decoder driver that supplies an address signal specifying the address. For example, cell PI),
When specifying +1, according to the address signal from the decoder driver 20, the vertical address decoder 12 makes only the output ■, high, and the horizontal address decoder 14
Make only output H9 high. Vertical address decoder 1
2, the signals of the cells in the p row are read out, and the horizontal address decoder 14 applies the signals of the q column among the signals of the cells in the p row to the output amplifier 16. Therefore, the photoelectric conversion signals of the cells P9, 9 are outputted to the output terminal 18.

When sequentially scanning cells P L+j, one each of the vertical address decoder 12 and the horizontal address decoder 14
All you have to do is set one output to high and shift them sequentially.

FIG. 2 is a detailed diagram of the decoder driver 20. 30
．． 32 is a presettable binary counter, and 32.33 is a control signal φ1.33 from the clock generation circuit 22. According to φ1,
The bit output of counters 30 and 31 is left as is, or 2
Conversion circuits 34 and 36 for multiplying and outputting are circuits for holding preset values of the counters 30 and 32, respectively, and may be means for holding fixed values or means that can be operated from another.

Holding circuits 34 and 36 each hold counters 30 and 36 when their inputs are at a high level. ．． 32, and outputs zero when the input is low.

φ, 1. φI□, φ21. φ2□ is clock generation circuit 2
Pulse from No. 2 (No. 8. φ37. φ21 is a preset enable signal, and when this becomes high, counters 30 and 32 perform a preset operation. φ1□, φ2
2 is a clock pulse, and the count values of counters 30 and 32 are increased by 1 in response to this one pulse.

38 is a resistor, and 40 is a switch for controlling the output state of the holding circuits 34 and 36. That is, with switch 40 closed, the input to holding circuit 34, 36 is at a low level, and therefore its output is zero. Conversely, when the switch 40 is open, the holding circuit 3
The input to 4.36 is high, so its output is the preset value of counters 30,32.

The operation of the conversion circuits 32 and 33 will be explained in detail with reference to FIG. In FIG. 3, 42 is the counter 30 in FIG.
, 32 are bit output presettable counters, 44 is a holding circuit 34, and 44 is a holding circuit corresponding to 36;
45 is a conversion circuit corresponding to the conversion circuits 32 and 33.

In the conversion circuit 45, 46□, 46ib (i=1 to k
) is an and gate, 485 (i=2~k) is an or gate.
gate, 50 bits (CL, Qz,'-,Qv
) is the output terminal of AND GATE 464. gates the output (li) of the counter 42 under the control of the control signal φ8, and gate 46tb gates the output qt of the counter 42 under the control of the control signal φ5. +b and and gate 46i
Selectively output - output.

When the control signal φ, is high and the control signal φ, is low,
The output of the AND gate 46i is the output q of the counter 42
Eh, since the output of AND gate 46th is O,
The output of the OR gate 48i is the output qi of the counter 42
That is, to the output terminal 50, the output data of the counter 42 is output as is.

On the other hand, when the control signal φ is low and the control signal φ is high, the output Qi of the counter 42 is output from the AND gate 46i.
48L, % through k, and the output q! of the counter 42 is applied to Q at the output terminal 50. -1 is supplied. Note that Q is O. Therefore, in this case,
A value twice the count value of the counter 42 is output from the output terminal 50.

Assume that the image sensor 10 has, for example, about 1 million pixels. In this case, for example, when reading out every other photoelectric conversion signal in the horizontal direction and vertical direction, the number of pixels to be read out is 172 in the horizontal direction and 1/2 in the vertical direction, and the total number of pixels is approximately 174. It has 250,000 pixels, which can be handled by a circuit with normal processing speed. Such reading can be realized by setting the input of the holding circuit 44 in FIG. 3 to a low level, eliminating the preset, and setting φ,=0 (low) and φ5=1 (high). Further, as shown in FIG. 4, even when reading out only the photoelectric conversion signals from the central 1/4 area of the entire photoelectric conversion surface, the number of pixels to be read out is approximately 250,000. For this readout, the holding circuit 44 shown in FIG. 3 holds a preset value that is 1/4 of all pixels.
The counter 42 may be preset by setting the input to a high level so that φ1=1 and φ5=0. In this case, the photoelectric conversion area on the imaging surface from which reading is performed can be changed by the value held by the holding circuit 44. In either case, horizontal addressing and vertical addressing may be performed at the timing shown in FIGS. 5A and 5B.

Note that when reading out all pixels, the number of horizontal read pixels is doubled, and the total number of pixels is four times as large. Therefore, in order to be able to process it with a circuit with a normal processing speed, it is necessary to
It is sufficient to read out a horizontal line in twice the time as normal horizontal reading, and to take four vertical periods for one screen. Horizontal address timing is shown in FIG. 6A, and vertical address timing is shown in FIG. 6B.

As can be seen from the above explanation, by determining the composition using the output signal that has been thinned out by 1/2 in each of the horizontal and vertical directions, and focusing using the signal read out from the center, it is possible to Real-time monitoring can be performed using exactly the same circuit as that used with the image sensor of 2008, and focusing is extremely sharp. In addition, all pixels can be read out at a sufficient speed, and no special high-frequency circuit is required.

FIG. 7 shows a block diagram of another embodiment.

60 is an image sensor having a function similar to the image sensor 10 explained in FIGS. 1 to 3, 62 and 64 are image memories, 66 is a synthesis circuit that synthesizes the outputs of the image memories 62 and 64, and 68 is a synthesis circuit 6. , 6 into standard video signals. The way the image sensor 60 is read is changed every other time and stored in the image memories 62 and 64 respectively. For example, in the image memo IJ62, the above-mentioned horizontal and vertical 1/2
It is assumed that the image data of the thinned-out readout is stored, and the image memory 64 stores the image data of 1/16 part of the central part of the screen as shown in FIG. The latter is the holding circuit 34.
36 preset value is 3m/8.3n/8, φ,=
1. φ5=0. And it is sufficient. In this case also
As shown in FIGS. 9A and 9B, m/4 clock pulses φ2□ and n/4 clock pulses φ,2 may be applied to the counters 30 and 32, respectively.

In this way, the image memory 62 has m/2
m/4 pixel data is stored in the image memory 64.
Since pixel data of This allows you to focus. In other words, you can decide on the composition and adjust the focus at the same time. The position of the monitor display can be easily determined by the synthesis circuit 66.

[Effects of the Invention] As can be easily understood from the above explanation, according to the present invention, even when a high-resolution image sensor is used, signals necessary for composition determination and focusing can be transmitted to a circuit that operates at a low frequency. It can be extracted as a low-band signal that can be processed by Therefore, a conventional speed circuit can be used as the processing circuit system, and it can be manufactured at low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of an embodiment of the present invention, FIG. 2 is a detailed block diagram of the decoder/driver 20 of FIG. 1, and FIG. 3 is a detailed block diagram of the conversion circuits 32 and 33 of FIG. 4 is an explanatory diagram of the readout area for focusing, FIGS. 5A and 5B are timing diagrams for partial readout, and FIGS. 6A and 6B are for all pixel readout. 7 is a configuration block diagram of another embodiment, FIG. 8 is an explanatory diagram of the continuous area in FIG. 7, FIGS. 9A and 9B are timing diagrams for reading in FIG. 7, and FIG. The figure is an explanatory diagram of the operation of FIG. 7. 10-41%: Detection element 12-Vertical address decoder 14-Horizontal address decoder 16.-Output amplifier 1618.-Output terminal 20-Decoder driver 2
2-Clock generation circuit 30.32=Presettable 2
Decimal counter 32.33-・-conversion circuit 34.36-
Holding circuit Pll, (i-1~n, j=1~m)...-
Photoelectric conversion cell Fig. 1 To Fig. 14 Fig. Fig. Fig. Fig. 14 Fig. Fig. Fig. Fig. 14 Fig. Fig. Fig. 14 Fig. Fig. Fig. 5. Fig. 5B (b) Fig. 6A Fig. 6B Fig. 9A Fig. 9B

Claims (1)

[Claims] An imaging means, a designation means for designating a pixel from which a photoelectric conversion signal of the imaging means is to be read, and a designation signal generated by the designation means limited to within a predetermined range or changed for every predetermined number of pixels. An imaging device characterized by comprising a designation changing means.