JPH0276320A - Constant setting device - Google Patents

Abstract

PURPOSE:To miniaturize the subject device and to reduce the cost by providing a controller controlling 1st and 2nd devices and inputting plural binary data outputted from the 1st device to each digit of a setting constant of the 2nd device decided by the connection between the input and output respectively. CONSTITUTION:When a controller 4 makes an output shift register 1 and an input shift register 2 into, e.g., active, the output shift register 1 outputs 10 sets of data '0' or '1' of a binary digit b1 of output kinds D1, D2...D0 in parallel. The output is read respectively to digits d1, d2...d6 of the constant set in a binary digit b8 of the input shift register 2 through a connector short- circuited in a connector matrix 3. Thus, a constant in 6 digits designated by the connector matrix 3 is set to digits d1,d2...d6 of the constant to be set in the input shift register 2 as a data of binary digits b1, b2, b4, b8.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a constant setting device for an electronic device, in which an electronic device such as a terminal device is connected to a solid device through a public telephone line or the like. This is applied when setting constants such as the telephone number of a solid device and the identification number of a self-equipped device when exchanging information.

(Conventional technology) FIG. 3 shows the configuration of a conventional constant setting device.

In the figure, the constant to be set is 6 digits of ``r34962B'', and each digit is expressed as a 1O base number as 4-digit binary data.

Reference numeral 11 denotes a switch matrix, in which six dip switches 12 having four contacts are arranged. Each of the four contacts is used to display four-digit binary data, one terminal of each contact is connected in parallel for each digit di, d2...d6 of the constant, and the other terminal is connected through a diode 13. The binary digits b1, b2, b4 and b8 are connected in parallel to each other to display each digit of binary data.

Note that the contact with the same display as the contact St is in the open state, and the contact with the same display as the contact S2 has the constant r349628 to be set.
'' is closed to display each digit as a binary digit.

Reference numeral 14 denotes a scanning register which scans the constant digits d1, d2, .

2 is an input shift register in which constants are set, bl, b
2, b4 and b8 binary digit constant digits d1, d2
... are input sequentially.

Reference numeral 15 denotes a connection line for reading binary data output by the switch matrix 11 for each constant digit into each binary data of the input shift register 2. A control device 16 controls the scanning register 14 and the input shift register 2.

In the above configuration, the operation and operation when setting the 6-digit constant "r349628" to the input shift register 2 will be explained.

First, of the four contacts of the dip switch 12 corresponding to the first digit di of the constant of the switch matrix 11, two
The contacts between the base digits b1 and b2 are closed, and the first digit of the constant, the lO base number "3", is displayed as the binary number 1.1.0.0. Close the contacts in the same way from the second digit d2 to the sixth digit d6 of the constant, and change the decimal number of each digit of the constant to binary digits b1, b2, b4, respectively.
and each digit of b8 is displayed as a binary number "0" or "l".

Next, the scanning register 14 is controlled by the control device 16.
, activates the input shift register 2.

The scanning register 14 performs a so-called scanning operation in which the binary number rlJ is shifted from left to right to sequentially activate from the first digit di to the second digit d2 of the constant. When the first digit d1 is scanned, the binary digit b8 of the constant first digit d1 in the switch matrix 11,
Olo, 1, ■ are output to b4, b2, and bl as binary data corresponding to the decimal number "3". When the second digit d2 of the constant is scanned, the binary digits b8, b4, b2
, bl contains binary data 0, l, 0 corresponding to the constant "4"
．． 0 is output, and with the scanning operation, the binary data corresponding to each digit of the constant is sequentially changed to binary digits b8, b4, b.
2. Output to bl.

The binary data outputted to the binary digits b8, b4, b2, bl of the switch matrix 11 by the operation of the scanning register 14 is sequentially inputted to the input shift register 2 via the input/output connection line 15.

When the input shift register 2 receives the binary data of the binary digit corresponding to the first digit di of the constant, it reads it into the digit d6 of the constant. Next, the binary digit 2 corresponding to the second digit d2 of the constant
When the decimal data is input, the first digit of the constant read into digit d6 is shifted to digit d5.

The input corresponding to the newly input second digit d2 is read into the constant digit d6, as in the case of the input of the first digit di. Similarly, the input shift register 2 is sequentially shifted to the next digit each time new data is input, and finally the binary data sequentially output from the switch matrix 11 is a constant digit in the input shift register 2. d1, d2...
They are arranged in the order of d6, and the desired settings are completed. The above-mentioned shifting operation of the input shift register 2 and scanning operation of the scanning register 14 are controlled by the control device 16 so that they operate synchronously.

As described above, the constants displayed on the switch matrix 11 using the dip switches 12 are read into the predetermined locations of the input shift register 2, and the constants are set.

[Problems to be Solved by the Invention] As described above, in the prior art, the scanning register, input shift register, and control device can be realized by software, but the switch matrix must be manufactured by hardware. Therefore, it is necessary to use a dip switch or connect a diode. As a result, the device becomes large and expensive. In addition, the number of man-hours required for wiring increased, which had an impact on the price.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a constant setting device that is compact and inexpensive.

[Means and effects for solving the problem] The present invention provides a first device that sequentially outputs a plurality of binary data composed of a plurality of binary digits in parallel for each binary digit, and this first device. a second device for sequentially inputting a plurality of data for each binary digit sequentially outputted by the device into each digit of a set constant; and each output of the first device and each input to each digit of the set constant of the second device. It has a connection device that connects to any combination, and a control device that controls the first device and the second device, and connects a plurality of binary data output from the first device to each input and output. The present invention is characterized in that each digit of the setting constant of the second device determined by the connection is manually entered.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

1 and 2 are configuration diagrams showing the first and second embodiments of the present invention. In FIG. 1, 1 is an output shift register constituting the first device, and the binary digit data is Outputs as many output types as necessary to display each digit of the constant to be set. D.I.
, D2...DO indicate the output type required to display each digit of the constant number, and in the figure, they are decimal numbers "1" and "1", respectively.
"2"... Indicates "0". b8, b4, b2
, bl are each binary digit representing binary data, and each binary digit b
8, b4, b2, and bl are each displayed as "0" or gJ.

Reference numeral 2 denotes an input shift register constituting the second device, into which binary digit data is input as many as the number of digits of a constant to be set. dl,
d2...d6 indicate the 1st, 2nd...6th digit of the constant to be set, and each digit stores the binary data of binary digits b8, b4, b2, bl in the same way as the output shift register l. indicate.

3 is a connector matrix in which short-circuiting connectors 30 are arranged in a vertical and horizontal matrix, and one terminal of the connectors 30 is connected in parallel in each row to display the output types Di, D2, . . . DO of the output shift register 1, respectively. The other terminal is connected in parallel for each series, and the digits di, d2...d of the constant set in the input shift register 2 are connected in parallel.
6 will be displayed. 31 is a connector short-circuit pin, which corresponds to the output type Di, D2...D of the output shift register l.
Insert it into the connector at the position corresponding to o and the digits d1', d2...d6 of the constant to be set.

A control device 4 controls the operations of the output shift register 1 and the input shift register 2.

In FIG. 2, devices having the same functions as those in FIG. 1 are indicated by the same symbols. In the figure, reference numeral 5 denotes an output terminal, which is provided for each output type DL D2 . . . DO of the output shift register I. Reference numeral 6 denotes an input terminal, which is provided for each constant digit d1, d2, . . ., d6 set in the input shift register 2.

Reference numeral 7 denotes a jumper connection section, which connects the corresponding output terminal 5 and input terminal 6.

Next, the operation of the above embodiment will be explained.

For convenience of explanation, the constant to be set is a 6-digit number "r349628" as in the case of the prior art described above, and the output types DI, D2...DO of the output shift register 1 are each 10 decimal numbers "r349628". "l", "2"... Indicates "O".

In FIG. 1, the output shift register 1 has output types DI and DI necessary to display the number of each digit of the constant to be set.
...Corresponding to Do, decimal numbers rlJ, r2. ...
It is assumed that [0] is set as binary digits b8, b4, b2, and bl as binary "1" or "0" as shown in the figure. Also, for the connectors of connector matrix 3, based on the constant to be set, the first digit di of the constant is 10 base number "3".
”, and the second digit d2 is D indicating decimal number “4”.
4 and the third digit d3 are connected to DO indicating the decimal number "9" through shorting pins 31, respectively. Connect the following digits in the same way.

In the above state, when the control device 4 activates the output shift register l and the input shift register 2, the 10 binary digits bl of the output shift register l and the 6 binary digits b8 of the input shift register 2 It becomes possible to input and output,
Output shift register l has output types D1, D2...DO
Outputs 10 data "0" or "1" of binary digit b1 in parallel. This output is passed through the short-circuited connector of the connector matrix 3 to the constant digits di, d2...d6 of the binary digit b8 of the input shift register 2, rl, ``0'', ``1'', ``, respectively. 0”, “0”, r□
, is read as .

Next, when the control device 4 shifts the output shift register 1 to enable the output of the binary digit b2, the output shift register 1 shifts to two of the output types Di, D2, . . . DO, as in the previous case.
Outputs 10 data "0" or "1" of leading digit b2 in parallel. Under the control of this control device 4, the data read into the binary digit b8 of the large horn shift register 2 is
The data of the binary digit b2 newly outputted from the output shift register 1 is shifted to the binary digit b4, and the data of the binary digit b2 newly output from the output shift register 1 is "l", "0", "0", "1", rl, . "0"
is read as . Similarly, by sequentially shifting the binary digits of output shift register 1 and input shift register 2 in synchronization, binary digit b4 of output shift register 1 is
, b8 are sequentially read into the input shift register 2.

As described above, each digit di, d2...d6 of the constant to be set in the input shift register 2 is assigned to the connector matrix 3.
The 6-digit constant specified by is set as binary digit data of bLb2, b4, and b8.

The embodiment shown in FIG. 2 differs from the embodiment shown in FIG. 1 in that the connector matrix 3 determines the constant digits d1, d2, .・・In contrast to the correspondence with DO, the respective corresponding terminals DI and D
2...D.

This is an example in which dl, d2, . . . d6 are made to correspond to each other through jumper connections. Therefore, the constant input to each digit terminal 6 dl, d2...d6 of the constant set in the input shift register 2 is r349628, so the lO base number r1. , “
2" ... Di, D of output terminal 5 that displays "0"
2...The jumpers between DO and input terminal 6 dl, d2...d6 are dl-D3 (3), d2-D4 (4
), d 3-D9 (9), d4-D6 (6), d5
-D2 (2) and d6-DB (8) are performed. Otherwise, the operations of the output shift register 1 and the input shift register 2 are performed in exactly the same manner as in the embodiment shown in FIG.

In addition, the constant set in the above embodiment is the decimal number "l
”, “2”... “0”.
Even if the limit is limited to 4 binary digits, 16 output types can be obtained, so if 6 output types other than 10 decimal numbers are associated with symbols, e.g. a, b... You can set a constant containing .

〔Effect of the invention〕

As described above, according to the present invention, everything except the connector matrix or the jumper connection section is configured by software, so there is an advantage that the device can be made smaller and the cost can be reduced. In addition, not only when connecting with jumpers but also when using a connector matrix, if a shorting connector used for printed circuit boards is used in the configuration, it is possible to create one intersection point with a width of about 2.5 mm. There is an advantage that the hardware part can also be sufficiently miniaturized.

[Brief explanation of the drawing]

1 and 2 are block diagrams showing the first and second embodiments of the present invention, and FIG. 3 is a block diagram of the prior art. l is the output shift register, 2 is the input shift register, 3
4 is a connector matrix, 4 is a control device, 5 is an output terminal, 6 is an input terminal, and 7 is a jumper connection. Patent applicant Miyagawa Seisakusho Co., Ltd. Agent
Patent Attorney Product 1) Masaru Teru Figure 1 5 Figure 2

Claims (1)

[Claims] A first device that sequentially outputs a plurality of binary data consisting of a plurality of binary digits in parallel for each binary digit, and a constant that sets the plurality of data for each binary digit that the first device sequentially outputs. a second device that sequentially inputs input to each digit of the first device; a connection device that connects each output of the first device and each input of the second device to each digit of a set constant in any combination; and a control device that controls a second device, and inputs a plurality of binary data output from the first device to each digit of a set constant of the second device determined by the connection between each input and output. A constant setting device characterized in that: