JPH027523B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a differential amplifier circuit whose main constituent elements are MOSFETs. A differential amplifier circuit that amplifies the difference between two input signals is an essential circuit in linear circuits such as operational amplifiers. In linear integrated circuits using MOSFETs, circuits having a common current source similar to those in bipolar transistor integrated circuits have been used as differential amplifier circuits. A typical example of such a conventional circuit is shown in FIG. In FIG. 1, 1 and 2 are MOSFETs whose electrical characteristics are matched, the drain electrodes of which are connected to the first output terminal 8 and the second output terminal 9, respectively, and the gate electrodes of which are connected to the first output terminal, respectively. is connected to the input terminal 6 and the second input terminal 7, and the source electrodes are connected to each other at a connection point 13. 3 and 4 are load elements whose electrical characteristics are matched. Although FIG. 1 shows an example of using a depletion type MOSFET in which the gate electrode and the source electrode are connected, an enhancement type MOSFET in which the gate electrode and the drain electrode are connected is also often used. These load elements are connected between the first power supply 10 and the first output terminal 8 and between the first power supply 10 and the first output terminal 8.
0 and the second output terminal 9.
The MOSFET 5 has a drain electrode connected to the connection point 13, a source electrode connected to the second power supply 11, a bias voltage applied to the gate electrode 12, and a connection between the connection point 13 and the second power supply 11. acts as a current source that always flows a constant current. The operation of this conventional circuit will be explained below. As an example, MOSFET will be explained as an N-channel device, but the operation is essentially the same when it is a P-channel device. In FIG. 1, for potential changes in the same direction applied to input terminals 6 and 7, so-called in-phase input, the current flows in the first branch having elements 1 and 3 and the second branch having elements 2 and 4. The current flowing through the branches of is equal, and their sum is
Since it is constant due to the action of MOSFET 5, the current flowing through each branch does not change after all, and therefore the potentials of output terminals 8 and 9 do not change. However, when a potential change in the opposite direction, a so-called differential input, is applied to the input terminals 6 and 7, the current flowing through the first branch having elements 1 and 3 and the second branch having elements 2 and 4.
The currents flowing through the branches of the MOSFET 5 change in opposite directions, and even though the sum is constant due to the action of the MOSFET 5, there is a difference between the currents. The difference is obtained between output terminals 8 and 9. In this way, only the differential component is amplified without causing any change in the output with respect to the in-phase component. As mentioned above, in order for the conventional circuit shown in FIG. MOSFET 5 must be in the saturation region to allow a constant current to flow. For this purpose, if the threshold voltage of MOSFET 5 is VT5, the bias voltage applied to the gate electrode is VB, and the potential of connection point 13 is V13, it is sufficient that VB-VT5<V13 is satisfied. Therefore, the value of the second power source is
Assuming VSS, if VB is set to a value only slightly larger than VSS+VT5, V13 can be lowered to close to VSS. However, if you think like this and lower VB, you will have to increase the current gain of MOSFET 5 accordingly, which is
It is to increase the channel width of MOSFET5,
The geometric size of MOSFET 5 increases. Due to this increase in geometric size, VB can actually be lowered only to about VSS+2VT5, and therefore V13 can only be lowered to about VSS+VT5. Since the voltage applied to input terminals 6 and 7 must be higher than V13 by at least the threshold voltage VI common to MOSFETs 1 and 2, the lower limit of the common-mode input potential allowed for the differential amplifier circuit in Figure 1 is at most VSS+V15+VT. Normally, VT5=VT, so in that case, the common-mode input potential cannot be lower than a value that is about twice the threshold voltage VT higher than the potential of the second power supply. However, in recent years, there has been a significant demand for lower power supply voltages in MOSFET integrated circuits. Therefore, in the conventional circuit shown in Figure 1, the lower limit of the common-mode input must be approximately twice the threshold voltage of the enhancement MOSFET than the second power supply voltage VSS. The need to obtain a wide range has become an extremely large drawback that limits the ability to lower the power supply voltage. In view of this point, the present invention provides a differential amplifier circuit with a new circuit type having a wider common-mode input voltage range than conventional ones. According to the present invention, the first MOSFET has a drain electrode connected to a first power source, a gate electrode connected to a control terminal, and a source electrode connected to a first output terminal.
The drain electrode is connected to the first power source, the gate electrode is connected to the control terminal, and the source electrode is connected to the second power source.
a third MOSFET whose drain electrode is connected to the first output terminal, whose gate electrode is the first input terminal, and whose source electrode is connected to the second power supply; The drain electrode is connected to the second output terminal, and the gate electrode is connected to the second output terminal.
a fourth MOSFET whose input terminal and source electrode are connected to the second power supply; and a fourth MOSFET that inverts and amplifies the sum of the potential change on the first output terminal and the potential change on the second output terminal. A differential amplifier circuit is obtained, characterized in that it comprises means for applying the control terminal to the control terminal. Hereinafter, the present invention will be explained based on drawings showing one embodiment. In FIG. 2, 21 and 22 are MOSFETs configured with mutually matched electrical characteristics.
The source electrode of MOSFET 21 is the first output terminal 2
The source electrode of MOSFET 22 is connected to second output terminal 29 . Further, both drain electrodes are connected to the first power source 30, and both gate electrodes are connected to the output of the amplifier 34. 23 and 24 are also MOSFETs whose electrical characteristics are matched.
The drain electrode of the MOSFET 23 is connected to the first output terminal 28, and the gate electrode is connected to the first input terminal 28.
6, and its source electrode is connected to a second power source 31. Further, the drain electrode of the MOSFET 24 is connected to the second output terminal 29 , the gate electrode is connected to the second input terminal 27 , and the source electrode is connected to the second power supply 31 . amplifier 34
inverts and amplifies the sum of the output voltage of the first output terminal 28 and the output voltage of the second output terminal 29,
The voltage is applied to the gate electrodes of MOSFETs 21 and 22, respectively. Next, the operation of the embodiment shown in FIG. 2 will be explained. Potential changes occurring in the same direction at the output terminals 28 and 29 are inverted and amplified by the amplifier 34 and applied to the gate electrodes of the MOSFETs 21 and 22. thus
The voltages applied to the gate electrodes of MOSFETs 21 and 22 act in a direction that attempts to cancel out potential changes originally occurring at output terminals 28 and 29. Amplifier 3
Under the ideal condition that the absolute value of the gain of 4 is infinite, potential changes in the same direction that occur at output terminals 28 and 29 are completely canceled, and as a result, no potential change occurs at output terminals 28 and 29. . On the other hand, the potential changes occurring in the output terminals 28 and 29 in opposite directions and having the same magnitude have a total of zero, so they do not affect the output of the amplifier 34, and the potential changes are not canceled out. Since potential changes in the same direction applied to the input terminals 26 and 27, that is, in-phase inputs, act to cause potential changes in the same direction at the output terminals 28 and 29, the amplifier 3
4, the potentials of the output terminals 28 and 29 do not change. On the other hand, the potential change in the opposite direction applied to the input terminals 26 and 27, ie, the differential input, causes a potential change in the opposite direction to the output terminals 28 and 29, and as described above, this change is not canceled out. As described above, the present invention can obtain desired characteristics as a differential amplifier circuit that amplifies and transmits only differential inputs without causing any change in output in response to common-mode inputs. In this embodiment, the common mode input potential is connected to the second power supply 3.
1, the limit at which operation can be maintained is until MOSFETs 23 and 24 are cut off, and therefore N is lower than the potential of second power supply 31 by the threshold voltage of MOSFETs 23 and 24.
A channel element can operate up to a high potential, and a P channel element can operate up to a potential lower by this threshold voltage. In the conventional example shown in Figure 1,
Considering that the second power supply potential could only be approached to twice the threshold voltage of the MOSFET, the second
The advantages of the embodiment of the invention shown in the figures are obvious. In addition, in FIG. 2, between the drain electrode of MOSFET 21 and the first power supply 30, between the drain electrode of MOSFET 22 and the first electrode 30, and
Other elements such as a MOSFET for frequency characteristic adjustment and a resistance element are arranged between the drain electrode of the MOSFET 23 and the output terminal 28 and between the drain electrode of the MOSFET 24 and the output terminal 29, and the various parts mentioned above are connected through these elements. However, as long as it is DC-conducting, it does not impede the effects of the present invention in any way. However, MOSFET23 and 2
It is not preferable to connect another element such as a resistive element between the source electrode of No. 4 and the second power source 31 because it narrows the common-mode input range by the voltage across the element. Furthermore, connecting other elements between the source electrode of the MOSFET 21 and the output terminal 28 and between the source electrode of the MOSFET 22 and the output terminal 29 is necessary because changes in the output of the amplifier 34 are reflected in changes in the output terminal. If the gain of the amplifier 34 is finite, there may be cases where changes in the output with respect to the in-phase input are not suppressed sufficiently, so care must be taken. FIG. 3 shows a more specific embodiment of the embodiment shown in FIG. In Figure 3, MOSFET41, 42, 43, 4
The circuit consisting of 4 and 45 is the amplifier 3 in FIG.
This is a concrete example of No. 4.
The MOSFETs 41 and 42 are MOSFETs configured with matching electrical characteristics, and their drain electrodes are both connected to the first power supply 30, their source electrodes are both connected to the connection point 46, and their gate electrodes are connected to the first output. It is connected to terminal 28 and second output terminal 29 . The drain electrode of the MOSFET 43 is connected to the connection point 46, the source electrode is connected to the second power supply 31, and the gate electrode 47 is applied with a bias voltage. The gate electrode of the MOSFET 44 is connected to the connection point 46, and the source electrode is connected to the second power supply 31. The MOSFET 45 is a load element, the drain electrode is connected to the first power supply 30, and the source electrode and gate electrode are connected to the MOSFET 45.
connected to the drain electrode of 44 and
It is connected to the gate electrodes of MOSFETs 21 and 22. The circuit consisting of MOSFETs 41, 42, and 43 constitutes a source follower circuit with connection point 46 as an output point for the sum of potential changes applied to the gate electrodes of MOSFETs 41 and 42, and the sum of the potential changes is output at connection point 46. It is transmitted as a change in potential. MOSFETs 44 and 45 constitute a so-called inverter circuit, which inverts and amplifies the potential change at connection point 46 and applies it to the gate electrodes of MOSFETs 21 and 22. Therefore, MOSFET41, 42, 4
The circuit consisting of 3, 44 and 45 performs the desired amplification operation. As described above, FIGS. 2 and 3 show one embodiment of the present invention.
Although the present invention has been explained based on the drawings, the present invention is not limited to the illustrated embodiment, but can be realized as long as the configuration described in the claims is satisfied, and basically the same effect as the above embodiment can be obtained. . As described above, according to the present invention, a differential amplifier circuit with a wider common-mode input voltage range than the conventional technology can be obtained.
This is particularly effective in lowering the power supply voltage.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional example. FIGS. 2 and 3 are circuit diagrams showing embodiments of the present invention. In the figure, 1, 2, 3, 4, 5, 21, 22,
23, 24, 41, 42, 43, 44, 45 are
MOSFET, 6, 7, 26, 27 are input terminals, 8, 9, 28, 29 are output terminals, 10, 1
1, 30, and 31 are power supplies, 12, 47 are bias voltage application terminals, and 34 is an amplifier, respectively.

Claims (1)

[Claims] 1 A first MOSFET with a drain electrode connected to a first power source, a gate electrode connected to a control terminal, and a source electrode connected to a first output terminal; a first MOSFET with a drain electrode connected to the first power source and a gate electrode connected to the first output terminal; a second MOSFET connected to the control terminal and having a source electrode connected to a second output terminal; a second MOSFET having a drain electrode connected to the first output terminal, a gate electrode serving as a first input terminal, and a second MOSFET having a source electrode connected to the second output terminal; the third connected to the power supply of
a fourth MOSFET whose drain electrode is connected to the second output terminal, whose gate electrode is the second input terminal, and whose source electrode is connected to the second power supply.
A differential amplifier circuit comprising: a MOSFET; and means for inverting and amplifying the sum of a potential change on the first output terminal and a potential change on the second output terminal and applying it to the control terminal. .