JPH0272680U - - Google Patents
Info
- Publication number
- JPH0272680U JPH0272680U JP15032988U JP15032988U JPH0272680U JP H0272680 U JPH0272680 U JP H0272680U JP 15032988 U JP15032988 U JP 15032988U JP 15032988 U JP15032988 U JP 15032988U JP H0272680 U JPH0272680 U JP H0272680U
- Authority
- JP
- Japan
- Prior art keywords
- fet
- switching
- drive
- switching fet
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 4
- 238000004804 winding Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
Description
第１図は本考案の一実施例を示した回路図；第
２図は本考案の他の実施例を示した回路図；第３
図は従来例を示した回路図である。
１：ドライブトランス、２：コンデンサ、３：
ドライブ用ＦＥＴ、４：ダイオード、６，９：抵
抗、７：スイツチング用ＦＥＴ、８：出力トラン
ス、１０：ツエナダイオード。
Fig. 1 is a circuit diagram showing one embodiment of the invention; Fig. 2 is a circuit diagram showing another embodiment of the invention; Fig. 3 is a circuit diagram showing another embodiment of the invention;
The figure is a circuit diagram showing a conventional example. 1: Drive transformer, 2: Capacitor, 3:
Drive FET, 4: Diode, 6, 9: Resistor, 7: Switching FET, 8: Output transformer, 10: Zener diode.
Claims (1)
ツチング用ＦＥＴ７と； ドライブトランス１の出力電圧により制御され
、オフ時に前記スイツチング用ＦＥＴ７をオンす
ると共にオン時に前記スイツチング用ＦＥＴ７を
オフするドライブ用ＦＥＴ３と； 該ドライブ用ＦＥＴ３による前記スイツチング
用ＦＥＴ７のオン時に充電され、オフ時に該充電
電圧で前記スイツチング用ＦＥＴ７を逆バイアス
するコンデンサ２と； を備えたスイツチング電源のＦＥＴドライブ回路
に於いて、 前記スイツチング用ＦＥＴ７のゲート・ソース
間と並列に抵抗９を接続すると共に前記コンデン
サ２と並列にツエナダイオード１０を接続し、前
記スイツチング用ＦＥＴ７のオン時に前記抵抗９
を流れる電流によりコンデンサ２を前記ツエナダ
イオード１０で決まる規定電圧まで充電し、該充
電電圧で前記スイツチング用ＦＥＴ７を逆バイア
スするようにしたことを特徴とするスイツチング
電源のＦＥＴドライブ回路。[Claims for Utility Model Registration] A switching FET 7 connected in series to the next winding of the output transformer 8; Controlled by the output voltage of the drive transformer 1, the switching FET 7 is turned on when it is off, and the switching FET 7 is connected in series to the next winding of the output transformer 8; A FET drive for a switching power supply, comprising: a drive FET 3 that turns off the FET 7; a capacitor 2 that is charged when the drive FET 3 turns on the switching FET 7 and reverse biases the switching FET 7 with the charging voltage when turned off. In the circuit, a resistor 9 is connected in parallel between the gate and source of the switching FET 7, and a Zener diode 10 is connected in parallel with the capacitor 2, so that the resistor 9 is connected when the switching FET 7 is turned on.
A FET drive circuit for a switching power supply, characterized in that a capacitor 2 is charged by a current flowing through the zener diode 10 to a specified voltage determined by the Zener diode 10, and the switching FET 7 is reverse biased with the charged voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15032988U JPH0272680U (en) | 1988-11-18 | 1988-11-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15032988U JPH0272680U (en) | 1988-11-18 | 1988-11-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0272680U true JPH0272680U (en) | 1990-06-04 |
Family
ID=31423375
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15032988U Pending JPH0272680U (en) | 1988-11-18 | 1988-11-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0272680U (en) |
-
1988
- 1988-11-18 JP JP15032988U patent/JPH0272680U/ja active Pending