JPH0214294U - - Google Patents
Info
- Publication number
- JPH0214294U JPH0214294U JP9150288U JP9150288U JPH0214294U JP H0214294 U JPH0214294 U JP H0214294U JP 9150288 U JP9150288 U JP 9150288U JP 9150288 U JP9150288 U JP 9150288U JP H0214294 U JPH0214294 U JP H0214294U
- Authority
- JP
- Japan
- Prior art keywords
- fet
- voltage
- primary winding
- circuit
- winding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004804 winding Methods 0.000 claims description 9
- 238000009499 grossing Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Dc-Dc Converters (AREA)
Description
第１図は本考案に係るスイツチング回路の第１
実施例であつてＤＣ―ＤＣコンバータに組み込ん
だ場合を示す回路図、第２図は第１実施例の作用
を示す回路図、第３図は本考案の第２実施例を示
す回路図、第４図は本考案の第３実施例を示す回
路図、第５図は従来のスイツチング回路を含んだ
ＤＣ―ＤＣコンバータの回路図である。
１……ドライブ回路、２……整流平滑回路、３
，４……出力端子、Ｃ１，Ｃ２……コンデンサ、
Ｄ１，Ｄ２……ダイオード、Ｑ１……ＭＯＳ―Ｆ
ＥＴ、Ｔ……トランス、ｎ１……１次巻線、ｎ２
……２次巻線、ｎ３……付加巻線、……直流電
源。
Figure 1 shows the first switching circuit according to the present invention.
FIG. 2 is a circuit diagram showing the operation of the first embodiment, FIG. 3 is a circuit diagram showing the second embodiment of the present invention, and FIG. FIG. 4 is a circuit diagram showing a third embodiment of the present invention, and FIG. 5 is a circuit diagram of a DC-DC converter including a conventional switching circuit. 1...drive circuit, 2...rectification smoothing circuit, 3
, 4... Output terminal, C1, C2... Capacitor,
D1, D2...Diode, Q1...MOS-F
ET, T...Transformer, n 1 ...Primary winding, n 2
...Secondary winding, n3 ...Additional winding, ...DC power supply.
Claims (1)
流入力電圧を供給し、ドライブ回路のドライブ信
号を該ＦＥＴのゲート、ソース間に印加して当該
ＦＥＴのオン、オフにより前記１次巻線に流れる
電流を断続するスイツチング回路において、前記
１次巻線に対して付加巻線を直列接続して両方の
巻線の誘起電圧が同相で加わるようにし、該付加
巻線の両端の電圧を整流、平滑して得た直流電圧
を前記直流入力電圧に同極性で加算して前記ドラ
イブ回路への供給電圧としたことを特徴とするス
イツチング回路。 A DC input voltage is supplied to the series circuit of the primary winding of the transformer and the FET, and a drive signal of the drive circuit is applied between the gate and source of the FET to turn the FET on and off to the primary winding. In a switching circuit that intermittents a flowing current, an additional winding is connected in series with the primary winding so that the induced voltages of both windings are applied in the same phase, and the voltage at both ends of the additional winding is rectified. A switching circuit characterized in that a DC voltage obtained by smoothing is added to the DC input voltage with the same polarity to obtain a supply voltage to the drive circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9150288U JPH0214294U (en) | 1988-07-12 | 1988-07-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9150288U JPH0214294U (en) | 1988-07-12 | 1988-07-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0214294U true JPH0214294U (en) | 1990-01-29 |
Family
ID=31315982
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9150288U Pending JPH0214294U (en) | 1988-07-12 | 1988-07-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0214294U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0660291U (en) * | 1993-01-22 | 1994-08-19 | 東光株式会社 | Switching power supply |
-
1988
- 1988-07-12 JP JP9150288U patent/JPH0214294U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0660291U (en) * | 1993-01-22 | 1994-08-19 | 東光株式会社 | Switching power supply |
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