JPH0270524U - - Google Patents
Info
- Publication number
- JPH0270524U JPH0270524U JP14980888U JP14980888U JPH0270524U JP H0270524 U JPH0270524 U JP H0270524U JP 14980888 U JP14980888 U JP 14980888U JP 14980888 U JP14980888 U JP 14980888U JP H0270524 U JPH0270524 U JP H0270524U
- Authority
- JP
- Japan
- Prior art keywords
- generates
- control signal
- signal
- pin diode
- generator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Radar Systems Or Details Thereof (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Description
第１図はこの考案の一実施例を示す図、第２図
は第１図各部の信号波形を示す図、第３図は従来
のパルス変調装置を示す図、第４図は第３図各部
の信号波形を示す図である。
図において１は高周波入力端子、２はＰＩＮダ
イオード、３は抵抗器、４は高周波チヨークコイ
ル、５は高周波出力端子、６はコンデンサ、７は
パルス変調信号、８はバイアス電圧、９はバイア
ス発生器、１０は制御信号発生器、１１はパルス
、１２はパルス発生器、１３は重畳器、１４は変
調信号である。なお、各図中同一符号は同一また
は相当部分を示す。
Fig. 1 is a diagram showing an embodiment of this invention, Fig. 2 is a diagram showing signal waveforms at various parts in Fig. 1, Fig. 3 is a diagram showing a conventional pulse modulation device, and Fig. 4 is a diagram showing various parts in Fig. 3. FIG. 2 is a diagram showing a signal waveform of In the figure, 1 is a high frequency input terminal, 2 is a PIN diode, 3 is a resistor, 4 is a high frequency choke coil, 5 is a high frequency output terminal, 6 is a capacitor, 7 is a pulse modulation signal, 8 is a bias voltage, 9 is a bias generator, 10 is a control signal generator, 11 is a pulse, 12 is a pulse generator, 13 is a superimposition device, and 14 is a modulation signal. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
信号発生器と、この制御信号により正または負の
電圧のバイアス電圧を発生するバイアス発生器と
、上記制御信号により正の電圧のパルスを発生す
るパルス発生器と、上記バイアス電圧とパルスを
重畳し変調器信号を発生する重畳器と、ＰＩＮダ
イオードの両端に高周波信号に対し十分小さなイ
ンピーダンスを持つコンデンサを接続し、それら
のコンデンサのもう一方の電極を高周波入・出力
端子とし、上記ＰＩＮダイオードの一端を高周波
チヨークコイルを介して設置し、上記ＰＩＮダイ
オードの他の一端を高周波チヨークコイルと抵抗
器の直列接続を通して上記重畳器と接続したこと
を特徴とするパルス変調装置。 A control signal generator that receives a pulse modulation signal and generates a control signal, a bias generator that generates a positive or negative bias voltage based on this control signal, and a pulse generator that generates a positive voltage pulse based on the control signal. A superimposer that generates a modulator signal by superimposing the above bias voltage and pulses, and a capacitor with a sufficiently small impedance for high frequency signals are connected across the PIN diode, and the other electrode of these capacitors is connected to a high frequency signal. Pulse modulation, characterized in that one end of the PIN diode is installed via a high-frequency check coil, and the other end of the PIN diode is connected to the superimposition device through a series connection of a high-frequency check coil and a resistor as input/output terminals. Device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14980888U JPH0270524U (en) | 1988-11-17 | 1988-11-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14980888U JPH0270524U (en) | 1988-11-17 | 1988-11-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0270524U true JPH0270524U (en) | 1990-05-29 |
Family
ID=31422377
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14980888U Pending JPH0270524U (en) | 1988-11-17 | 1988-11-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0270524U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007148691A1 (en) * | 2006-06-20 | 2007-12-27 | Panasonic Corporation | Pulse modulation circuit and pulse modulation method |
-
1988
- 1988-11-17 JP JP14980888U patent/JPH0270524U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007148691A1 (en) * | 2006-06-20 | 2007-12-27 | Panasonic Corporation | Pulse modulation circuit and pulse modulation method |
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