JPH0269492U - - Google Patents
Info
- Publication number
- JPH0269492U JPH0269492U JP14918188U JP14918188U JPH0269492U JP H0269492 U JPH0269492 U JP H0269492U JP 14918188 U JP14918188 U JP 14918188U JP 14918188 U JP14918188 U JP 14918188U JP H0269492 U JPH0269492 U JP H0269492U
- Authority
- JP
- Japan
- Prior art keywords
- lattice
- terminal insertion
- insertion holes
- shaped
- terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000037431 insertion Effects 0.000 claims description 7
- 238000003780 insertion Methods 0.000 claims description 7
Landscapes
- Connecting Device With Holders (AREA)
- Multi-Conductor Connections (AREA)
Description
第１図は本考案の集積回路用ソケツト構造の一
実施例を示す斜視図、第２図は第１図を分解した
一例を示す正面図、第３図は第１図のプリント基
板の表裏面それぞれの一例を示す平面図、第４図
は従来の一例を示す斜視図である。
１……格子状端子ソケツト、２……プリント基
板、１１，２１……格子状端子挿入穴、１２……
格子状端末、２２……二列形状端子、２３……内
部結線、２４……印刷配線。
Fig. 1 is a perspective view showing an embodiment of the integrated circuit socket structure of the present invention, Fig. 2 is a front view showing an exploded example of Fig. 1, and Fig. 3 shows the front and back sides of the printed circuit board shown in Fig. 1. FIG. 4 is a plan view showing an example of each, and FIG. 4 is a perspective view showing a conventional example. 1... Grid-shaped terminal socket, 2... Printed circuit board, 11, 21... Grid-shaped terminal insertion hole, 12...
Grid terminal, 22... double-row terminal, 23... internal connection, 24... printed wiring.
Claims (1)
裏面に前記端子挿入穴の内壁面の少くとも一部と
電気的に導通あり且つ所定間隔で格子状に配列さ
れた格子状端子を、それぞれ備える集積回路用の
格子状端子ソケツトと、表面に格子状に所定間隔
の端子挿入穴を備えて所定の端子挿入穴間を印刷
配線により電気的導通路を形成する一方、裏面に
集積回路用の２列形状端子を備え且つこの二列形
状端子を表面の所定の端子挿入穴の内壁面の少く
とも一部に電気的に内部で導通させる集積回路用
のプリント基板とを有し、このプリント基板の端
子挿入穴に前記格子状端子ソケツトの格子状端子
を挿入固定して形成することを特徴とする集積回
路用ソケツト構造。 Terminal insertion holes arranged in a lattice pattern at predetermined intervals on the front surface, and lattice-shaped terminals arranged in a lattice pattern at predetermined intervals on the back surface and electrically conductive with at least a part of the inner wall surface of the terminal insertion holes, respectively. A grid-shaped terminal socket for integrated circuits is provided on the front surface, and terminal insertion holes are provided at predetermined intervals in a grid pattern on the front surface, and an electrical conduction path is formed between the predetermined terminal insertion holes by printed wiring. A printed circuit board for an integrated circuit comprising two rows of terminals and electrically conducting the two rows of terminals internally to at least a part of the inner wall surface of a predetermined terminal insertion hole on the surface, the printed circuit board A socket structure for an integrated circuit, characterized in that the lattice-shaped terminals of the lattice-shaped terminal socket are inserted and fixed into the terminal insertion holes of the lattice-shaped terminal socket.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14918188U JPH0269492U (en) | 1988-11-15 | 1988-11-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14918188U JPH0269492U (en) | 1988-11-15 | 1988-11-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0269492U true JPH0269492U (en) | 1990-05-25 |
Family
ID=31421178
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14918188U Pending JPH0269492U (en) | 1988-11-15 | 1988-11-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0269492U (en) |
-
1988
- 1988-11-15 JP JP14918188U patent/JPH0269492U/ja active Pending