JPH0266034U - - Google Patents
Info
- Publication number
- JPH0266034U JPH0266034U JP14538288U JP14538288U JPH0266034U JP H0266034 U JPH0266034 U JP H0266034U JP 14538288 U JP14538288 U JP 14538288U JP 14538288 U JP14538288 U JP 14538288U JP H0266034 U JPH0266034 U JP H0266034U
- Authority
- JP
- Japan
- Prior art keywords
- input
- switching
- converter
- input terminals
- digital signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第1図は本考案の一実施例におけるA/D変換
装置の回路ブロツク図、第2図は第1図に示した
テーブルの詳細を示す概念図、第3図は第1図に
示したA/D変換装置を端末ユニツトの主要部と
したシステムのブロツク図、第4図は従来のA/
D変換装置を用いて構成したシステムのブロツク
図、第5図は第4図に示したシステムにおけるセ
ンタユニツトと端末ユニツトとの間のデータ送受
信を説明するための説明図である。
1……CPU、1A……A/Dコンバータ、1
B……テーブル、2……増幅回路、4……Dig
スイツチ、300〜315……アナログスイツチ
、Ai0〜Ai15……アナログ信号入力ポート
、Po0〜Po15……制御信号出力ポート、P
i0〜Pi3……制御信号入力ポート、AI0〜
AI15……アナログ入力端子。
FIG. 1 is a circuit block diagram of an A/D converter according to an embodiment of the present invention, FIG. 2 is a conceptual diagram showing details of the table shown in FIG. 1, and FIG. Figure 4 is a block diagram of a system in which the A/D converter is the main part of the terminal unit.
FIG. 5 is a block diagram of a system configured using a D converter, and is an explanatory diagram for explaining data transmission and reception between the center unit and terminal units in the system shown in FIG. 4. 1...CPU, 1A...A/D converter, 1
B...Table, 2...Amplification circuit, 4...Dig
Switch, 300-315...Analog switch, Ai0-Ai15...Analog signal input port, Po0-Po15...Control signal output port, P
i0~Pi3...Control signal input port, AI0~
AI15...Analog input terminal.
Claims (1)
、 該複数の入力端子に入力するアナログ信号を切
換えることによつて順次取込む入力切換手段と、 該入力切換手段の切換えによつて取込まれたア
ナログ信号をデイジタル信号に変換するA/Dコ
ンバータと、 前記複数の入力端子のうち、前記入力切換手段
の切換えによつてアナログ信号を取込むことがで
きる入力端子の数を設定する入力量設定手段と、 該入力量設定手段によつて設定された数に応じ
て前記A/Dコンバータで変換されたデイジタル
信号にアドレスを割付けるアドレス割付け手段と
を具えたことを特徴とするA/D変換装置。[Claims for Utility Model Registration] A plurality of input terminals for inputting analog signals, an input switching means for sequentially inputting analog signals by switching the input terminals, and the input switching means. an A/D converter that converts an analog signal taken in by switching into a digital signal; and an input terminal that can take in an analog signal by switching the input switching means among the plurality of input terminals. an input amount setting means for setting a number; and an address assignment means for assigning an address to the digital signal converted by the A/D converter according to the number set by the input amount setting means. Characteristic A/D conversion device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988145382U JPH073698Y2 (en) | 1988-11-09 | 1988-11-09 | A / D converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988145382U JPH073698Y2 (en) | 1988-11-09 | 1988-11-09 | A / D converter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0266034U true JPH0266034U (en) | 1990-05-18 |
JPH073698Y2 JPH073698Y2 (en) | 1995-01-30 |
Family
ID=31413921
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988145382U Expired - Lifetime JPH073698Y2 (en) | 1988-11-09 | 1988-11-09 | A / D converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH073698Y2 (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5970247U (en) * | 1982-11-02 | 1984-05-12 | 日立電子エンジニアリング株式会社 | Time division selection processing device for multiple analog inputs |
JPS60237527A (en) * | 1984-05-11 | 1985-11-26 | Mitsubishi Electric Corp | A-d converting device |
JPS6121524A (en) * | 1984-07-10 | 1986-01-30 | Mitsubishi Heavy Ind Ltd | High speed data collecting system |
JPS6156517A (en) * | 1984-08-28 | 1986-03-22 | Toshiba Corp | Analog-to-digital converter |
-
1988
- 1988-11-09 JP JP1988145382U patent/JPH073698Y2/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5970247U (en) * | 1982-11-02 | 1984-05-12 | 日立電子エンジニアリング株式会社 | Time division selection processing device for multiple analog inputs |
JPS60237527A (en) * | 1984-05-11 | 1985-11-26 | Mitsubishi Electric Corp | A-d converting device |
JPS6121524A (en) * | 1984-07-10 | 1986-01-30 | Mitsubishi Heavy Ind Ltd | High speed data collecting system |
JPS6156517A (en) * | 1984-08-28 | 1986-03-22 | Toshiba Corp | Analog-to-digital converter |
Also Published As
Publication number | Publication date |
---|---|
JPH073698Y2 (en) | 1995-01-30 |
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