JPH0265539A - Satellite broadcast receiver - Google Patents

Abstract

PURPOSE:To prevent unpleasant noise from being outputted at channel changeover by operating a timer for a prescribed time in response to a channel changeover signal and bringing a voice output suppressing bit in a control code in a bit stream outputted from a BS tuner into the suppressing state in response to an operating output signal. CONSTITUTION:When the channel changeover signal is supplied to 1st and 2nd timers 521, 522 via a terminal 523, both timers are started. When the timer 521 is started, a pulse signal is outputted after the 1st prescribed time elapses to switch the frequency of the 2nd local oscillating circuit 24. Being started, the timer 522 generates an output signal immediately and continues the output signal till the 2nd prescribed time longer than the 1st prescribed time to supply it to a voice output suppressing bit changeover circuit 518. The voice output suppressing bit changeover circuit 518 switches the voice output suppressing bit in a control code in a bit stream in response to an output signal from the timer 522 and an output signal from the voice output suppressing bit timing generating circuit 519.

Description

[Detailed Description of the Invention] [Purpose of the Invention (Industrial Application Field) The present invention is directed to a satellite broadcast receiving device, and more particularly, to a video signal that is scrambled and transmitted in order to prevent unauthorized viewing. and a BS that broadcasts and receives audio signals via
The present invention relates to a satellite broadcast receiving apparatus that includes a tuner and a decoder that descrambles the scrambled signal.

(Prior Art) In paid broadcasting using satellite broadcasting, a system is being considered in which video and audio signals are scrambled to prevent unauthorized viewing by people who do not have a contract with the broadcasting provider. In such a system, J3 uses a device for scrambling video and audio signals on the transmitting side, a so-called scrambler, and a device for descrambling on the receiving side.
Paid broadcasting is performed using a so-called descrambler.

FIG. 9 is a block diagram of such a pay broadcast system.

In the figure, on the transmitting side 10, a video signal input from a terminal 11 is scrambled by a video scrambler 13, and an audio signal input from a terminal 12 is scrambled by an audio scrambler 15. This video scrambler 13 and audio scrambler 15 [Yo, first 11H! A cryptographic generator 1 is supplied with an initial value that is updated every certain period from an update circuit 16 and is initialized by a timing signal output from an initialization timing circuit 17.
The video and audio signals are randomly scrambled using the encryption code from No. 4, thereby increasing the confidentiality of the signals and the security of the system against unauthorized viewing. The scrambled video signal is transmitted to the receiving side 100 via the multiplexing circuit 19, and the scrambled audio signal is transmitted to the receiving side 100 via the multiplexing circuit 19, and the scrambled audio signal is transmitted to the initial value information from the initial value update circuit 16 and the initialization timing circuit 17. The signal is multiplexed by the multiplexing circuit 18 together with the initialization timing signal from the 1000, and is further transmitted to the receiving side 100 via the multiplexing circuit 19.

On the other hand, on the receiving side 100, a separation circuit 110 separates the video signal and audio signal received from the transmitting side, and supplies the separated video signal to a video descrambler 112.

Furthermore, the initial value and the initialization timing signal are sent to the separation circuit 110 from the audio signal separated by the separation circuit 110.
The cipher generator 113 is periodically initialized by supplying the same initial value and initialization timing signal used for scrambling on the separated transmitting side, and the 111i code generator 113 is periodically initialized. The audio signal is supplied to an audio descrambler 114. The initial value separated by this separation circuit 111 and the code from the code generator 113 initialized at the initialization timing are supplied to the video descrambler 112 and the audio descrambler 114, where they are descrambled and the video signal and audio Signals are output from terminals 115 and 116, respectively.

In satellite broadcasting, a signal transmitted via a satellite from the transmitting side is received by a BS tuner via a BS antenna, and FIG. 10 is a block diagram showing the configuration of such an S tuner. In the same figure, the 11F signal from the 88 antenna is input to the input terminal 21 of the 88 CH large, and the digital signal is simply QP from the output terminal 215.
The SK demodulated pit stream is output.

A receiving device for paid broadcasting using satellite broadcasting, that is, a satellite broadcasting receiving device, requires the above-mentioned BS tuner and descrambler, and there are two systems as shown below as configurations consisting of both branches:n.

That is, in the first method, as shown in FIG.
This is a method in which reception is performed by a paid decoder (hereinafter referred to as a tuner-integrated paid decoder) that combines a tuner and a descrambler.The second method, as shown in FIG. 12, combines a BS tube and a descrambler. This is a method in which data is received by a combination of paid decoders (hereinafter referred to as paid decoders).

The combined reception branch of the BS tuner 41 and pay decoder 42 of the second method shown in FIG.
and the paid decoder 42 are connected by two signal lines that transmit FM detection output signals, that is, video signals and pit streams. This pit stream is obtained by QPSK demodulating a digital signal that has been QPSK modulated and sent, and the contents of the digital signal obtained by QPSK demodulation are a synchronization signal, a control signal, an audio signal, and independent data.

The paid decoder 42 extracts a timing signal necessary for descrambling and an initial l1 signal from this control signal and independent data.
The Il value data is separated and these signals are used to initialize the cipher generator 425 inside the paid decoder 42 to synchronize with the cipher generator on the sending side, and the video descrambler 423 and audio descrambler 426 Performs descrambling of video and audio signals. after that,
The audio signal is PCM decoded by a PCM decoder 428,
It is converted into an analog signal by a D/A converter 429 and outputted via a low-pass filter 4210.

(Problem to be solved by the invention) When switching channels when paying broadcasting is performed on multiple channels, the code generator inside the descrambler is synchronized with the scramble code generator on the transmitting side after channel switching. Descrambling cannot be performed until initialization is performed. Therefore, after switching channels, it is necessary to mute the audio signal until data is received to initialize the code generator inside the descrambler to prevent unpleasant sounds from being output. be.

In this case, if the tuner-integrated pay decoder of the first method mentioned above is used, information for channel switching can be obtained, so the data for initializing the code generator inside the descrambler is not received until it is received. , it is possible to mute the audio signal so that unpleasant sounds are not output.

However, in the above-mentioned second system combination receiving device of a BS tuner and a paid decoder, the signals given from the BS tuner to the descrambler are an FM detection output signal (video signal) and a bit stream, as shown in FIG. However, since information for channel switching is not provided, the following problems occur.

First, the first problem is that information for channel switching can only be obtained from an FM detection output signal or a bit stream. However, with current BS tuners,
When switching channels, only the frequency of the second local oscillator circuit is switched, and it is not always possible to reliably obtain channel switching information from the resulting bit stream. For this reason, it is difficult to reliably mute the audio signal and avoid outputting unpleasant sounds during the timing for initializing the code generator 425 inside the descrambler and while receiving and receiving the initial 1m data. There is a problem.

The second problem is that, as shown in the first problem above, there is a time lag before the information for channel switching is obtained from the bitstream, so the audio signal must be muted during that time to avoid outputting unpleasant sounds. The problem is that it is difficult to do so.

The present invention has been made in view of the above, and its purpose is to prevent a receiving device that is a combination of a BS tuner and a paid decoder from outputting unpleasant sound when switching channels, and to prevent the output of unpleasant sounds when switching channels. To provide a satellite broadcast receiving device that can reliably obtain information when switching channels.

[Configuration of the Invention (Means for Solving the Problems)] In order to achieve the above object, the satellite broadcasting receiving device of the present invention scrambles and transmits video and audio signals to prevent unauthorized viewing. A satellite broadcast receiving apparatus comprising a combination of a BS tuner that receives via a broadcast satellite and a decoder that descrambles the scrambled signal, the apparatus comprising: a timer that operates for a predetermined period of time in response to a channel switching signal; suppression bit switching means for switching an audio output suppression bit in a control code in a pit stream to be suppressed to a suppressed state in response to an operation output signal of the timer means; and suppressing the audio output suppression bit by the suppression bit switching means. channel switching means for switching the channel of the BS tuner when a predetermined period of time has elapsed since the channel switching means has switched the channel of the BS tuner; The present invention further comprises a stop means for stopping switching of the audio output suppression bit to the suppression state.

Further, the satellite broadcast receiving device of the present invention includes a BS tuner that receives video and audio signals that are scrambled and transmitted via a broadcast satellite in order to prevent unauthorized viewing, and a BS tuner that descrambles the scrambled signals. A satellite broadcast receiving device having a decoder in combination, a timer means that operates for a predetermined time in response to a channel switching signal, and a frame synchronization signal in a pit stream output from a BS tuner as an operation output signal of the timer means. The gist of the present invention is to have a switching means for switching not to output based on the output.

(Function) In the satellite broadcast receiving apparatus of the present invention, the timer means is activated for a predetermined period of time in response to a channel switching signal, and the υ1tll? '
By switching the audio output suppression bit in No. 7 to the suppression state in response to the operation output signal of the timer means, the output audio signal from the descrambler is muted at the time of channel switching.

In the satellite broadcast receiving device of the present invention, the timer means is operated for a predetermined period of time in response to a channel switching signal, and the frame synchronization signal in the pit stream output from the BS tuner is not output based on the operation output signal of the timer means. It is switched like this.

(Example) Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 11 is a block diagram showing the configuration of a BS tuner used in a satellite broadcast receiving apparatus according to an embodiment of the present invention. The BS tuner used in the satellite broadcast receiver d shown in the figure is, for example, the BS tuner shown in FIG. The difference is that first and second timers 521 and 522 are added, and the same components are given the same reference numerals.

FIG. 2 is a timing chart showing the operation of the embodiment shown in FIG. The operation of the embodiment shown in FIG. 1 will be explained below with reference to this timing chart.

Now, as shown in FIG. 2(a), channel A is switched to channel B, thereby providing a channel switching signal to the first timer and second timers 521 and 522 via terminal 523. , both timers operate.

When activated by the channel switching signal, the first timer 521 outputs a pulse signal after a first predetermined time has elapsed, as shown in (d) of FIG. The signal is supplied to the local oscillation circuit 24 to switch the frequency of the second local oscillation circuit 24. Similarly, when the second timer 522 is activated by the channel switching signal, it immediately generates an output signal as shown in FIG. continues to generate an output signal until a predetermined time, and
The output signal is converted to the audio output suppression bit switching circuit 51.
Supply to 8.

On the other hand, the frame synchronization detection circuit 520 detects the frame synchronization signal of the pit stream output from the QPSK demodulator 29 as shown in <a> of FIG. 2, and uses the detected frame synchronization signal to suppress the audio output. It is supplied to the audio output suppression bit switching circuit 518 via a bit timing generation circuit 519. Therefore, this audio output suppression bit switching circuit 518 responds to the output signal from the second timer 522 and the output signal from the audio output suppression bit timing generation circuit 519 to change the audio output suppression bit in the control code in the pit stream. (h) in Figure 2
As shown in the figure, the output audio signal of the descrambler is muted when switching channels.

As shown in FIG. 2(h), this suppressed state continues for a second predetermined time after the second timer 522 is activated in response to the channel switching signal. 4 frames later, that is, the first
When a predetermined period of time has elapsed, the frequency of the second local oscillation circuit 24 changes as shown in <f) in FIG. 2 by the output pulse generated from the first timer 521, as shown in (d') in FIG. Switching from channel A to channel B.

The second timer 522 continues to generate an output signal for two frames as shown in FIG. Continue to switch the output suppression bit to the suppression state for two more frames, then stop the output signal,
The switching of the audio output suppression bit to the suppression state is stopped.

In the above embodiment, the 4
Although the operation of the first and second timers 521 and 522 is set to switch to the suppressed state during this frame and the following two frames, the present invention is not limited thereto. Although the initialization period of the code generator differs depending on the scrambling system, the suppression period after channel switching is set to be longer than the initialization period.

In the embodiment shown in FIG. 1, the frame synchronization detection circuit 520 is also necessary for the PCM decoder 210 used in the BS tuner, and this PCM decoder 210 also normally performs frame synchronization detection. Therefore,
If it is possible to supply a frame synchronization signal for the audio output suppression bit timing generation circuit 519 from the PCM decoder 210, the frame period detection circuit 520 is unnecessary.

FIG. 3 is a specific circuit diagram of the audio output suppression bit switching circuit 518 used in FIG. 1. The circuit 518 shown in the figure includes a selector 518a and an AND circuit 518bT:#lI.

The output signal of the second timer 522 and the output signal of the audio output suppression bit timing generation circuit 519 are input to the AND circuit 518b, and the Q
1111 in the pit stream from PSK demodulator 29
The audio output suppression bit in the m code is switched to the low (L) level supplied to the input B of the selector 581b, that is, to the suppressed state.

FIG. 4 is a block diagram showing the configuration of a BS tuner used in a satellite broadcast receiving apparatus according to another embodiment of the present invention. The BS tuner shown in the same figure is the BS tuner shown in FIG.
Switching circuit 718 and timer 7 in S tuner
The difference is that 20 is added, and the same components are given the same reference numerals. In this embodiment, by controlling not to output a frame synchronization signal in a pit stream, synchronization is reliably caused in a paid decoder, thereby detecting channel switching.

FIG. 5 is a timing chart showing the operation of the embodiment shown in FIG. The operation of the embodiment shown in FIG. 4 will be explained below with reference to this timing chart.

As shown in FIG. 5(a), channel A is switched to channel B, and the channel switching signal is sent to terminal 7.
19 to timer 720, the timer 7
20 is activated, and the channel switching signal is supplied to the second local oscillation circuit 24.
Switch the frequency from channel A to channel B. When activated in response to the channel switching signal, timer 720 generates an output signal for a predetermined period of time as shown in FIG. 5(d), and supplies the output signal to switching circuit 718. In response to the output signal from the timer 720, the switching circuit 718 switches the QPSK signal being supplied to the other input.
The pit stream from the demodulator 29 is switched to a constant value and output. Note that in this case, at least the frame synchronization signal in the pit stream is not output. After the frame synchronization signal is opened and stopped for a predetermined period of time according to the output signal of the timer 720, that is, four frames in FIG. 5, when the operation of the timer 720 ends, the pit stream of channel B is output.

If the frame synchronization signal is not output for a predetermined period of time, this operation will definitely cause a synchronization loss in the pay decoder, and this will allow the channel switching to be detected.

In addition, in the above embodiment, the pit stream is switched,
The operation of the timer 720 is set to output a constant value and stop outputting the frame synchronization signal, and then output the pit stream of the switched channel four frames later. It is not limited to.

FIG. 6(a) is a specific circuit diagram of the switching circuit 718 used in FIG. 4. The switching circuit shown in the figure has a selector 7 with input B and control power S.
30, and the timer 7 is supplied to the control human power S.
QPS being fed to input A by an output signal of 20
The pit stream from the K demodulator 29 is switched to a constant value supplied to the other input B.

Further, FIG. 6(b) is another specific circuit diagram of the switching circuit 718. The switching circuit shown in the figure is shown in Figure 6 (
It is composed of the same selector 730 as the switching circuit in a), but the pseudo random signal (PB signal @) from the PN generator 731 is supplied to the input B of the selector, and the timer 720 is thereby inputted. During this period, a pseudo-random signal is output instead of a pit stream, thereby preventing a frame synchronization signal from being output.

Furthermore, FIG. 6(C) is yet another specific circuit diagram of the switching circuit 718. The switching circuit shown in the figure is the sixth
The same selector 730 as the switching circuit in Figures (a) and (b)
However, an O-clock signal is supplied to the input B of the selector, and as a result, while the timer 720 is being input, a clock signal is output instead of the pit stream, and thereby a frame synchronization signal is output. This is something that is not output.

FIG. 7 is a block diagram showing the configuration of an 83 tuner used in a satellite broadcast receiving Vt device according to yet another embodiment of the present invention. The BS tuner shown in FIG. 10 includes first, second, and third timers 922, 923, and 924, an audio output suppression bit switching circuit 918, an audio output suppression pit timing generation circuit 919, The difference is that a frame synchronization detection circuit 920 and a switching circuit 921 are added, and the same m
Components are given the same reference numerals. This embodiment has a function of suppressing the audio output suppression bit in the III fll 'R in the pit stream as explained in FIG. By controlling the frame synchronization signal in the pit stream so as not to output it, the pay decoder reliably causes out-of-synchronization, and thereby detects channel switching. Therefore, the first and second
The timers 922 and 923 are the first and second timers in FIG.
The third timer 924 in FIG. 7 corresponds to the timer 720 in FIG. 4, the audio output suppression bit switching circuit 918 and the audio output suppression bit timing generation circuit 919 in FIG. and frame synchronization detection circuit 920 are respectively the audio output suppression bit switching circuit 518, the audio output suppression bit timing generation circuit 519, and the frame synchronization detection circuit 52 in FIG.
0, and the switching circuit 921 in FIG. 7 corresponds to the switching circuit 718 in FIG.

FIG. 8 is a timing chart showing the operation of the embodiment shown in FIG. As shown in the figure, when the channel switching signal is input from the terminal 925, the first and second timers 922 and 923 are activated, respectively (d) and (e) in FIG.
), the second timer 923 generates an output signal as shown in FIG.
The output signal is supplied to the audio output suppression bit switching circuit 918, which switches the audio output suppression bit in the control code in the audio stream to the suppressed state as shown in (h) of FIG. The output audio signal of the descrambler is muted when switching. Here, the timing for switching the audio output suppression bit to suppression is generated by the audio output suppression bit timing generation circuit 919 based on the frame synchronization detected by the frame synchronization detection circuit 920.

As described above, the second timer 923 operates in response to the channel switching signal and switches the audio output suppression bit to the suppressed state, and four frames later, the first timer 922 operates as shown in FIG. When an output pulse is generated as shown in d), this output pulse switches the second local oscillation circuit 24 from channel Δ to channel B, and also starts the third timer 924.

When the third timer 924 is activated, the output signal of the third timer 924 is supplied to the switching circuit 921, which causes the pit stream being supplied to the switching circuit 921 via the audio output suppression bit switching circuit 918. is switched to a constant value and output, so that at least the frame synchronization signal in the pit stream is not output during the predetermined time period during which the output signal from the third timer 924 is output, except for four frames in FIG. That's what I do.

After the pit stream is switched to a constant value in the switching circuit 921, the third timer 924 is activated four frames later.
When the output signal of channel B disappears, the switching circuit 921 outputs the pit stream of channel B via the audio output suppression bit switching circuit 918.
Since the output signal of the timer 923 continues to be generated, the audio output suppression bit switching circuit 918 continues to switch the audio output suppression bit in the control code in the channel B pit stream to the suppressed state.

When this state continues for -2 frames, the output signal of the second timer 923 stops, and the pit stream of channel B is thereby output as is.

In the embodiment of FIG. 7, the frame synchronization detection circuit 9
20 is PCM decoder 2 used in the BS tuner
This is also necessary for PCM decoder 10, and usually this PCM decoder 2
10 also performs frame synchronization detection. Therefore, if it is possible to supply a frame synchronization signal for the audio output suppression bit timing generation circuit 919 from this PCM decoder 21O, the frame synchronization detection circuit 920 is not necessary.

Note that in each of the embodiments shown in FIGS. 1 and 7, the first timers 527 and 922 are not used, and the terminal 523
It is also possible to generate a pulse signal for switching the second local oscillation circuit 24 in response to a channel switching signal supplied from 925 and 925, thereby switching the channel.

Also, in order to mute the output audio signal of the descrambler when switching channels, that is, to set it to 0, 8
This can also be achieved by setting all the audio signals in the pit stream output from the 8'7-Us to O. In this case, the pit stream is scrambled by the descrambler, that is, to stably reproduce the clock by the BS tuner, that is, the 10th M-sequence PN signal (
×164-X3+1), the BS tuner uses this 10th M-sequence PN signal (×1
0 +
The next M-sequence PN signal itself) is switched to be output as the audio signal in the pit stream.

[Effects of the Invention] As explained above, according to the present invention, the timer means is opened at a predetermined time in response to a channel switching signal, and the BS
Since the audio output suppression bit in the il+ sign in the pit stream output from the tuner is switched to the suppressed state in response to the operation output signal of the timer means, the output audio signal from the descrambler when switching channels is is muted to prevent unpleasant sounds from being output.

Further, according to the present invention, the timer means is set for a predetermined time in response to a channel switching signal, and the frame synchronization number 13 in the broadcast stream output from the BS tuner is determined based on the operation output signal of the timer means. Since the audio signal is switched not to be output, the audio signal can be appropriately muted to prevent unpleasant sounds from being output.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a BS tuner used in a satellite broadcast receiving device according to an embodiment of the present invention, and FIG.
The figure is a timing chart showing the operation of the embodiment shown in FIG.
FIG. 3 is a specific circuit diagram of an audio output suppression bit switching circuit used in the embodiment of FIG. 1, and FIG. 4 is a diagram of a BS tuner used in a satellite broadcast receiver according to another embodiment of the present invention. FIG. 5 is a block diagram showing the configuration, FIG. 5 is a timing chart showing the operation of the embodiment shown in FIG. 4, and FIG.
) and (c) are specific circuit diagrams of the switching circuits used in the embodiment of FIG. 4, FIG. 7 is a block diagram showing the configuration of still another embodiment of the present invention, and FIG. FIG. 9 is a block diagram showing the structure of a pay broadcasting system; FIG. 10 is a block diagram showing the structure of a conventional BS tuner used in a satellite broadcast receiving device; FIG. The figure is a block diagram showing the configuration of a receiver using a tuner-integrated paid decoder in which a BS tuner and a descrambler are integrated, and Fig. 12 is a block diagram showing the configuration of a receiver using a pay decoder with only a conventional BS tuner and a descrambler. FIG. 2 is a block diagram showing the configuration. 518.918...Audio output suppression bit switching circuit, 519.919...M output nu1 bit timing generation circuit, 520.920...Frame synchronization detection circuit, 521.
922...First timer, 522.923...Second timer, 718...Switching circuit, 720...Timer, 924...Third timer.

Claims (2)

[Claims] (1) Satellite broadcasting reception having a combination of a BS tuner that receives video and audio signals that are scrambled and transmitted via a broadcasting satellite to prevent unauthorized viewing, and a decoder that descrambles the scrambled signals. The apparatus comprises: timer means that operates for a predetermined period of time in response to a channel switching signal; and an audio output suppression bit in a control code in a bit stream output from a BS tuner in response to the operation output signal of the timer means. suppression bit switching means for switching to a suppressed state; channel switching means for switching the channel of the BS tuner when a predetermined time has elapsed since the suppression bit switching means switched the audio output suppression bit to the suppressed state; and channel switching means for switching the channel of the BS tuner. A satellite broadcast receiving apparatus comprising: stopping means for stopping switching of the audio output suppression bit to the suppressed state by the suppression bit switching means when a predetermined period of time has elapsed since the channel of the BS tuner was switched by the means. . (2) Satellite broadcast reception comprising a combination of a BS tuner that receives scrambled and transmitted video and audio signals via a broadcast satellite to prevent unauthorized viewing, and a decoder that descrambles the scrambled signals. The apparatus includes timer means that operates for a predetermined period of time in response to a channel switching signal, and a switch that switches not to output a frame synchronization signal in a bit stream output from a BS tuner based on an operation output signal of the timer means. 1. A satellite broadcast receiving device comprising: means.