JPH0264469A - Signal analyzer - Google Patents

Abstract

PURPOSE:To accurately calculate the frequency change rate of a chirp signal by excluding the error due to the difference in filter characteristics by calculat ing the frequency change rates from the frequency-to-time data of the input signals of respective channels and calculating the arithmetic mean thereof. CONSTITUTION:When a pulse signal is inputted to channelized receivers 1, a sample timing generating circuit 2 transmits an amplitude data calculation trigger signal to the receivers 1 which in turn output the amplitude values of respective channels to amplitude value memories 3, and difference of the first order operation circuits 4 calculate all of the difference of the first order between sample points, while difference of the second order operation circuits 5 calculate the difference of the second order and channel center frequency passing time detection circuits 6 calculate times passing a center frequency value from all difference of the first order and the difference of the second order. Subsequently, a chirp signal frequency change rate calculation circuit 7 calculates the moving time T between the center frequencies of adjacent channels from said times and divides the filter interval between channels by T to calculate the frequency change rate of a chirp signal and also calculates the arithmetic mean thereof.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a signal analysis device, and is particularly used in a radio wave detection device that calculates radio wave specifications from a pulse signal arriving from a radio wave source such as a radar. related to things.

[Conventional technology]

Conventionally, there has been a device of this type as shown in FIG.

In FIG. 5, 1 is a channelized receiver that divides the reception frequency band into a plurality of continuous small frequency bands and receives the data, 2 is a sample timing generation circuit that generates the sampling timing for amplitude data of the channelized receiver, and 11
12 is a subtracter provided in two rows to calculate the second order difference between the output values (amplitude values) of adjacent channels of the channelized receiver, and 12 is a frequency calculator that calculates the frequency at each time from the second order difference value. The circuit includes a frequency value storage memory 13 that stores the frequency at each time, and a chirp signal frequency change rate determination circuit 14 that calculates the frequency change rate from the frequency value at each time.

Next, the operation will be explained. When a pulse signal is input to the channelized receiver 1, the sample timing generation circuit 2 transmits an amplitude data calculation trigger signal to the channelized receiver at regular time intervals.

Upon receiving this trigger signal, the channelized receiver outputs the amplitude value of each channel (hereinafter referred to as CH) to the subtracter. At this time, the amplitude value of one sample point of the pulse is as shown in FIG.

Next, the subtracter in the first column of the subtracters 11 provided in two columns calculates the first-order difference in amplitude from the amplitude values of each of the adjacent 2 CHs, and outputs it to the subtractor in the second column. The second subtractor calculates the second-order difference from each adjacent first-order difference value output from the first-row subtractor, and the frequency calculation circuit 12 calculates the second-order difference from the second-order difference and the amplitude value of each CH. Calculate the frequency value at the sample point.

The frequency calculation method at this time is as follows. That is, when the filters of each CH are arranged at intervals of 1/2 of the filter frequency width, the second order difference of the normal input signal is 16
dB±α (α is the error tolerance range due to filter characteristics, etc.), and therefore, the center frequency value of the CH with the largest amplitude among the CHs satisfying this condition is set as the input frequency.

The frequency value obtained in this way is stored in the frequency value storage memory 13. Every time the sample timing generation circuit 2 generates a trigger signal, the frequency value of the sample point is stored in the frequency storage memory 13, and after calculating the specified number, the chirp signal frequency change rate determination circuit 14 calculates (frequency change N)/(sample interval outputs the frequency change rate of the chirp signal from the average value of

[Problem to be solved by the invention]

Since the conventional signal analyzer is configured as described above, it uses the second-order difference between CHs with different filter characteristics to determine whether the signal is normal or not based on the same tolerance width α, so the conditions for determination are relaxed. There must be. Therefore, there is a problem that errors tend to occur in the frequency values at each sample point.

Furthermore, since the frequency value at each sample point is set to the center frequency of the CH having the maximum amplitude, there is a problem that differences in frequencies within the ICH cannot be recognized.

This invention was made to solve the above-mentioned problems with the conventional ones, and it is possible to calculate the rate of frequency change of a chirp signal by eliminating errors caused by differences in filter characteristics of channelized receivers. The purpose is to obtain a signal analysis device.

Means for Solving Problem C] The signal analysis device according to the present invention determines the second-order difference and the first-order difference of changes in output values (amplitude values) in time series for each CH of a channelized receiver. , determine whether the human signal of the CH concerned is normal from the second floor difference and the first floor difference,
Furthermore, the rate of frequency change is calculated from the information about the frequency of the CH, or the rate of frequency change of each channel with respect to the change in second-order difference for each channel is stored, and this stored data is used to calculate these phases for all channels. It is designed to calculate the additive average.

[Effect]

In this invention, since the configuration is as described above, each C
The second-order difference in the time series of H is a constant value for normal signals, and is not affected by the filter width of each CH. Also, since the time when the first floor difference becomes -〇 is the passing time of the relevant CH center frequency, the time when the first floor difference = 0 is interpolated using the second floor difference, and each CI] center frequency passing time is Alternatively, the information for converting the time vs. i width change into time vs. frequency is stored in advance, and the conversion is performed based on that information.
Since the relationship between time and frequency can be determined only based on the amplitude information in each CH and the change in frequency with respect to time can be determined, the frequency change rate can be calculated accurately.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows a signal analysis device according to an embodiment of the present invention. In the figure, 1 is a channelized receiver, 2 is a sample timing generation circuit that generates the sampling timing of amplitude data of the channelized receiver, and 3 is a sample timing generator for each CH. an amplitude value storage memory that stores a time series of timing amplitude values;
4 is a first-order difference calculation circuit that calculates the amplitude difference between two consecutive sample points on the amplitude value storage memory, and 5 is a second-order difference calculation circuit that calculates the second-order difference between three consecutive sample points from the output value of the first-order difference calculation circuit. A step difference calculation circuit, 6 a center frequency passage time calculation circuit that calculates the time when the CH center frequency value is passed from the first step difference and second step difference between sample points for each CH, 7 a center frequency pass time calculation circuit for each CH A chirp frequency change rate calculation circuit 20 calculates a chirp frequency change rate from time, and 20 is a chirp frequency change rate calculation means consisting of the center frequency passing time calculation circuit 6 and chirp frequency change rate calculation circuit 7.

Next, the operation will be explained. When a pulse signal is input to the channelized receiver 1, the sample timing generation circuit 2 transmits an amplitude data calculation trigger signal to the channelized receiver at regular intervals.

Upon receiving this trigger signal, the channelized receiver 1
Output the amplitude value of H to the amplitude value storage memory 3 60 Then,
After the amplitude values of a specified number of sample points are stored in the amplitude value storage memory 3, the first-order difference calculation circuit 4 calculates the first-order difference between consecutive sample points, that is, the sample point jl.
+ Amplitude value PA of tI+1 positive, difference PA of PAi-+
Calculate i-1PAt between all sample points. Next, the second-order difference calculation circuit 5 calculates the second-order difference between three consecutive sample points from the first-order difference output from the first-order difference calculation circuit 4, that is, the difference between two consecutive first-order differences. (PA5+-PA5) -(PAt-PA□
-1)=PAlet-2XPA, +PA, -, is calculated. Next, the center frequency passing time calculation circuit 6 calculates the time at which the CH passes through the center frequency value from the total first-order difference and second-order difference of the CH. The calculation method is as follows.

In other words, for each CH, the relationship between the input frequency and the output amplitude value due to the filter characteristics is a quadratic function, as shown in Figure 2 (al).The frequency changes at a constant ratio with respect to time due to the pulse input of the chirp signal. In this case, the relationship between time and amplitude value for each CH also becomes a quadratic function.Therefore, the second-order difference corresponding to the second-order differential coefficient becomes constant at the time of chirp signal input, and the time at which the first-order difference = 0 Alternatively, the time when the extrapolated value of the first-order difference becomes O is the maximum point of the CH characteristic, that is, the time when it passes through the center frequency.Using this property, the second-order difference is constant (hardware of quadratic curve (taking into account the allowable range of distortion due to characteristics), and if constant, 1
The time when the floor difference changes from a positive value to a negative value (1,,1,
. 1) and the first-order difference at that time (ΔPA, ,
ΔPAj. 1), the time at which the first-order difference=0, that is, the time at which the CH center frequency passes, is calculated using the following formula. However, if there is a sample point where the first-order difference is -0, that time is used.

CH center frequency passing time FIG. 2 (al to FIG. 2 (C1) shows a conceptual diagram of this time calculation method.

The passage time of the CH center frequency is calculated for each CH by the above method, and then the chirp frequency change rate calculation circuit 7 uses the CH center frequency passage time of all CHs to calculate the time required to move between the center frequencies of adjacent CHs, i.e. The frequency change rate of the chirp signal can be calculated by finding the average time T required from passing the center frequency of , CH, to passing the center frequency of CHILl, and dividing the inter-CH filter interval by T.

In the above embodiment, the first-order difference calculation circuit 4 calculates the difference between the amplitude values of each sample point of the CH stored in the amplitude value storage memory 5, and obtains the first-order difference. By providing a maximum amplitude storage memory 8 for all channels as shown in FIG. 3, it is possible to detect the frequency change rate of a chirp signal whose amplitude changes within one pulse. That is, in FIG. 3, the all-CH maximum amplitude storage memory 8 stores the maximum amplitude value over all the CHs at each sample point. Next, the first-order difference calculation circuit 4 calculates the C
Instead of the amplitude value of each sample point of H,
1 of the relative amplitude value of each sample point of H to the maximum amplitude between all channels (amplitude of the relevant CH - total C) maximum amplitude between I)
Calculate the floor difference. The operations described below are the same as those of the above embodiment.

Therefore, the CH amplitude at each sample point is P
,,P,,P,...The maximum amplitude among all channels is P ljl
+ P 11! + P off, the first floor difference in the above embodiment is Pg P+, Ps Pg.

..., whereas the first-order difference in this example is (Pg P-z)-(P+-P
-+), (P3 P-3)-(Pg P-t)
,...is.

In the embodiment shown in FIG. 1, the second-order difference calculation circuit 4 calculates the second-order difference, and by calculating the time when the first-order difference becomes O, the CH center frequency passage time calculation circuit 6 calculates the CH center frequency. The configuration is shown in which the chirp signal frequency change rate calculating circuit 7 calculates the frequency change rate from the relationship between each CH center frequency and time. Chirp frequency change rate calculation means 3 consisting of a rate calculation circuit 9 and a frequency average change rate calculation circuit 10
By setting 0, the second-order difference (this value is a value uniquely determined by the characteristic shown by the quadratic curve of the filter shown in Fig. 6 and the frequency change rate) versus the frequency change rate can be calculated in advance for each CH. Stored in the frequency change rate calculation circuit 9, -
Generally, the frequency change rate calculation circuit 9 calculates the frequency change rate from the second order difference, and then the frequency average change rate calculation circuit 10 calculates the frequency change rate for each C.
The equivalent average of the rate of change output from H is calculated, and even with this configuration, the rate of change of the chirp signal can be calculated accurately.

〔Effect of the invention〕

As described above, according to the signal analysis device according to the present invention,
Rather than calculating the frequency from the amplitude patterns of CHs with different amplitude characteristics for the same frequency input, the structure is configured so that frequency conversion processing is performed only within the same filter, so even if there are differences in characteristics between filters, This has the effect of being able to calculate the chirp signal frequency change rate with high accuracy.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a signal analysis device according to an embodiment of the present invention, FIG. 2 is a conceptual diagram showing a method of calculating the CH center frequency passage time in the embodiment of FIG. 1, and FIGS. 3 and 4 5 is a block diagram showing another embodiment of the present invention, FIG. 5 is a block diagram showing a conventional signal analysis device, and FIG. 6 is a conceptual diagram showing each CH ratio (output amplitude) value for the input signal of the channelized receiver. be. In the figure, 1 is a channelized receiver, 2 is a sample timing generation circuit, 3 is an amplitude value storage memory, 4 is a first-order difference calculation circuit, 5 is a second-order difference calculation circuit, 6 is a center frequency passage time calculation circuit, 7 is a chirp signal frequency change rate calculation circuit, 8 is a maximum amplitude storage memory between all CHs, 9 is each CH frequency change rate calculation circuit, 10 is a frequency average change rate calculation circuit, 11 is a subtracter, 12 is a frequency calculation circuit, 13 is a frequency value storage memory, 14 is a chirp signal frequency change rate determination circuit, and 20.30 is a chirp frequency change rate calculation means. Note that the same reference numerals in the figures indicate the same or equivalent parts. Figure 1 (CI) Figure 1 (b) Figure 1

Claims (1)

[Claims] (1) A channelized receiver, a sample timing generation circuit that generates the sampling timing of the amplitude data received by the channelized receiver, and a sample timing generation circuit that generates the first and second order differences in time series of the amplitude values of each channel of the channelized receiver. A floor difference arithmetic circuit that calculates the difference, and converts the amplitude information into time information for each channel from only the floor difference information in each channel and converts this into frequency information or a frequency stored for the floor difference information. chirp frequency change rate calculation means for calculating the frequency change rate of the chirp signal by calculating the frequency change rate for each channel from the time series amplitude change of each channel based on the change rate and calculating the arithmetic average for all channels; A signal analysis device characterized by: