JPH0263217A - Bipolar logic circuit - Google Patents

Abstract

PURPOSE:To extract the charge of the base independently of an output load capacity by conducting a 4th transistor(TR) with respect to the conduction of a 1st TR and discharging the base charge of a 2nd TR. CONSTITUTION:A current is supplied to an output terminal 3 from a high potential power connection terminal 1 via a resistor 25 and a potential at the output terminal 3 goes to a high level. On the other hand, when a high level signal is inputted to a base of an npn TR 11 with SBD, which is conductive resulting that npn TRs 14, 16 with SBD are conductive, the potential at the output terminal 3 goes to a low level, and the level at the output terminal 3 changes from a high to a low level. By such an operation, an emitter current of the npn TR 11 with SBD makes the npn TR16 with SBD conductive at first. Thus, the charge stored on the base of an npn TR 13 is discharged in response to the current amplification factor of the npn TR 16 with SBD.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to bipolar logic circuits, and particularly to providing an output section of a bipolar logic circuit.

[Conventional technology]

An example of a conventional bipolar logic circuit is the '85 Mitsubishi Semiconductor Data Book Bipolar Digital 10 (L8 Male'I).
'L) edition, the one shown on pages 2-9 is known.

Figure 2 is a circuit diagram showing an equivalent circuit of the output section of the conventional LSTTL, in which (1) is a high potential power supply connection terminal, (2) is a low potential power supply connection terminal, and (3) is an output. It is a terminal. (b) is an 8BD register which receives a signal designating a low or high logic output based on its base, and its collector is connected to a high potential power supply connection terminal (1) via a resistor Q. ＠ and (to) are Darlint-connected SBD size npn transistor and npn) transistor, respectively, and can be considered as one transistor element for equal savings. Continuity, output terminal (3
) to selectively connect to the high potential side □
npn) The emitter of the transistor (to) is the output terminal (3
), and the collectors of the SBD transistors (npn) and npn) are connected to each other and connected to the high potential power supply connection terminal +1) through the resistor (a).
K is connected. npn) A resistor (to) is connected between the base of transistor 0 and the output terminal (3). a4 is an 8BD t#npn) transistor that conducts with respect to the conduction of the 8BD transistor α and selectively connects the output terminal (3) to the low potential side.
Its base is connected to the emitter of the transistor aυ, its collector is connected to the output terminal (3), and its emitter is connected to the low potential power supply connection terminal (2).

(G) is an npn with a BBD) 5BDltnpn) is a transistor for extracting the base charge when the transistor Q4 is inverted from a conductive state to a non-conductive state.
npn) is connected to the base of the transistor α→, and its emitters are respectively connected to the low potential power supply connection terminal (2).

Next, the operation of the circuit will be explained. First, 8BD#np
n) When a high level signal is input to the base of the transistor OD, the SBD transistor (B) becomes conductive, and as a result, the BBD transistor θ conducts and current flows from the output terminal (3). As a result, the potential of the output terminal (3) becomes low level. Along with this, B
npn with BD) Since the collector potential of transistor αρ decreases, SBD npn) transistor (2), n
pn ) transistor becomes non-conductive. Next, when a low level signal is input to the base of the 5BDftnpn) transistor α, the SBD ftn1)n transistor (b) becomes non-conductive, and as a result, the SBD
pn) 9 resistor (b) also becomes non-conductive. At this time, the base charge of the SBD pf npn transistor (b) is extracted by the transient conduction of the npn ) transistor with SBD (to), so that the turn-off time of the npn ) transistor a♦ with SBD is accelerated. In addition, due to the non-conduction trap of the SBD-equipped npn) transistor (b), its collector potential rises, and the SBD-equipped npn) transistor (2)
and npn) transistors (to) conduct, current is supplied from the high potential power supply connection terminal (1) to the output terminal (3) via the resistor □□□, and the potential of the output terminal (3) is at a high level. It is expressed as

[Problem to be solved by the invention]

Since the conventional bipolar logic circuit was configured as described above, as a means to speed up the operation of changing the state of the output terminal (3) from the high potential state to the round potential state, the base charge of the npn transistor (2) was changed to SBD. 1npn) Since we used a method of turning on transistor a4 and simultaneously disconnecting it through a resistor, SBD and npn transistor α
There is a problem in that the base charge of the nph transistor cannot be discharged until → becomes conductive and becomes a low level, and the turn-off of the npn transistor becomes slow.

This invention was made in order to solve the above-mentioned problems.The turn-off of the npn) transistor (to) is carried out by the conduction of the SBD and npn) transistor αQ, so that the output terminal can be quickly turned off. The object of the present invention is to obtain a bipolar logic circuit that can reduce the transient current (3).

[Means for Solving the Problems] A bipolar logic circuit according to the present invention is connected between a high potential point and a low potential point, receives a signal specifying low or high of an output terminal as a base, and outputs four specified signals. a transistor of fJl that is conductive when the signal is high and non-conductive when the signal is high;
A second transistor and a third transistor are conductive when the first transistor is non-conductive and non-conductive when the first transistor is conductive, and are conductive when the first transistor is conductive and are non-conductive when the first transistor is conductive. A fourth transistor and a fifth transistor that are non-conductive, a diode connected between the collector of the fourth transistor and the base of the second transistor, and a diode connected between the base of the fourth transistor and the base of the first transistor. A resistor (E) is connected between the connectors.

[Effect]

In the bipolar logic circuit of the present invention, when the first transistor is conductive, the fifth transistor is conductive and the second and third transistors are non-conductive, while the fourth transistor is conductive and the second transistor is conductive. The base charge of the transistor is rapidly removed. [Embodiment] An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a circuit diagram showing an embodiment of the output circuit of a bipolar logic circuit according to the present invention, and the symbols in the figure are (b), (a), (to), α→, (g), (b), (goods). , 翰, (c) is the second
This is the same as the conventional one shown in the figure. For this reason,
0 is an SBD rtnpn ) transistor that conducts with respect to the conduction of the 8BD npn ) transistor (b), and its base is connected to the emitter of the 8BD npn ) transistor (b) via a resistor (e), Collector is B
It is connected to the base of the npn transistor (to) through B D al and the emitter is connected to the low potential power supply connection terminal (2). Next, the operation of the circuit will be explained. First, 8BDft
When a low level signal is input to the base of the npn) 9 register (b), KsB is input as in the case of the conventional circuit.
Djtnpn) transistor U, Q41. (10 becomes non-conductive. Along with this, the collector potential of the SBD 1lnpn) transistor (b) increases, so that 8BD f
f npn ) transistor (2) and npn ) transistor (to) are conductive.

Therefore, from the high potential power supply connection terminal (1) to the resistor (2
) is supplied to the output terminal (3), and the potential of the output terminal (3) becomes high level. On the other hand, SBD#np
When a high level signal is input to the base of the n transistor (b), the np with SBD
n) The transistor (b) is not conductive, resulting in BBD
(npn) The transistors α◆ and αQ become conductive and the potential of the output terminal (3) becomes low level, and the output terminal (3) changes from high level to low level. In accordance with the above operation, the emitter current of the SBD f4 npn) transistor (b) first becomes conductive by making the SBD transistor (g) conductive.
The charge accumulated in the base of the SBD can be removed according to the current amplification factor of the transistor (npn). Also, 8B
Dt#npn transistor (b) collector/emitter Kanden 8EVcm to 0.25V, SBD I'tnp
n) Base-emitter voltage VB of transistor (2)
12 is 0.75 V, the anode-cathode voltage VD31 of the diode 0◇ is 0.5 V, and the base-collector voltage VBc16 of the SBD⋅npn transistor QG is 0.5 V, then Vcm11+Vmc16=0.25+0. 5=0.75
V ・----(1) V1m12+VD31 =
0.75+0.5=1.25V ------(2) 9 In order to prevent the potentials of vclil +Vac16 and V1m12 from becoming the same potential, diode 01 is connected.

In addition, 8BD from SBD (npn) transistor (b)
In order to prevent the concentration of current supplied to the base of the transistor α◆ and supply sufficient base current to the transistor α◆, a resistor is connected to the base of the 8BD transistor and the 5BDftnpn) transistor B)
is connected between the emitter of

Further, the 5Bp0D used in the above embodiment may be replaced with a pn junction diode, and the same effects as in the above embodiment can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, the fourth transistor is made conductive when the first transistor is made conductive, and the base charge of the second transistor is drained.
The base charge can be removed without depending on the output load capacitance, and the time during which both the second transistor and the fifth transistor are conductive can be shortened.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the output circuit of a bipolar logic circuit according to the present invention, and FIG. 2 is a circuit diagram showing an output circuit of a conventional bipolar logic circuit. This is a road map. In the figure, (1) is a high potential power supply connection terminal, (2) is a magnetic potential power supply connection terminal, (3) is an output terminal, (b), α→,
QI are the first, fifth and fourth transistors each consisting of an 8BDffnpn) transistor, (6), and the third . Second
0 transistor, 01) is 8BD. (1) is resistance. In Figure 1, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] In a bipolar logic circuit that performs low and high logic output by selectively connecting an output terminal to either a low potential point or a high potential point, there is a connection between the high potential point and the low potential point of the bipolar logic circuit. a first transistor connected to the output terminal, which receives a signal designating low or high at the output terminal and becomes conductive when designated as low and non-conductive when designated as high; and the high potential. a second transistor connected between the point and the output terminal, conductive when the first transistor is non-conductive, and non-conductive when the first transistor is conductive; and the high potential point and the second transistor. between the base of the second transistor and the low potential point; a fourth transistor connected to the first transistor, conductive when the first transistor is conductive, and non-conductive when the first transistor is non-conductive;
and a fifth transistor connected between the output terminal and the low potential point, conductive when the first transistor is conductive, and non-conductive when the first transistor is non-conductive. circuit.