JPH0259541B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a magnetic recording/reproducing device (hereinafter referred to as VTR).
In particular, it relates to a method of creating a tracking error signal when tracking control is performed using four types of pilot signals.

2. Description of the Related Art A conventional method of creating a tracking error signal will be described.

FIG. 18 shows magnetization trajectories recorded with four types of pilot signals. In the same figure, A ₁ , B ₁ , A ₂ ...
are recording tracks recorded by A head and B head having different azimuth angles, and f ₁ to _{f 4} represent pilot signals. The frequency of the pilot signal has a value of 6.5f _H to 10.5f _H as shown in the figure, where f _H is the horizontal synchronizing signal frequency in the video signal. The pilot signal is sequentially switched cyclically for each field and is recorded superimposed on the information signal. The frequency difference between the pilot signals recorded on each track is _fH and _3fH .
Therefore, by extracting the f _H and 3f _H frequency components using the method described later and comparing their levels, the compared signal can be used as a tracking error signal.

In FIG. 18, 1801 indicates a magnetic head, arrow 1802 indicates the scanning direction of the magnetic head, and arrow 1803 indicates the transport direction of the magnetic tape.

FIG. 19 is a diagram showing a processing circuit for obtaining a tracking error signal. In the same figure,
A reproduction pilot signal is input from a terminal 1901. For example, when the scanning head position is as shown in FIG. 18, the reproduced pilot signal is f ₂ ,
This is a composite signal of f ₃ and f ₄ . Circuit 1902 is a balanced modulation circuit that multiplies the reference signal input from terminal 1903 and the reproduced pilot signal. The reference signal is a signal having the same frequency component as the pilot signal recorded on the main track scanned by the head, and is a signal at _f3 in the head scanning shown in FIG. 18. The output signal of the circuit 1902 is the sum and difference signal of the reference signal and the reproduced pilot signal, and the difference signal therein is the one that is output from the _fH tuning circuit 190.
Circuits 1906 and 1907 taken out by the 4 and 3f _H tuning circuit 1905 are detection rectifier circuits, and the circuit 1908 is a level comparison circuit. Since the output level of the circuit 1908 increases or decreases depending on the level difference between the f _H and 3f _H signals, it can be used as a tracking error signal. circuit 190
9 is an analog inversion circuit, and circuit 1910 is an analog switch. Circuit 1910 connects terminal 1
Switched by the head switching signal (hereinafter referred to as H/SW signal) input from 911,
Outputs inverted and non-inverted signals. The H/SW signal is a rectangular wave signal with a frame period (30 Hz in the NTSC system) synchronized with the rotational phase of the magnetic head.
The reason why the inverted and non-inverted signals are switched and extracted for each field is to always make the tracking error direction of the magnetic head equal to the increasing/decreasing direction of the tracking error signal. For example, as shown in Fig. 18, when the head scans the A _i (i = 1, 2, 3, ...) track and when it scans the B _i track, the head shifts in the same direction. f _H for and
Since the directions of increase and decrease of the 3f _H signal are different, the polarity must be reversed for each field.

A tracking error signal taken out to terminal 1912 is sent to the capstan control system. The capstan control system uses a tracking error signal to control the feeding phase of the magnetic head so that the magnetic head on-tracks on the recording track and performs reproduction scanning.

Next, the waveforms of each part of the circuit block shown in FIG. 19 will be explained.

Figure 16 shows A head 1601 and B head 160.
2 is a diagram showing the relative position of the magnetic head and the recording track when the recording track is on-tracked and scanned for reproduction, and FIG. 17 is a diagram showing each signal waveform obtained at this time. .

In FIG. 17, a is the H/SW signal, and a
A ₁ , B ₁ , ... in the figure are shown in Figure 16.
Indicates the time for reproducing and scanning each track of A ₁ , B ₁ , . . . FIG. 17b is the output signal of the f _H tuning circuit 1904, and c is the output signal of the 3f _H tuning circuit 1905. When on track, f _H and
Each playback level of 3f _H is equal. d shows the output level of the level comparison circuit 1908. During on-track, the value is, for example, 1/2 V _cc (V _cc is the power supply voltage). The tracking error signal obtained at the terminal 1912 is shown in e. Since the inverting circuit 1909 is a circuit that inverts the level difference with respect to 1/2 V _cc , the signals d and e become equal during on-track.

FIG. 14 shows a diagram when each head causes a track shift to the left on the paper with respect to the recording track, and FIG. 15 shows waveforms of various parts at this time. As shown in FIG. 15, during the period when the A head scans, the signal component of f _H is smaller than that of 3f _H , and the signal component of B
During the head scanning period, the relationship is reversed. As a result, the output d of the level comparison circuit becomes a rectangular wave centered at 1/2 V _cc as shown in the figure. Note that it is depicted here that the output of the level comparison circuit becomes high when the level of f _H is greater than the level of 3f _H. If the output of the level comparison circuit obtained during the scanning period of the B head is inverted around 1/2 V _cc , the tracking error signal will be as shown in figure e, and the level from 1/2 V _cc will be inverted. The difference 1501 corresponds to the amount of track deviation.

Next, the waveforms of various parts when the head heights of the A head and the B head are different will be explained.

The head heights of heads A and B are adjusted to be equal from a reference plane perpendicular to the rotation axis, but in reality, an adjustment error occurs. The head height adjustment error is the difference between one head and the other head.
This is equivalent to a relative shift in the width direction of the recording track. FIG. 12 shows the relative positional relationship when a normal recorded track recorded by a head with no head height difference is reproduced using heads with such a head height difference. The difference will be obvious if you compare it with the diagram (Figure 16) when there is no difference in head height. Although a detailed explanation will be given later, in the case of heads having different head heights, the control system is stable at the head position shown in FIG. 12.

FIG. 13 is a diagram showing each signal at the head position shown in FIG. 12. The signal having the f _H frequency component is always at a small level during the scanning period of each head A and B, and the 3f _H component is at a large level.
As a result, the output of the level comparison circuit exhibits the changes shown in FIG. 13d, and the tracking error signal inverted during the B head scanning period becomes the signal shown in e. Since the tracking error signal is sent to the capstan control system through a low-pass filter, its average level is 1/2 V _cc , and the control system is stabilized in this state. Therefore, the head position shown in FIG. 12 is said to be the stable position.

Problems to be Solved by the Invention The level difference 1301 shown in FIG. 13e cannot be completely removed even if the signal is passed through a low-pass filter, and fluctuation components of the H and SW periods remain. As a result, the rotational speed of the capstan motor fluctuates, causing problems such as image shaking. Therefore, even when heads with different head heights are used, it is necessary to obtain a tracking error signal with no level difference.

Means for Solving the Problems In the present invention, the pilot signal recorded on each adjacent track of the track scanned by the head is
Separate the wave number components of f _H and 3f _H and compare their levels.
The signals after the level comparison within the scanning period of the A and B heads are sampled and held, for example, to extract the respective signal levels, and the level difference between these two signals is used as a tracking error signal.

Effect By using the above method, it is possible to remove the fluctuation component of the tracking error signal due to the head height difference, so it is possible to suppress unnecessary rotational fluctuations of the capstan motor, and achieve accurate tape feeding. be able to.

Embodiment FIG. 1 is a diagram showing an embodiment of the present invention. A reproduced pilot signal is input from a terminal 101, and a reference signal is input from a terminal 103. circuit 10
2 is a balanced modulation circuit, circuit 104 is an f _H tuning circuit,
Circuit 105 is a 3f _H tuned circuit, circuits 106 and 1
07 is a detection rectifier circuit, and circuit 108 is a level comparison circuit. The signals 101 to 108 and the circuit operations are the same as those already explained using FIG. 19. The circuit 109 is an arithmetic circuit that takes out the output of the level comparison circuit at a position phase synchronized with the gate signal input from the terminal 110.
The difference between the signal levels taken out during the scanning period of each of the A and B heads is determined and output as a tracking error signal.

Next, a specific configuration example of the arithmetic circuit 109 will be described.

FIG. 2 shows a specific example of the configuration of the arithmetic circuit, and FIG. 3 shows waveforms at various parts in FIG. In Figure 2,
The output signal g of the level comparison circuit is inputted from the terminal 201. In this example, the level comparison circuit output shown in FIG. 15d is taken as an example. Circuits 202 and 203 are sample and hold circuits. circuit 20
7 and 208 are sample pulse generation circuits;
From the gate signal f input from the terminal 206, h
and create each sample pulse indicated by i. Each of the sampled and held signals j ₁ and j ₂ is sent to the subtraction circuit 2
04 is input. The subtraction circuit 204 is a circuit that outputs a potential of 1/2 V _cc when the input signals are equal, and increases or decreases the level difference between the input signals to the 1/2 V _cc level when the input signal levels differ. In this example, the tracking error signal shown in FIG. 3k is displayed by subtracting j ₁ from j ₂ . Since the signal shown in FIG. 3k is the same signal as the signal shown in FIG. 15e, there is no problem even if the tracking error signal is created using the circuit configuration shown in FIG.

Next, tracking error signals when the head heights are different will be explained. The level comparison circuit output at this time is the 13th level comparison circuit output, as already explained.
This is the signal shown in Figure d. This signal d, A and B
Even when sampled and held during the head scanning period, the levels of both hold signals are equal. Therefore, the output of the subtraction circuit 204 shown in FIG. 2 is 1/2 V _cc , and a tracking error signal without level fluctuation can be obtained.

The arithmetic circuit 109 shown in FIG. 1 can also be configured using a microcomputer, and an example thereof will be described below.

FIG. 4 is an auxiliary diagram for explaining software processing to be described later, in which l is a diagram showing the H/SW signal, m is a diagram showing the timing and number of interrupts of a timer interrupt, and n is a diagram showing an example of reproducing a PCM signal.

Processing by software can be explained using FIGS. 5 and 6.

FIG. 5 is a flowchart showing the processing of the main routine. In the figure, process 501 is a process for performing initial settings, such as clearing the RAM and setting the initial value of the tracking error signal.
In judgment processing 502, if the H.SW signal is in the A head scanning period, processing 503 and subsequent steps are executed; otherwise, a time wait is performed. Processing 503
is actually executed when the H and SW signals change from the B head scanning period to the A head scanning period. Process 503 is a process for starting an internal timer. The timer time can be selected arbitrarily, but
For example, as shown in Fig. 4m, a value is selected that divides one frame into 20. Processing 504 is indicated by CT
Clear RAM. In process 505, H.SW
The process waits until the signal reaches the B head scanning period, and when the B head scanning period arrives, processing 502 is executed. The above is the main routine processing.

If a timer interrupt occurs during execution of the main routine, the interrupt processing shown in FIG. 6 is executed. 6th
In the figure, processing 601 increments the contents of the RAM indicated by CT by 1. CT every time a timer interrupt occurs
Since the value of is incremented by 1, the CT stores the number of timer interrupts. Through process 602,
If the value of CT becomes 5, process 603 is executed; otherwise, process 605 is executed. Processing 603
reads the output of the level comparison circuit at that time and stores it in the RAM indicated by E1. Processing 604 is a RAM that stores tracking error signals;
Output the value of E. At the initial stage, such as when the power is turned on,
The initial value set in process 501 (FIG. 5) is output. When the value of CT is not 5, processing 605 is executed, and when the value of CT is 15, processing 606 and subsequent steps are executed. If the value of CT is not 15, processing 604 is executed. Process 606 reads the output of the level comparison circuit at that time and stores it in the RAM indicated by E2. Process 607 adds a value of 1/2 V _cc to the difference between each value of E1 and E2, and stores it in the RAM indicated by E. That is, the tracking error signal is newly rewritten by processing 607. When processing 607 is completed, processing 604 is executed and a new tracking error signal is output.

The CT value 5 shown in processes 602 and 605 and
15 indicates the sampling position. As is clear from Fig. 4, the positions where the CT value is 5 and 15 are selected at the center of each head scanning period, and in a normal VTR that records and plays back video signals, the CT value is set to the above value. That's fine. However, with 8mm video, the recording track area of the video signal is divided into five, and the time-compressed PCM
Consideration has been given to recording and reproducing only audio signals. The reproduced PCM signal at this time is, for example, Fig.
It can only be obtained from parts 401 to 404 shown in .
Therefore, the output signal of the level comparison circuit can only obtain a normal value in the above-mentioned reproduction portion. Even in such a VTR that records and reproduces only PCM signals, the present invention only requires changing the values of condition values 5 and 15 in processes 602 and 605. For example, in the example shown in FIG. 4, it is sufficient to select the values 3 and 13.

Next, we will introduce a 4-head type using a small diameter cylinder.
An example of application to a VTR will be explained.

FIG. 9 is a diagram showing the head arrangement and the amount of tape wrapped in a four-head type cylinder. In the figure, R, R' and L, L' are heads having different azimuth angles, and are arranged at 90 degree intervals as shown in the figure. 9
01 is a magnetic tape, which is wound around the rotating cylinder 902 at approximately 270 degrees. The advantage of having such a four-head type cylinder is that the cylinder diameter can be made smaller than that of a two-head type cylinder.

In a four-head type VTR, there are variations in head height among the four heads. The relationship between the head position and the recording track at this time is shown in FIG. 10, and the signals of each processing circuit under the conditions shown in FIG. 10 are shown in FIG.

In FIG. 10, the heads 1001 to 1004 are R, L, R', and L' heads, and the relative position of each head with respect to the recording track is slightly shifted. The reproduction level of the f _H and 3f _H components under conditions with such a head height difference is:
The waveforms are shown in FIGS. 11b and 11c. Therefore, the output of the level comparison circuit and the tracking error signal obtained by the conventional processing method become the signals shown in d and e. As is clear from the figure, the difference in height of the four heads appears as a difference in the level of the tracking error signal. Note that since the average value of the tracking error signal shown in e is 1/2 V _cc , the control system is stable in this state.

According to the present invention, a value obtained by subtracting each level of each head scanning period is used as a tracking error signal, so the same concept can be applied to a 4-head type VTR. For example, in the signal shown in Fig. 11d, the values 1101 to 1104 can be subtracted from each other, (1101) - (1102) + (1103) -
(1104) and the value of 1/2 _Vcc may be used as the tracking error signal.

Next, a specific processing method for the 4-head type will be explained.

FIG. 7 shows the main routine processing when the present invention is applied to a 4-head type VTR.
The figure shows processing at timer interrupt.

In FIG. 7, 701 is an initial setting process in which initial values of RAM clear and tracking error signals are set. Process 702 is a process of setting the value of N, which is a RAM for counting frame circuits, to 1. 703 is a process for executing the processes after 704 if the H/SW signal is in the A head scanning period. 704 is a timer start process, and 705 is a memory for the timer count.
This process clears the RAM indicated by CT. 70
6 is a process of increasing the value of N by 1. According to step 707, if the value of N is equal to or larger than 2, process 70
8 to set the value of N to zero. If it is 2 or less, process 709 is executed. 709 is a process for determining whether the H/SW signal is in the B head scanning period or not.
From the process flow shown in FIG. 7, it can be seen that the value of N takes a value of 0 or 1 in the frame period.

FIG. 8 shows processing at the time of timer interrupt. In the figure, at 801, CT is incremented by 1 and the number of timer interrupts is stored. Processes 802 and 806 are similar to those described using FIG. Processes 803 and 807 determine whether the process is for the first frame or the second frame, and if it is the first process, the output of the level comparison circuit in each head scanning period is determined in steps 804 and 808. The values are stored in RAM in E1 and E2. If it is the second process, in processes 805 and 809, the output values of the level comparison circuit at each timing are stored in the RAMs indicated by E3 and E4. After executing process 809, execute process 810 and use each value of E1 to E4 to calculate E1−E2+E3.
-E4+1/2V _cc is calculated, and the calculation result is stored in the RAM indicated by E, which stores the tracking error signal value. Processing 811 is processing for outputting a tracking error signal.

Effects of the Invention As is clear from the above explanation, according to the present invention, it is possible to eliminate the level difference in the tracking error signal due to the height difference between each head, so the capstan motor does not fluctuate. Accurate magnetic tape feeding can be achieved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a specific configuration example of an arithmetic circuit,
Fig. 3 is a waveform diagram of each part of Fig. 2, Fig. 4 is a supplementary diagram for explaining the arithmetic processing by the microcomputer, and Fig. 5 shows the main processing when the present invention is applied to a two-head VTR. Flowchart: FIG. 6 is a flowchart showing timer interrupt processing used in conjunction with the processing in FIG. 5; FIG. 7 is a flowchart showing main processing when the present invention is applied to a 4-head VTR; The figure is a flowchart showing a timer interrupt used in conjunction with the process in Figure 7.
FIG. 9 is a plan view showing the head arrangement of a 4-head VTR, FIG. 10 is a diagram of the relationship between the height difference of each head and the recording track that occurs in a 4-head VTR, and FIG. 11 is under the conditions shown in FIG. 10. Figure 12 is a diagram of the relationship between each head height difference and the recording track that occurs in a two-head VTR, and Figure 13 is a waveform diagram of each part of the tracking error signal processing circuit under the conditions shown in Figure 12. Figure 14 is a waveform diagram of each part of the tracking error signal processing circuit, and Figure 14 is a diagram of the relationship between the head position and recording track during mistracking.
Figure 5 is a waveform diagram of each part of the tracking error signal processing circuit under the conditions shown in Figure 14, Figure 16 is a diagram of the relationship between the head position and recording track during on-tracking, and Figure 17 is shown in Figure 16. FIG. 18 is a diagram showing the magnetization locus of the pilot signal, and FIG. 19 is a block diagram of the conventional tracking error signal processing circuit. 102...Balanced modulation circuit, 104, 105...
f _H and 3f _H tuning circuit, f _H ...Horizontal synchronizing signal frequency, 106, 107...Detection rectifier circuit, 108...
... Level comparator, 202, 203 ... Sample hold circuit, 207, 208 ... Sample pulse generation circuit, CT ... Timer counter, E1 to E4
...RAM that stores the output value of the level comparison circuit at that time, E...RAM that stores the tracking error signal value, N...RAM that stores the number of frames, _Vcc ...power supply voltage.

Claims (1)

[Claims] 1. A magnetic tape on which an information signal and four types of pilot signals for tracking control are recorded is reproduced, and a tracking error signal indicating the relative positional deviation between the magnetic head and the recording track is obtained from the pilot signal. When creating a signal, the reproduced pilot signal and the reference signal are multiplied, the first and second signals having different frequency components are extracted from the multiplied signal, and the levels of these two signals are compared. A tracking error signal is obtained by extracting the subsequent signal level in a time-division manner during the period of reproducing tracks on which different pilot signals are recorded, and using a signal obtained by subtracting at least two level values extracted in this time-division manner. A method for creating a tracking error signal.