JPH0258318A - Manufacture of optoelectronic integrated circuit device - Google Patents

Abstract

PURPOSE:To improve yield when an optoelectronic integrated circuit device is manufactured of a contact type aligner by forming a protrusion having substantially the same height as that of an optical functional element on a region not formed with an element on a semiconductor chip before an exposing step. CONSTITUTION:A photodetector 11 is formed on a semiconductor wafer 10, and protrusions 12 is formed on a region not formed with a functional element around it. When contact exposure is conducted in this state, a photomask 4 is bent at its lower side by evacuating in low pressure in a chamber 3. Then, the lower face 4a of the mask 4 is pressed to the upper face 10a of the wafer 10. Since the protrusions 12 are formed on the periphery of the photodetector 11, its pressing force is dispersed to the protrusions 12, and not concentrated to the top of the element 11. Accordingly, a transfer pattern formed on the photomask is brought into close contact with the upper face of the wafer to be accurately transferred. Photoresist coating the top of the photodetector 11 does not adhere to the mask 4, and a desirable pattern can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing an optoelectronic integrated circuit device, and more particularly, to a method for manufacturing an optoelectronic integrated circuit device using contact lithography.

[Prior art]

Conventionally, when manufacturing optoelectronic integrated circuits (for example, circuit devices in which a light receiving element and a transistor are integrated), a predetermined pattern is formed on a semiconductor wafer using photolithography technology in order to increase mass productivity. Furthermore, a layer having predetermined electrical characteristics is formed by diffusion, ion implantation techniques, etc., and a wiring pattern is further formed to electrically connect the light-receiving elements, transistors, etc. formed by these techniques. In particular, in the exposure process, contact lithography is used to apply photoresist onto a semiconductor wafer and transfer it into a predetermined pattern. In this contact lithography, a contact type exposure device (contact type aligner) is used which performs transfer by bringing a mask on which a transfer pattern is formed into close contact with the upper surface of a semiconductor wafer.

The exposure principle of this contact type aligner will be explained in FIG.

As shown in the figure, a semiconductor wafer 1 is mounted and fixed on a wafer stage 2 of a contact type aligner.

Then, this wafer stage 2 is placed in a predetermined chamber 3.
located within. In this state, there are 5 deaf and 1-tz semiconductors.
A mask 4 having a predetermined pattern to be transferred onto the chamber 3 (the pattern is formed on the lower surface side in the figure) is placed over the opening of the chamber 3. When using this contact type aligner, the air inside the chamber 3 is sucked through the suction port 5 to bring the inside of the chamber 3 into a low pressure state.

In this state, the lower surface 4a of the mask 4 comes into contact with the semiconductor wafer 1. Then shine light from above,
The pattern formed on the lower surface of the mask 4 is accurately transferred onto the semiconductor wafer 1.

[Problem to be solved by the invention]

However, the light receiving element 6 generally formed in the optoelectronic integrated circuit is approximately 3 μm or more higher than other areas of the semiconductor wafer/11, and as explained earlier, the photomask 4 is If the photomask 4 is brought into contact with the wafer 1, the contact pressure between the photomask 4 and the semiconductor wafer 1 will be concentrated on the top of the light receiving element 6 formed on the semiconductor wafer.

Therefore, the photoresist applied on the top of the light receiving element may adhere to the pattern of the photomask 4, causing halation, etc., or the pattern on the photomask may be destroyed, making it difficult to form an accurate pattern. There were times when it wasn't. As a result, the manufacturing yield of optoelectronic integrated circuit devices has been low.

The present invention solves the above problems and provides a contact type aligner.
An object of the present invention is to provide a method for manufacturing an optoelectronic integrated circuit device that can be manufactured with high yield when the optoelectronic integrated circuit device is manufactured using the method.

[Means for resolving issues]

In the method for manufacturing an opto-electronic integrated circuit device of the present invention, an optical device comprising an optical functional element and an electrical functional element is used. 11S7 A convex portion having approximately the same height as the height of the optical functional element is formed on the area where the electrical functional element and the optical functional element are not formed on the semiconductor chip on which the integrated circuit is formed. It is characterized by being formed before.

[Effect]

The method for manufacturing an optoelectronic integrated circuit device of the present invention is configured as described above, and conducts contact exposure with a convex portion having approximately the same height as the optical functional element formed on the semiconductor wafer. This prevents concentration of force acting on the top of the functional element, suppresses adhesion of photoresist to the photomask and destruction of the mask pattern.

〔Example〕

Embodiments according to the present invention will be described below with reference to the drawings.

Elements with the same reference numerals have the same functions, so duplicate explanations will be omitted.

FIG. 1 is a process diagram of a method for manufacturing an optoelectronic integrated circuit device according to the present invention.

As shown in this figure, before the contact lithography step 8, a protrusion forming step 7 is provided in which a protrusion approximately the same height as the photodetector is formed near the portion of the semiconductor wafer where the photodetector is to be formed. There is.

When performing the contact exposure step 8a of the contact lithography step 8, the convex portion must already be formed on the semiconductor wafer. Note that this convex portion is connected to other electrical functional elements (for example, transistors, FETs, etc.)
It may be formed using the manufacturing process of. That is, before forming a light receiving element on a semiconductor substrate, for example, a transistor is formed.

When forming FETs and the like, it is also possible to form protrusions simply by changing the mask pattern of the mask used during photolithography in these manufacturing steps.

Next, FIG. 2 shows a state in which a semiconductor wafer provided with a convex portion as described above is subjected to contact exposure using a contact type aligner.

In this figure, a light receiving element 11 is placed on a semiconductor wafer 10.
is formed, and a convex portion 12 is formed in a region around the convex portion where no functional element or the like is formed.

When contact exposure is performed in this state, the photomask 4 is bent downward by bringing the inside of the chamber 3 into a low pressure state as shown in the figure. Due to this bending, the lower surface 4a of the photomask 4 (on which the transfer pattern 113 is formed) is pressed against the upper surface 10a of the semiconductor wafer \10. In this pressing, since there was no convex portion 12 in the past, the pressing force was concentrated on the top of the light receiving element, which was the highest. However, in the case of the present invention,
Since the convex portions 12 are formed in advance around the light receiving element 11, this pressing force is dispersed to each convex portion 12 and is not concentrated on the top of the light receiving element 11.

Further, it is preferable that the height of the convex portion 12 is formed to be approximately the same as the height of the light receiving element 11.

This is because if it is set too high, the advantage of contact exposure, which allows accurate pattern transfer by placing the transfer pattern formed on the photomask onto the upper surface of the semiconductor wafer to be transferred, cannot be realized.

Further, if the height is too low compared to the height of the top of the light receiving element, the pressing force acting on the top of the light receiving element cannot be dispersed.

In order to verify the effects of the present invention, the inventor of the present invention
The following experiment was conducted.

First, various photodetectors with a diameter of 30 to 100 μm and a height of 3 μm were formed on a semiconductor chip with a size of 1 m 1 I × 1011, and contact exposure was performed by changing the contact pressure. Almost all of the applied photoresist adhered to the photomask, and abnormalities were observed in pattern formation.

Next, a region of 100 μm x 100 μm on a semiconductor chip with a size of 1 m + g It was confirmed that the photoresist coated on the top of the light-receiving element did not adhere to the photomask when exposure was performed at a pressure of 50 mmHg and that a good pattern could be formed.

The present invention is not limited to the above embodiments, and various modifications may be made.

Specifically, although the above embodiment describes the manufacture of an optoelectronic integrated circuit device having a light receiving element, the present invention is not limited to this, and may be applied to the manufacturing of an optoelectronic integrated circuit device in which a light emitting element is used instead of a light receiving element. May be applied.

[Effects] As described above, in the method for manufacturing an optoelectronic integrated circuit device of the present invention, when manufacturing using contact lithography, concentration of contact pressure on the optical functional element is suppressed,
Optoelectronic integrated circuit devices can be manufactured with high yield.

FIG. 3 and FIG. 3 are diagrams for explaining a contact exposure method during the manufacture of a contact exposure device.

1.10...Semiconductor wafer 2...Wafer stage, 3...Chamber 4...Photomask, 7
. . . Convex formation step, 8. Contact lithography step, 11. Light receiving element, 12. Convex portion.

Patent applicant: Sumitomo Electric Industries, Ltd. Representative patent attorney Yoshiki Hase
Fumiaki Terashima

[Brief explanation of the drawing]

FIG. 1 is a process diagram of a method for manufacturing an optoelectronic integrated circuit device of the present invention, and FIG. 2 is a process diagram of an embodiment of an optoelectronic integrated circuit of the present invention. Lol, light principle diagram 3

Claims (1)

[Claims] 1. A method for manufacturing an optoelectronic integrated circuit device in which at least one exposure step is performed using contact lithography, comprising: a semiconductor in which an optoelectronic integrated circuit including an optical functional element and an electrical functional element is formed; A photoelectronic device characterized in that, before the exposure step, a convex portion having approximately the same height as the height of the optical functional element is formed on a region on the chip where the electrical functional element and the optical functional element are not formed. A method of manufacturing an integrated circuit device. 2. The method of manufacturing an optoelectronic integrated circuit device according to claim 1, wherein the convex portion is formed around the optical functional element.