JPH0257725B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a delay line, particularly a lumped constant delay line.

(b) Prior art Figure 3 shows a circuit diagram of a lumped constant delay line. In the diagram
L ₁ to L ₁₀ are inductances, C ₁ to _{C 10} are capacitances, and R is resistance matched with characteristic impedance. Because a lumped constant delay line connects a large number of capacitance elements and inductance elements,
It is technically difficult to miniaturize delay lines;
Furthermore, there was also a problem in terms of manufacturing costs.

Therefore, as an example of process simplification,
The process is described in No. 166716, but it requires six steps of printing, firing, etc. to form a multilayer capacitor, and forming electrodes on the edge of the substrate is particularly difficult from a technical and reliability perspective. From my point of view, there were many problems. Furthermore, in Japanese Patent Application Laid-open No. 57-166716, it is necessary to connect a large number of chip inductances as inductance elements, which increases the cost of the parts used and also makes it impossible to significantly reduce the number of steps.

(c) Problems to be Solved by the Invention and Means Therefor The present invention aims to eliminate the drawbacks of the above-mentioned prior art.

In the present invention, a multilayer capacitor is used, but by devising the shape and arrangement of the multilayer capacitor board and using multiple bobbins, the number of parts and processes can be reduced, and manufacturing costs can be reduced. Low precision delay lines can be manufactured.

(d) Embodiment An embodiment of the present invention will be described below with reference to the attached drawings. FIG. 4 is a top view of an insulating substrate forming a multilayer capacitor. A ground electrode 4 is formed on an insulating substrate 1 made of ceramic by printing and firing a conductive paste 1'. Further, a plurality of through holes 3 formed in a line approximately in the center of the substrate are used for connecting multiple bobbin inductors, which will be described later, and a plurality of grooves 2 provided at the end of the insulating substrate 1 are used to connect terminals 10, which will be described later. It is for. Next, as shown in FIG. 5, a dielectric layer 5 is formed on the entire upper surface of FIG. 4, leaving a part of the ground electrode 4. Furthermore, the fifth
A conductor layer 6 is formed on the upper surface of the figure, and a plurality of capacitors C ₁ , C ₂ , C ₃ , C ₄ , C ₅ ,
C ₆ , C ₇ , C ₈ , C ₉ , and C ₁₀ are formed. Reference numeral 7 denotes a resistor layer, which is formed after the capacitor is formed using the conductor layer 6 described above. However, the resistance value of this resistor layer is configured to be equal to the characteristic impedance of the delay line.

FIG. 7 is a bottom view of the insulating substrate 1, and FIG. 8 is a sectional view taken along the line X-X' in FIG. The lower surface forms a recess 8, which accommodates a multiple bobbin inductor to be described later. Next, the configuration of the multiple bobbin inductor will be explained. In FIG. 9, a plurality of independent terminals 10 are inserted into a bobbin 9 made of synthetic resin or the like. terminal 10 to Y
After cutting along the line -Y', as shown in FIG. If the winding and winding operations are continued, one wire rod 12 can be used to wind the bobbin 9 and the terminal 10 in one winding process. Can be done. Conductor wire 12 to terminal 10
If you dip the part 13 that is covered with solder into a solder dip bath,
A multiple bobbin inductor is formed in this process.
Note that the stepped portion 11 at the end of the bobbin 10 is provided to facilitate attachment of the bobbin to a conductor wire machine, and is not directly related to the present invention. Furthermore, it goes without saying that if a magnetic powder material is suitably mixed in when molding the synthetic resin used for the bobbin 9, a bobbin inductor with a large inductance can be obtained.

FIG. 11 shows the configuration of the external lead terminal of the delay line. Reference numeral 14 is an external lead terminal, and 15 is a lead frame. The cut-out portion 17 is formed on the base 1.
The bent part 1 is loosely fitted into the groove 2 provided at the end of the
Reference numeral 6 is formed so as to be in contact with the conductor layer 6 formed on the base 1 and the ground electrode 4 .

A process of manufacturing a delay line by assembling the delay line members configured as described above will be described.

In FIG. 12, solder paste 18 is applied near the groove 2 of the insulating substrate, and solder paste 19 is applied around the plurality of through holes 3 provided in the insulating substrate 1. Next, the multiple bobbin inductor is positioned in the recess 8 provided on the lower surface of the insulating substrate 1 and mounted so that each terminal 10 is inserted into the through hole 3. The cut and raised portion 17 is inserted into the groove 2 of the board so that the bent portion 16 of the external lead terminal 14 contacts the solder paste 18. FIG. 1 is a cross-sectional view of the assembled delay line as described above. If the thus assembled circuit board is passed through a solder reflow oven, the solder paste will be completely soldered and the delay circuit shown in FIG. 3 will be completed. Delay line case 20 shown by the broken line in Figure 1
can be easily manufactured in the same way as the IC manufacturing process by molding the previously assembled delay circuit using transfer molding or the like. After that, the lead frame 15 of the external lead terminal 14 is cut, and the external lead terminal 14 is cut.
If you bend the U-shaped part of
The DIP type delay line is completed.

(E) Effects According to the present invention, a small delay line can be manufactured at low cost using a short process with fewer components and no special complicated work.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a delay line according to the present invention. Figure 2 is a perspective view of the DIP delay line housed inside the case. Figure 3 is a circuit diagram of a lumped constant delay line. FIG. 4 is a top view of an insulating substrate forming a multilayer capacitor. FIG. 5 is a plan view in which conductive paste is formed on the upper surface of FIG. 4. FIG. 6 is a top view in which a conductor layer is provided on top of FIG. 5 to form a plurality of capacitors. FIG. 7 is a bottom view of the insulating substrate. FIG. 8 is a sectional view taken along the line X-X' in FIG. 7. FIG. 9 is a plan view of the bobbin. FIG. 10 is a plan view of a terminal and a bobbin around which a conductor wire is wound. FIG. 11A is a plan view of the external lead wire and frame. B is a side view of A. FIG. 12 is a top view of FIG. 6 with solder paste applied. 1...Insulating substrate, 2...Groove, 3...Through hole, 5
... Dielectric layer, 6 ... Conductor layer, 8 ... Recess, 9
... bobbin, 10 ... terminal, 12 ... conductor wire,
13... Karage part, 16... Bent part, 17...
Cut-out portion, 20...case.

Claims (1)

[Claims] 1. A plurality of through holes are formed approximately along the center line of an insulating substrate, a plurality of laminated capacitors are formed between these through holes and the peripheral edge of the insulating substrate, and a plurality of multilayer inductors are formed. A delay line comprising a group of terminals inserted and fixed into a through hole of the insulating substrate from the side opposite to the side on which the multilayer capacitor is provided, and further external lead terminals are provided so as to be in contact with the top and side surfaces of the insulating substrate. . 2. The delay line according to claim 1, wherein a plurality of grooves for guiding external lead terminals and fixing them with an adhesive are provided at the end of the insulating substrate. 3 Patent for forming an inductance by winding a conductor wire around the terminals and continuously winding the conductor wire around the bobbin so that each terminal of a plurality of terminals of a bobbin formed by insert molding forms one section. A delay line according to claim 1.