JPH0256856B2 - - Google Patents
Info
- Publication number
- JPH0256856B2 JPH0256856B2 JP20089283A JP20089283A JPH0256856B2 JP H0256856 B2 JPH0256856 B2 JP H0256856B2 JP 20089283 A JP20089283 A JP 20089283A JP 20089283 A JP20089283 A JP 20089283A JP H0256856 B2 JPH0256856 B2 JP H0256856B2
- Authority
- JP
- Japan
- Prior art keywords
- mosfet
- source
- series
- gate
- switch circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 description 4
- 238000013016 damping Methods 0.000 description 2
- 238000010304 firing Methods 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
- H03K17/102—Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
Landscapes
- Electronic Switches (AREA)
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は、半導体を用いたスイツチ回路に係
り、特にMOSFETを複数個直列にして構成した
スイツチ回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a switch circuit using a semiconductor, and particularly to a switch circuit configured by connecting a plurality of MOSFETs in series.
半導体素子の高耐圧化の進展に伴い、高電圧回
路のスイツチにも従来からの真空管に代つて、半
導体素子の直列接続回路に置き換えられてきてい
る。代表的な例は、サイリスタを数百個直列接続
して構成された交換装置であり、電圧耐量は
250kV、電流は1.5kAの高電圧スイツチが実現さ
れている。しかし、サイリスタはしや断機能を有
さないため、しや断機能を要す高電圧スイツチ回
路には依然として真空管が用いられている。
As the voltage resistance of semiconductor devices increases, the conventional vacuum tubes are being replaced with series-connected circuits of semiconductor devices in high-voltage circuit switches. A typical example is a switching device consisting of several hundred thyristors connected in series, and the voltage withstand capacity is
A high voltage switch of 250kV and 1.5kA current has been realized. However, since thyristors do not have a damping function, vacuum tubes are still used in high voltage switch circuits that require a damping function.
しや断機能を有す半導体素子の一つには、
MOSFETがある。MOSFETは、電圧制御形素
子のため駆動電力が小さい、電流集中がなく破壊
に強い、キヤリアの蓄積効果がなくスイツチング
特性が優れている等の特長を持つている。しか
し、MOSFET単体では、1kV位までの耐圧のデ
バイスしか製品化されておらず、高耐圧化のため
には複数のMOSFETを直列接続する必要があ
る。 One of the semiconductor elements that has a cutting function is
There is a MOSFET. Because MOSFETs are voltage-controlled elements, their driving power is low, there is no current concentration and they are resistant to destruction, and they have no carrier accumulation effect and have excellent switching characteristics. However, with a single MOSFET, only devices with a withstand voltage of around 1kV have been commercialized, and in order to achieve a high withstand voltage, it is necessary to connect multiple MOSFETs in series.
第１図は、MOSFETをｎ個直列接続したいわ
ゆるトーテムポール形のスイツチ回路である。
MOSFET1にゲート信号が印加されない時は、１
１はしや断状態となり電流は０である。この時、
MOSFETI2〜１oも１1に追従して動作ししや断
状態となり、１2〜１oのゲートには抵抗２1〜２o
で分圧した電圧が加わり、１1〜１oのドレイン、
ソース間はほぼ２1〜２oで定まる電圧を分相す
る。次に１1のゲートに信号を印加すると、１1は
導通を開始し、同時に１2〜１oも１1に追従して
導通してスイツチ回路はオン状態となる。このよ
うに第１図のスイツチ回路では、１1のゲート信
号の印加、停止を行うことにより、オン、オフの
制御を行うことができる。しかし、第１図に示し
た回路方式では、１2〜１oをオンするためには、
１2〜１oのゲート、ソース間にオン状態を持続す
るに必要な充分な電圧を印加する必要がある。そ
れゆえ、１2，１3，…１oのドレイン電位は、１
２，１3，…１oの駆動に必要な電圧だけ余分に増
大し、オン時にスイツチ回路で持つ電圧が増加す
るいわゆるオン抵抗の増大をまねく。MOSFET
の直列個数を２個とした場合でもオン抵抗が２倍
と増大するので、多数個直列接続した場合にはオ
ン抵抗が非常に大きくなり、オン状態時の電圧降
下の増大によるスイツチ回路損失の増大や負荷回
路に印加する電圧の低下は相当なものとなる。 FIG. 1 shows a so-called totem pole switch circuit in which n MOSFETs are connected in series.
When no gate signal is applied to MOSFET 1 , 1
1 is in a cut-off state and the current is 0. At this time,
MOSFETI 2 ~ 1 o also operates following 1 1 and becomes a sluggish state, and the gates of MOSFETI 2 ~ 1 o are connected to resistors 2 1 ~ 2 o.
The voltage divided by is applied, and the drain of 1 1 to 1 o ,
A voltage determined by approximately 2 1 to 2 o is phase-divided between the sources. Next, when a signal is applied to the gate of 1 1 , 1 1 starts to conduct, and at the same time, 1 2 to 1 o follow 1 1 and become conductive, turning the switch circuit on. In this manner, the switch circuit shown in FIG. 1 can perform on/off control by applying and stopping the 11 gate signals. However, in the circuit system shown in Figure 1, in order to turn on 1 2 to 1 o ,
It is necessary to apply a sufficient voltage between the gate and source of 1 2 to 1 o to maintain the on state. Therefore, the drain potential of 1 2 , 1 3 ,...1 o is 1
2 , 1 3 , . . . 1 o is increased by the voltage necessary to drive the switch circuits, resulting in an increase in the so-called on-resistance, in which the voltage held by the switch circuit increases when it is turned on. MOSFET
Even if the number of switches connected in series is two, the on-resistance will double, so when many switches are connected in series, the on-resistance will become extremely large, and the switch circuit loss will increase due to an increase in the voltage drop during the on-state. The drop in the voltage applied to the load circuit is considerable.
本発明の目的は、小電流から大電流まで広い領
域においてオン抵抗が小さく、しかも、安定にオ
ン、オフできるMOSFETを複数個直列にして構
成したスイツチ回路を提供することにある。
An object of the present invention is to provide a switch circuit constructed by connecting a plurality of MOSFETs in series, which has a low on-resistance in a wide range from small currents to large currents, and can stably turn on and off.
オン抵抗を小さくし、しかも安定にオン、オフ
動作を行うためには、追従して動作する
MOSFETのゲート、ソース間に充分な電圧の印
加と停止を行う必要がある。本発明では直列接続
する各MOSFETにオフ時の回路エネルギーの吸
収、追従して動作するMOSFETの駆動エネルギ
ーの供給、及び追従して動作するMOSFETのゲ
ート、ソース間電荷の引き抜きの作用を合わせ持
たせたコンデンサ回路を備え、従追して動作する
MOSFETの動作を制御することにより、オン抵
抗が小さく、且つ安定にオン、オフ動作できるよ
うにしたMOSFETを用いた追従点弧形のスイツ
チ回路を得ることができた。
In order to reduce on-resistance and perform stable on/off operation, it is necessary to follow the
It is necessary to apply and stop sufficient voltage between the gate and source of the MOSFET. In the present invention, each MOSFET connected in series has the functions of absorbing circuit energy when it is off, supplying drive energy to the MOSFET that operates in accordance with it, and extracting charge between the gate and source of the MOSFET that operates in accordance with it. Equipped with a capacitor circuit that operates according to the
By controlling the operation of the MOSFET, we were able to obtain a follow-up firing type switch circuit using a MOSFET that has low on-resistance and stable on/off operation.
第２図は本発明の一実施例を示すものである。
この図に於て、直列接続された複数個の
MOSFETのうち、ゲートに与えられる制御信号
により導通が制御されるMOSFET１1のソースと
これに直列接続されたMOSFET１2のゲート、及
び順次直列接続された各MOSFET１2〜１o-1の
ソースとこれに接続された各MOSFET１2〜１o
のゲート、及び順次直列接続されたMOSFETの
うち最後に位置するMOSFET１oのソース、ドレ
イン間にコンデンサ３1〜３oと抵抗４1〜４oから
成る直列回路が接続されている。又、ゲートに与
えられる制御信号により導通が制御される
MOSFET１1に順次直列接続される各MOSFET
１2〜１oのソースゲート間にはツエナーダイオー
ド５1〜５o-1が続されている。
FIG. 2 shows an embodiment of the present invention.
In this diagram, multiple
Among the MOSFETs, the source of MOSFET 1 1 whose conduction is controlled by the control signal applied to the gate, the gate of MOSFET 1 2 connected in series to this, and the source of each MOSFET 1 2 to 1 o-1 connected in series in sequence and this Each MOSFET1 2 to 1 o connected to
A series circuit consisting of capacitors 3 1 to 3 o and resistors 4 1 to 4 o is connected between the gate of MOSFET 1 o and the source and drain of the last MOSFET 1 o of the MOSFETs connected in series. Also, conduction is controlled by a control signal given to the gate.
Each MOSFET connected in series to MOSFET1 1
Zener diodes 5 1 to 5 o-1 are connected between the source gates of 1 2 to 1 o .
本実施例の動作は以下のとおりである。
MOSFET１1に正のゲート信号が印加されていな
い時には、MOSFET１1はしや断状態であり、追
従して動作するMOSFET１2〜１oもしや断状態
となりスイツチ回路はオフ状態となり、電源回路
で定まる電圧VSWが印加される。コンデンサ３1
〜３oの容量がほぼ等しい場合には、コンデンサ
３1〜３oで電圧VSWをほぼ均等に分担し、
MOSFET１1〜１oにはコンデンサ３1〜３oとほ
ぼ等しい電圧が印加される。次に、MOSFET１1
に正のゲート信号を印加すると、MOSFET１1は
導通を開始する。MOSFET１1が導通を開始する
と、コンデンサ３1の電荷は抵抗４1、MOSFET
１2のゲート、ソース及びMOSFET１1のドレイ
ン、ソースを介して放電を開始し、MOSFET１2
のゲート、ソース間にMOSFET１2が動作するに
充分な電圧が印加されMOSFET１2は導通を開始
する。なお、ツエナーダイオード５1は１2のゲー
ト、ソース間電圧は所定値以下に抑えるためのも
のである。MOSFET１3〜１oは、MOSFET１2
と同様にして順次導通を開始して、スイツチ回路
はオン状態となる。MOSFET１1は、オン期間中
正のゲート信号が印加され続けるので充分小さな
オン抵抗でオン状態を持続する。MOSFET１2
は、放電回路がないのでツエナーダイオード５1
で定まる電圧がゲート、ソース間に印加され続け
るのでMOSFET１1と同様に充分小さなオン抵抗
でオン状態を持続する。MOSFET１3〜１oは、
MOSFET１2と同様にオン状態を持続する。それ
ゆえ、多数個直列接続しても第１図に示した回路
方式のように、ドレイン、ソース間電圧によりゲ
ートに電圧を印加する方式ではないので、オン抵
抗を充分に小さくできる。 The operation of this embodiment is as follows.
When a positive gate signal is not applied to MOSFET 1 1 , MOSFET 1 1 is in an off state, and MOSFETs 1 2 to 1 which follow and operate are in an off state and the switch circuit is in an OFF state, and the voltage determined by the power supply circuit is V SW is applied. capacitor 3 1
If the capacitances of capacitors 3 1 to 3 o are almost equal, the voltage V SW will be shared almost equally between capacitors 3 1 to 3 o ,
A voltage approximately equal to that of the capacitors 3 1 to 3 o is applied to the MOSFETs 1 1 to 1 o . Next, MOSFET1 1
When a positive gate signal is applied to MOSFET 1 1 , MOSFET 1 1 starts conducting. When MOSFET1 1 starts conducting, the charge on capacitor 3 1 is transferred to resistor 4 1 , MOSFET
Discharge begins through the gate and source of MOSFET 1 2 and the drain and source of MOSFET 1 1 , and MOSFET 1 2
A voltage sufficient to operate MOSFET 1 2 is applied between the gate and source of MOSFET 1 2 and MOSFET 1 2 starts conducting. Note that the Zener diode 5 1 is provided to suppress the voltage between the gate and source of 1 2 to a predetermined value or less. MOSFET1 3 ~ 1 o is MOSFET1 2
In the same manner as above, conduction starts sequentially and the switch circuit turns on. Since the positive gate signal continues to be applied to the MOSFET 11 during the on period, the on state is maintained with a sufficiently small on resistance. MOSFET1 2
Since there is no discharge circuit, it is a Zener diode 5 1
Since the voltage determined by continues to be applied between the gate and the source, the on state is maintained with a sufficiently small on resistance like MOSFET 11 . MOSFET1 3 ~ 1 o is
Like MOSFET12 , it remains on. Therefore, even if a large number of transistors are connected in series, the on-resistance can be sufficiently reduced because the circuit system shown in FIG. 1 does not apply a voltage to the gate using the voltage between the drain and the source.
MOSFET１1のゲート信号の印加を停止する
と、MOSFET１1はしや断状態となり電流は０と
なる。このため、負荷回路電流は、MOSFET１2
のソース、ゲート、抵抗４1、コンデンサ３1を介
して流れMOSFET１2のオン時にゲート、ソース
間に与えた電荷を引き抜く。MOSFET１2のゲー
ト、ソース間電荷の引き抜きが行われると
MOSFET１2がしや断状態となり電流は０とな
る。負荷回路電流は、MOSFET１3のソース、ゲ
ート、抵抗４2、コンデンサ３2、ツエナーダイオ
ード５1、抵抗４1、コンデンサ３1を介して流れ、
MOSFET１3のゲート、ソース間電荷の引き抜き
が行われる。MOSFET１2と同様にして
MOSFET１3がしや断状態となる。順次
MOSFET１4，１5…１oがしや断状態となりスイ
ツチ回路はオフ状態になる。 When the application of the gate signal to MOSFET 1 1 is stopped, MOSFET 1 1 is suddenly cut off and the current becomes 0. Therefore, the load circuit current is MOSFET1 2
It flows through the source, gate, resistor 4 1 and capacitor 3 1 and extracts the charge applied between the gate and source when the MOSFET 1 2 is turned on. When the charge is extracted between the gate and source of MOSFET 1 and 2 ,
MOSFET 1 2 becomes cut off and the current becomes 0. The load circuit current flows through the source and gate of MOSFET 13 , resistor 42 , capacitor 32 , Zener diode 51 , resistor 41 , and capacitor 31 ,
Charge is extracted between the gate and source of MOSFET13 . In the same way as MOSFET1 2
MOSFETs 1 and 3 become disconnected. sequentially
The MOSFETs 1 4 , 1 5 . . . 1 o are soon cut off, and the switch circuit is turned off.
MOSFETはスイツチング時間が数10ns以下と
非常に短かいため、上記したオン動作、オフ動作
におけるスイツチング時間の差による分担電圧の
不平衡はほとんどない。しかも、コンデンサ３1
〜３oによりスイツチオフ時の負荷回路電流の変
化率を低減し、スイツチ回路への過大電圧の印加
を防止できる。 Since the MOSFET has a very short switching time of several tens of nanoseconds or less, there is almost no unbalance in the shared voltage due to the difference in switching time between on and off operations described above. Moreover, capacitor 3 1
~3 o can reduce the rate of change in the load circuit current when the switch is turned off, and prevent excessive voltage from being applied to the switch circuit.
第３図に他の実施例を示す。第２図の実施例と
相違する点は、電源及びMOSFET１1〜１oの各
ゲート間に設けられた分圧抵抗６1〜６o、ツエナ
ーダイオード７1，７2を用いた回路でMOSFET
１1〜１oの分圧を図るようにしたことである。
MOSFET１2のベースとMOSFET１1のソース間
及びMOSFET１oのドレインとベース間は
MOSFET１2〜１oのベース間とは異なり抵抗と
ツエナーダイオード６1，７1と６oと７2を直列に
接続したのは、スイツチ回路のオン時にコンデン
サ３1，３o-1の電荷が放電してMOSFET１2，１o
を駆動する充分な電圧が得られなくなることのな
いようにするためである。なお、ツエナーダイオ
ード７1，７2のツエナー電圧は、ツエナーダイオ
ード５1，５o-1と同程度、又は同程度以上に選ば
れる。本実施例によれば、抵抗による分圧回路を
持つため、MOSFET１1〜１oやツエナーダイオ
ード５1〜５o-1の特性が不平衡していても更に安
定に動作できるという特長を有す。 FIG. 3 shows another embodiment. The difference from the embodiment shown in FIG. 2 is that the circuit uses voltage dividing resistors 6 1 to 6 o provided between the power supply and the gates of MOSFETs 1 1 to 1 o , and Zener diodes 7 1 and 7 2 .
The aim was to achieve a partial pressure of 1 1 to 1 o .
Between the base of MOSFET 1 2 and the source of MOSFET 1 1 , and between the drain and base of MOSFET 1 o .
The reason why resistors and Zener diodes 6 1 , 7 1 and 6 o and 7 2 are connected in series, unlike between the bases of MOSFETs 1 2 to 1 o, is that when the switch circuit is turned on, the charges in capacitors 3 1 , 3 o-1 are Discharge MOSFET1 2 ,1 o
This is to prevent the inability to obtain sufficient voltage to drive the. The Zener voltages of the Zener diodes 7 1 and 7 2 are selected to be about the same or higher than those of the Zener diodes 5 1 and 5 o-1 . According to this embodiment, since it has a voltage dividing circuit using resistors, it has the advantage that it can operate more stably even if the characteristics of the MOSFETs 1 1 to 1 o and the Zener diodes 5 1 to 5 o-1 are unbalanced. .
第４図に更に他の実施例を示す。第３図の実施
例と相違する点は分圧抵抗６1〜６oをMOSFET
１1〜１oのドレイン、ソース間に接続したことで
ある。第３図の実施例と同様に、MOSFET１1〜
１oやツエナーダイオード５1〜５o-1の特性が不
平衡しても安定に動作できるという特長を有す
る。 FIG. 4 shows yet another embodiment. The difference from the embodiment shown in Fig. 3 is that the voltage dividing resistors 6 1 to 6 o are replaced with MOSFETs.
1 1 to 1 o are connected between the drain and source. Similar to the embodiment shown in FIG .
1 o and the Zener diodes 5 1 to 5 o-1 are characterized in that they can operate stably even if their characteristics are unbalanced.
第５図は更に他の実施例を示す。第３図の実施
例と相違する点は、ダイオード８1〜８oを接続し
たことである。本実施例によれば、更に負荷回路
電流と抵抗４の積で与えられるスイツチ回路オフ
時のステツプ電圧の印加を防止できる。なお、第
２図および第４図の実施例においても、第５図と
同様なダイオードを接続することも可能であり、
オフ時のステツプ電圧の印加が防止できる。 FIG. 5 shows yet another embodiment. The difference from the embodiment shown in FIG. 3 is that diodes 8 1 to 8 o are connected. According to this embodiment, it is further possible to prevent the application of a step voltage given by the product of the load circuit current and the resistor 4 when the switch circuit is turned off. Note that in the embodiments shown in FIGS. 2 and 4, it is also possible to connect diodes similar to those shown in FIG.
Application of step voltage during off-time can be prevented.
なお、ツエナーダイオード５1〜５o-1，７1，
７2は同等の機能を有すならば、ツエナーダイオ
ードでなくてもよい。 In addition, Zener diodes 5 1 to 5 o-1 , 7 1 ,
7 2 does not need to be a Zener diode as long as it has an equivalent function.
本発明によれば、小電流から大電流までの広い
領域においてオン抵抗が小さく、安定にオン、オ
フできる小信号駆動のスイツチ回路を実現でき
る。 According to the present invention, it is possible to realize a small signal driven switch circuit that has a low on-resistance and can stably turn on and off in a wide range from small currents to large currents.
第１図はMOSFETを直列接続して追従点弧す
る方式の従来からのスイツチ回路、第２図は本発
明になる追従点弧方式のスイツチ回路の一実施
例、第３図から第５図は本発明になるスイツチ回
路の他の実施例である。
１1〜１o……MOSFET、３1〜３o……コンデ
ンサ、４1〜４o……抵抗、５1〜５o-1……ツエナ
ーダイオード、６1〜６o……抵抗、７1，７2……
ツエナーダイオード、８1〜８o……ダイオード。
Figure 1 shows a conventional switch circuit that uses MOSFETs connected in series to perform follow-up firing, Figure 2 shows an example of a follow-up switch circuit according to the present invention, and Figures 3 to 5 show This is another embodiment of the switch circuit according to the present invention. 1 1 ~ 1 o ... MOSFET, 3 1 ~ 3 o ... Capacitor, 4 1 ~ 4 o ... Resistor, 5 1 ~ 5 o-1 ... Zener diode, 6 1 ~ 6 o ... Resistor, 7 1 ,7 2 ...
Zener diode, 8 1 ~ 8 o ... diode.
Claims (1)
御されるMOSFETとこのMOSFETのドレイン
側に順次直列に接続され、このMOSFETの動作
に追従して動作する１個あるいは複数個の
MOSFETからなるスイツチ回路に於て、ゲート
に与えられる制御信号により導通が制御される
MOSFETのソースとこれに直列接続された
MOSFETのゲート、及び順次直列接続された各
MOSFETのソースとこれに接続された各
MOSFETのゲート、及び順次直列接続された
MOSFETのうち最後に位置するMOSFETのソ
ース、ドレイン間にコンデンサと抵抗からなる直
列回路を接続し、かつゲートに与えられる制御信
号により導通が制御されるMOSFETに順次直列
接続される各MOSFETのソース、ゲート間にツ
エナーダイオードを接続したことを特徴とするス
イツチ回路。 ２ 特許請求の範囲第１項に於て、順次直列接続
された各MOSFETのドレインと、この
MOSFETのソースとこれに接続された
MOSFETのゲート間に接続されたコンデンサと
抵抗の直列回路のコンデンサと抵抗の接続点との
間にダイオードを接続したことを特徴とするスイ
ツチ回路。 ３ 特許請求の範囲第１項および第２項に於て、
更に各MOSFETのソース、ドレイン間に抵抗を
接続したことを特徴とするスイツチ回路。 ４ 特許請求の範囲第１項および第２項に於て、
ゲートに与えられる制御信号により導通が制御さ
れるMOSFET及びこのMOSFETのドレイン側
に順次直列接続されたMOSFETのうち最後に位
置するMOSFETのソース、ドレイン間にはツエ
ナーダイオードと抵抗との直列回路を、その他の
MOSFETのソース、ドレイン間には抵抗をそれ
ぞれ接続したことを特徴とするスイツチ回路。[Claims] 1. A MOSFET whose conduction is controlled by a control signal applied to its gate, and one or more MOSFETs that are connected in series to the drain side of this MOSFET and operate in accordance with the operation of this MOSFET.
In a switch circuit consisting of a MOSFET, conduction is controlled by a control signal applied to the gate.
connected in series with the source of the MOSFET.
MOSFET gate, and each serially connected
The source of the MOSFET and each
MOSFET gates, and sequentially connected in series
A series circuit consisting of a capacitor and a resistor is connected between the source and drain of the last MOSFET among the MOSFETs, and the source of each MOSFET is connected in series to the MOSFET whose conduction is controlled by a control signal applied to the gate. A switch circuit characterized by a Zener diode connected between gates. 2 In claim 1, the drain of each MOSFET connected in series and the
MOSFET source and connected to this
A switch circuit characterized in that a diode is connected between the connection point of a capacitor and a resistor in a series circuit of a capacitor and a resistor connected between the gates of a MOSFET. 3 In claims 1 and 2,
This switch circuit also features a resistor connected between the source and drain of each MOSFET. 4 In claims 1 and 2,
A MOSFET whose conduction is controlled by a control signal applied to the gate, and a series circuit of a Zener diode and a resistor are connected between the source and drain of the last MOSFET among the MOSFETs connected in series to the drain side of this MOSFET. Other
A switch circuit characterized by connecting a resistor between the source and drain of the MOSFET.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20089283A JPS6093820A (en) | 1983-10-28 | 1983-10-28 | Switch circuit |
| DE8484112922T DE3485409D1 (en) | 1983-10-28 | 1984-10-26 | SEMICONDUCTOR SWITCHING DEVICE. |
| US06/665,132 US4692643A (en) | 1983-10-28 | 1984-10-26 | Semiconductor switching device having plural MOSFET's, GTO's or the like connected in series |
| EP84112922A EP0140349B1 (en) | 1983-10-28 | 1984-10-26 | Semiconductor switching device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20089283A JPS6093820A (en) | 1983-10-28 | 1983-10-28 | Switch circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6093820A JPS6093820A (en) | 1985-05-25 |
| JPH0256856B2 true JPH0256856B2 (en) | 1990-12-03 |
Family
ID=16431983
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20089283A Granted JPS6093820A (en) | 1983-10-28 | 1983-10-28 | Switch circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6093820A (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01321723A (en) * | 1988-06-23 | 1989-12-27 | Mitsubishi Electric Corp | Fet series circuit |
| JP2996817B2 (en) * | 1992-11-30 | 2000-01-11 | 株式会社東芝 | Driver circuit |
| JPH07115000A (en) * | 1993-10-14 | 1995-05-02 | Agency Of Ind Science & Technol | Charged particle pulse beam generator |
| DE102006037336B3 (en) * | 2006-08-10 | 2008-02-07 | Semikron Elektronik Gmbh & Co. Kg | Level shifter for unidirectional transmission of signals from between circuit paths, has capacitive voltage divider circuit switched between reference potentials of low and high sides, and diodes connected between supply and control inputs |
| US8866253B2 (en) * | 2012-01-31 | 2014-10-21 | Infineon Technologies Dresden Gmbh | Semiconductor arrangement with active drift zone |
| JP5707357B2 (en) * | 2012-04-04 | 2015-04-30 | 株式会社日立ハイテクノロジーズ | Switch circuit, mass spectrometer, and control method of switch circuit |
| DE112016002954T5 (en) | 2015-09-18 | 2018-03-15 | Aisin Aw Co., Ltd. | Inverter device for an electrically driven vehicle |
-
1983
- 1983-10-28 JP JP20089283A patent/JPS6093820A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6093820A (en) | 1985-05-25 |
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