JPH0256115A - A/d converter - Google Patents

Abstract

PURPOSE:To improve the measuring range and the measuring accuracy by comparing a signal to be measured with an output voltage of a reference voltage generating circuit so as to discriminate the most significant bit of the device thereby using it as an offset voltage to an adder circuit. CONSTITUTION:A 2nd voltage comparison type comparator 2b compares an output of a buffer circuit 1 with an output voltage of a reference voltage generating circuit 4, outputs the result to a register circuit 7 and supplied to a timing circuit 6. The result is used as the result of discrimination of the most significant bit of the device, and the timing circuit 6 outputs a control signal to a 2nd switch circuit 8b based on the result of a 2nd voltage comparison comparator 2b. A differential amplifier 11 amplifiers a voltage being a difference between an output voltage of a sample-and hold circuit 10 and an output voltage of the buffer circuit 1 with a gain of two, outputs it to the 1st voltage comparison type comparator 2a via a 1st switch circuit 8a, the successive approximation type A/D conversion is applied, resulting that the least significant bit Db of the device is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the field of measurement that handles analog signals as signals to be measured.

[Conventional technology]

Figure 2 shows a conventional successive approximation type A/D converter; in Figure 1, S is the signal to be measured, and (1) is the signal to be measured, S.
(2) is a voltage comparison type comparator that compares the voltages of the signal to be measured and the signal of the D/A conversion circuit (5); (3) stores the signal of the voltage comparison type comparator; Successive approximation register, (4)
(5) is the reference voltage generation circuit (
A D/A conversion circuit that inputs the voltage of 4) and generates an analog voltage in accordance with the data of the successive approximation register (3);
6) is a timing circuit that controls the operation timing of the above device, and D is an A/D conversion value.

[Problem to be solved by the invention]

According to the above configuration, the measurement accuracy of the A/D converter is 1-1D/
Since the resolution of the device is determined only by the resolution of the A conversion circuit itself, a D/A conversion circuit with better resolution is required in order to improve measurement accuracy, which rarely causes an increase in price. .

The present invention has been made to solve the problem M, and an object of the present invention is to provide an A/D converter that can improve measurement accuracy without changing the D/A converter circuit.

[Means to solve the problem]

The A/D conversion device according to the present invention compares the output voltage of the reference voltage generation circuit with the input signal Sa from the outside using the second comparator, and determines the most significant bit as the A/D conversion circuit based on the result. It controls whether or not to supply the offset voltage to the adder circuit. This makes it possible to double the voltage measurement range compared to the conventional circuit, and furthermore, after the output voltage of the adder circuit is held in the sample and hold circuit, the input signal Sa is input to the differential amplifier and
By amplifying only the difference between the output voltages of the adder circuit and A/D converting it again, the lowest bit of the A/D converter is determined.

For this reason, one device can measure twice as much as conventional measurement accuracy8.
It is possible to have a measurement range twice as large as that of

[For production]

The A/D conversion device according to the present invention uses the second voltage comparison comparator to determine the most significant bit of the A/D conversion device based on the comparison result between the output voltage of the reference voltage generation circuit and the external input signal Sa. Yes, input the result to the timing circuit. As a result, it is determined that the output voltage does not exceed the output voltage of the reference voltage generation circuit.

The second switch circuit is brought into a fully insulated state, and the second switch circuit is controlled so as not to supply the output voltage of the reference voltage generation circuit as an offset voltage to the adder circuit, and conventional A/D conversion is performed. Additionally, if it is determined that the comparison result exceeds the output voltage of the reference voltage generation circuit,
The timing circuit makes the second switch circuit conductive and supplies the output voltage of the reference voltage generation circuit as an offset voltage and voltage to the addition circuit. therefore,
The output of the adding circuit obtained by adding the output voltage of the D/A converting circuit plus the output voltage of the reference voltage generating circuit is supplied to the second voltage comparison comparator to perform A/D conversion. As a result, the measurement range is twice as large as that of conventional A/D converters, and the output voltage of the D/A converter is held in the sample and hold circuit under the control of the timing circuit. Output to amplifier. The differential amplifier amplifies only the difference between the input signal from the buffer and the output voltage of the sample and hold circuit and outputs it to the second voltage comparison comparator via the first switch circuit.

The second group, the pressure comparison comparator, performs A/D conversion again and the least significant bit f! :Obtainable.

Therefore, this device can be replaced with a conventional A/DK conversion device by doubling the input voltage range and doubling the measurement accuracy.

〔Example〕

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

In the figure: (1) to (6) are exactly the same as the conventional circuit described above.

In Figure 1 above, the second voltage comparison type comparator (
2b) compares the output voltage of the buffer circuit +11 with the output voltage of the reference voltage generation circuit (4) and outputs the result to the register circuit (7) and inputs it to the timing circuit (6). This result is the determination result of the most significant bit of this device.The timing circuit (6) uses the second switch circuit (8b) based on the result of the second voltage comparison type comparator (2b).
Outputs control signals to. For example, when the second voltage comparison type comparator (2b) determines that the output voltage of the reference voltage generation circuit (4) is higher than the output of the buffer circuit (1).

The timing circuit (6) controls the second switch circuit (8b) to be in an insulated state.

Output voltage addition circuit (9) of the reference voltage generation circuit (4)
).

As a result, the output voltage of the adder circuit (9) is as follows.

The voltage is the sum of the output voltage of the reference voltage generation circuit (4) and the output voltage of the D/A conversion circuit (5). Therefore, the output of the buffer circuit (1) passes through the first switch circuit (&1) and is compared with the output voltage of the adder circuit (9) by the first voltage comparison type comparator (2a). Successive approximation type A/D conversion is performed by υ, and the result can be obtained in the successive approximation register (3). The ratio of the above successive approximation register (3) is 4! ! 2 is the above register circuit (
7) The above-mentioned second voltage comparison type comparator (2b)
The results are stored and output as A/D conversion data. Further, the output voltage of the adder circuit (9) is held in the sample and hold circuit αe under the control of the timing circuit (6). The timing circuit (6) cancels the result of the successive approximation register (3) and returns it to the initial state, and controls the first switch circuit (8a) to change the switch selection state to the differential amplifier συ. do.

In the differential amplifier I, the sample and hold circuit (11
The voltage difference between the output voltage of
8a) Via the above first voltage comparison type comparator (2a)
As a result, the lowest pitch [)b of this device can be obtained. By performing the above operations, it is possible to obtain a successive approximation type A/D K conversion device with twice the measurement range and twice the measurement accuracy. Also,
As a result of the comparison of the second voltage comparison type comparator (2b), if it is determined that the output voltage of the reference voltage generation circuit (4) is larger than the output of the buffer circuit (11), the timing circuit (6) Second switch circuit (8b)
is controlled to be in a conducting state, and the reference voltage generation circuit (
The output voltage of step 4) is supplied to the adder circuit (9).

As a result, the output voltage of the adder circuit (9) becomes the sum of the output voltage of the reference voltage generating circuit (4) and the output voltage of the D/A converter circuit (5). Further, the output of the buffer circuit (1) is passed through a first switch circuit (8a) to a first voltage comparison type comparator (2).
In a), successive approximation type A/D conversion is performed by comparing the output voltage of the adder circuit (9) with the input voltage, and the result can be obtained in the successive approximation register (3). The result of the successive approximation register (3) is output to the register circuit (7) together with the result of the second voltage ratio soft comparator (2b) as A/D conversion data Da. Furthermore, the output voltage of the adder circuit (9) is held in the sample and hold circuit a0 under the control of the timing circuit (6). The timing circuit (6) cancels the result of the successive approximation register (3) and returns it to the initial state, and controls the first switch circuit (8a) to change the switch selection state to the differential amplifier σB. change. In the differential amplification 'atlυ, the acid ratio of the difference between the output voltage of the sample and hold circuit αO and the output voltage of the buffer circuit (1) is amplified with a gain of 2, and
) is outputted to the first voltage comparison type comparator (2a) and subjected to successive approximation A/D conversion, thereby obtaining the least significant bit Db of the present device. By performing the above operation, the second voltage comparison type comparator (2b)
As a result of the comparison, it is determined that the output voltage of the reference voltage generation circuit (4) is higher than the output of the buffer circuit (1). A conversion device t' can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, the most significant bit of the device is determined by comparing the output voltage of the signal to be measured and the reference voltage generation circuit, and is used as an offset voltage to the adder circuit, and further, to the output voltage of the sample and hold circuit and the buffer. By amplifying only the difference in the output voltage of the circuit using a differential amplifier and re-A/D converting it, the least significant bit of this device is determined, and the measurement range is twice as large as that of conventional A/D conversion circuits. Twice as many measurement stacks can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a configuration diagram of a device showing an example of Issou/71II of this invention, and Fig. 2 is a conventional device! In the diagram shown in the block diagram, (1) is a buffer circuit, (2a) is a first voltage comparison type comparator, (2b) is a second voltage comparison type comparator, (3) is a successive approximation register, 4) is the reference voltage generation circuit 1 (5) is the D/A conversion circuit, (6) is the timing circuit, (7) is the register circuit, (8a)
is a first switch circuit, (sb) is a second switch circuit, (9) is an adder circuit, n1ll is a sample and hold circuit, and αυ is a differential amplifier. Note that the same reference numerals in Figure 1 are the same, and 'fc' indicates corresponding parts.

Claims (1)

[Claims] A buffer that converts the impedance of a measured signal given from the outside, a first voltage comparison type comparator that compares the output voltage of the buffer and the D/A conversion circuit output voltage, and a comparison result of the first voltage comparison type comparator. a successive approximation register whose operating speed is controlled by a timing circuit; a D/A conversion circuit that converts the output of the successive approximation register into an analog voltage;
An A/D conversion device comprising a reference voltage generation circuit that supplies a reference voltage to an A conversion circuit, a differential amplifier that branches the output of the buffer and inputs the output, a first switch circuit, and a second switch circuit. A voltage comparison type comparator, a second switch circuit controlled by the timing circuit, the output voltage of the D/A conversion circuit, and the output of the reference voltage generation circuit supplied via the second switch circuit are added together. A/
D conversion device.