JPH0255739U - - Google Patents
Info
- Publication number
- JPH0255739U JPH0255739U JP13571488U JP13571488U JPH0255739U JP H0255739 U JPH0255739 U JP H0255739U JP 13571488 U JP13571488 U JP 13571488U JP 13571488 U JP13571488 U JP 13571488U JP H0255739 U JPH0255739 U JP H0255739U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- channel type
- buffer circuit
- input buffer
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13571488U JPH0255739U (zh) | 1988-10-17 | 1988-10-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13571488U JPH0255739U (zh) | 1988-10-17 | 1988-10-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0255739U true JPH0255739U (zh) | 1990-04-23 |
Family
ID=31395590
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13571488U Pending JPH0255739U (zh) | 1988-10-17 | 1988-10-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0255739U (zh) |
-
1988
- 1988-10-17 JP JP13571488U patent/JPH0255739U/ja active Pending