JPH025489A - Semiconductor light receiving device - Google Patents

Semiconductor light receiving device

Info

Publication number
JPH025489A
JPH025489A JP63155323A JP15532388A JPH025489A JP H025489 A JPH025489 A JP H025489A JP 63155323 A JP63155323 A JP 63155323A JP 15532388 A JP15532388 A JP 15532388A JP H025489 A JPH025489 A JP H025489A
Authority
JP
Japan
Prior art keywords
layer
substrate
opening
insulating film
film mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63155323A
Other languages
Japanese (ja)
Inventor
Kazuo Nakajima
一雄 中嶋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP63155323A priority Critical patent/JPH025489A/en
Publication of JPH025489A publication Critical patent/JPH025489A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To suppress the occurrence of defect such as dislocation by providing a multiplier layer, which is a Si substrate, an insulating film mask having a circular opening formed on the substrate, and a light absorbing layer, formed of epitaxially grown compound semiconductor having a lattice constant larger than that of the Si, on the substrate within the opening. CONSTITUTION:An insulating film mask 2 having a circular opening 21 is formed on an Si substrate 1, and a light absorbing layer 3, which is a compound semiconductor, is epitaxially grown only on the substrate 1 portion within the opening 21. Thus, when the area of the opening 21 is decreased and the insulating film mask 2 including many openings is used, the outer peripheries of the epitaxial growth layer are dispersed and moreover the sum total of the lengths of the outer peripheries is increased so that release of interfacial stress is facilitated and occurrence of dislocation is decreased. In addition, the curvature of the epitaxial growth layer is also decreased: this is advantageous to subsequent processes.

Description

【発明の詳細な説明】 〔概要〕 半導体受光装置に係り、特に1μm波長帯の半導体受光
装置に関し。
[Detailed Description of the Invention] [Summary] The present invention relates to a semiconductor light receiving device, and particularly to a semiconductor light receiving device in the 1 μm wavelength band.

転位等の欠陥の発生を抑制した高増倍、低雑音の半導体
受光装置を目的とし。
The aim is to create a high-multiplying, low-noise semiconductor photodetector that suppresses the occurrence of defects such as dislocations.

Si基板の増倍層1と、該基板上に形成された円形の開
孔部21を有する絶縁膜マスク2と、該開孔部の該基板
上にSiの格子定数より大きい格子定数を持つ化合物半
導体をエピタキシャル成長した光吸収層3とを含む半導
体受光装置により構成する。
A multiplication layer 1 of a Si substrate, an insulating film mask 2 having a circular opening 21 formed on the substrate, and a compound having a lattice constant larger than the lattice constant of Si on the substrate in the opening. The semiconductor light receiving device includes a light absorbing layer 3 formed by epitaxially growing a semiconductor.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体受光装置に係り、特に1μm波長帯の半
導体受光装置に関する。
The present invention relates to a semiconductor light receiving device, and particularly to a semiconductor light receiving device in a 1 μm wavelength band.

光通信の長距離化、高速化に伴い、1μm波長帯で使用
できる高僧倍、低雑音の半導体受光装置が要求されてい
る。
BACKGROUND OF THE INVENTION As optical communications become longer distances and faster, there is a demand for semiconductor photodetectors that can be used in the 1 μm wavelength band and have low noise.

このため、1μm波長帯の光を吸収する光吸収層を持ち
、且つイオン化率比の大きな増倍層を持つ半導体受光装
置を開発する必要がある。
Therefore, it is necessary to develop a semiconductor light-receiving device that has a light absorption layer that absorbs light in the 1 μm wavelength band and a multiplication layer that has a large ionization rate ratio.

〔従来の技術〕[Conventional technology]

従来、1μm波長帯の半導体受光装置として。 Conventionally, as a semiconductor photodetector in the 1 μm wavelength band.

InPを増倍層とし、In、−XGaXAs (Oりx
 < 1 )を光吸収層とする半導体受光装置が知られ
ている。
InP is used as a multiplication layer, and In, -XGaXAs (Ox
A semiconductor light-receiving device having a light absorption layer of <1) is known.

ところが、 InPはそのイオン化率比が小さいため、
低雑音化するのに限界がる。
However, since InP has a small ionization rate ratio,
There is a limit to how low the noise can be reduced.

そこで、低雑音化を進める上でSiを増倍層とし。Therefore, in order to reduce noise, Si is used as a multiplication layer.

In、Ga、 As (0<x り1 )を光吸収層と
する構造が考えられ、 Si基板上にIn、、GaXA
s (O<X <1)を成長することが試みられたが、
 Si基板(増倍層)の上にIn、XGaXAsの光吸
収層をエピタキシャル成長する時、 SiとIn、、x
GaXAsの格子定数の差が大きいため、該光吸収層の
厚さが増すにつれて内部応力が蓄積して転位の発生が著
しくなり、かかる構造の半導体受光装置の使用を困難に
していた。
A structure with In, Ga, As (0<x Ri1) as a light absorption layer is considered, and In, GaXA on a Si substrate
Although attempts were made to grow s (O<X<1),
When epitaxially growing a light absorption layer of In, XGaXAs on a Si substrate (multiplier layer), Si and In, , x
Because of the large difference in lattice constant of GaXAs, as the thickness of the light absorption layer increases, internal stress accumulates and dislocations occur significantly, making it difficult to use a semiconductor light receiving device with such a structure.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明はSiを増倍層とし、 In、−xGaXAs(
OくXく1)を光吸収層とする構成で、しかも転位等の
欠陥の発生を抑制した半導体受光装置を提供することを
目的とする。
In the present invention, Si is used as a multiplication layer, and In, -xGaXAs (
It is an object of the present invention to provide a semiconductor light-receiving device which has a structure in which a light absorbing layer is made of OxXx1) and which suppresses the occurrence of defects such as dislocations.

〔課題を解決するための手段〕 第1図(a)乃至(c)に本発明の半導体受光装置の断
面図を示す。第1図(a)乃至(c)において、1はS
i基板(増倍Ji)、2は絶縁膜マスク、21は開孔部
、3は光吸収層、4はグレーディッド層、5は歪超格子
、6はウィンドー層、7及び8は電極を表す。
[Means for Solving the Problems] FIGS. 1(a) to 1(c) show cross-sectional views of a semiconductor light receiving device of the present invention. In Figures 1(a) to (c), 1 is S
i substrate (multiplier Ji), 2 is an insulating film mask, 21 is an opening, 3 is a light absorption layer, 4 is a graded layer, 5 is a strained superlattice, 6 is a window layer, 7 and 8 are electrodes .

第2図(a)及び(b)は、それぞれ、絶縁膜マスクの
上面図及びA−A断面図を示し、2は絶縁膜マスク、2
1は開孔部を表す。
FIGS. 2(a) and 2(b) show a top view and a cross-sectional view of the insulating film mask, respectively, and 2 is an insulating film mask;
1 represents an opening.

上記課題は、 Si基板の増倍層1と、該基板上に形成
された円形の開孔部21を有する絶縁膜マスク2と、該
開孔部の該基板上にStの格子定数より大きい格子定数
を持つ化合物半導体をエピタキシャル成長した光吸収層
3とを含む半導体受光装置により解決される。
The above problem consists of a multiplication layer 1 made of a Si substrate, an insulating film mask 2 having a circular opening 21 formed on the substrate, and a lattice with a lattice constant larger than that of St on the substrate in the opening. This problem is solved by a semiconductor light receiving device including a light absorbing layer 3 formed by epitaxially growing a compound semiconductor having a constant constant.

なお2本発明の半導体受光装置において、 Si基板の
増倍層1と化合物半導体の光吸収層3の間にSiの格子
定数以上、該化合物半導体の格子定数以下の格子定数を
持つ化合物半導体のグレーディッド層4または化合物半
導体の歪超格子5を介在させることもできる。
2. In the semiconductor light receiving device of the present invention, between the multiplication layer 1 of the Si substrate and the light absorption layer 3 of the compound semiconductor, a gray compound semiconductor having a lattice constant greater than or equal to the lattice constant of Si and less than or equal to the lattice constant of the compound semiconductor is provided. A dead layer 4 or a strained superlattice 5 of a compound semiconductor may also be interposed.

〔作用〕[Effect]

本発明では、 Si基板1上に円形の開孔部21を有す
る絶縁膜マスクを形成し、該開孔部の該基板上にのみ光
吸収層3の化合物半導体をエピタキシャル成長する。
In the present invention, an insulating film mask having a circular opening 21 is formed on the Si substrate 1, and the compound semiconductor of the light absorption layer 3 is epitaxially grown only on the substrate in the opening.

通常、該光吸収層の化合物半導体の格子定数がStのそ
れより大きく、該基板の近傍ではエピタキシャル成長し
た該光吸収層には圧縮性の内部応力が働いているので、
該基板が大面積になると該応力のために該エピタキシャ
ル成長層が大きな曲率を持つようになる。その上、界面
応力も該エピタキシャル成長層の外周に達するまで解放
されず。
Usually, the lattice constant of the compound semiconductor of the light absorption layer is larger than that of St, and compressive internal stress acts on the epitaxially grown light absorption layer near the substrate.
When the substrate has a large area, the stress causes the epitaxially grown layer to have a large curvature. Moreover, the interfacial stress is not released until reaching the outer periphery of the epitaxially grown layer.

転位の発生が増加する。The occurrence of dislocations increases.

しかし、該開孔部の面積を小さくシ、かかる開孔部を多
く含む第2図に示すような絶縁膜マスク2を用いる時は
、該エピタキシャル成長層の外周が分散し、しかも該外
周の長さの総計が増加するので、界面応力が解放され易
くなり転位の発生が減少する。更に、エピタキシャル成
長層の曲率も小さくなり、その後のプロセスに有利とな
る。
However, when using an insulating film mask 2 as shown in FIG. 2, which has a small area of the opening and has many such openings, the outer periphery of the epitaxial growth layer is dispersed, and the length of the outer periphery is Since the total amount increases, interfacial stress becomes easier to release and the occurrence of dislocations decreases. Furthermore, the curvature of the epitaxially grown layer is also reduced, which is advantageous for subsequent processes.

更に、該マスクの該開孔部に若干テーパを持たせて上部
を若干広く形成しておくこともエピタキシャル成長層の
残留応力の絶対値をさらに小さくする方向に作用する。
Furthermore, providing the opening of the mask with a slight taper and forming the upper part slightly wider also works to further reduce the absolute value of the residual stress in the epitaxially grown layer.

また、該マスクの該開孔部を円形に形成しておくことに
より内部応力の成長面内の成分は等方的になり1局部的
な内部応力の集中を避けることができる。
In addition, by forming the opening of the mask in a circular shape, the component of internal stress within the growth plane becomes isotropic, and local concentration of internal stress can be avoided.

Si基板(絶縁層)1と光吸収層3の間に両者の中間の
格子定数を持つグレーディッド層4を介在させる場合(
第1図(b))、或いは歪超格子5を介在させる場合(
第1図(C))は更に内部応力の緩和が促進され、転位
等の欠陥の防止に更に大きな効果がある。
When interposing a graded layer 4 having a lattice constant between the Si substrate (insulating layer) 1 and the light absorption layer 3 (
(Fig. 1(b)), or when a strained superlattice 5 is interposed (
In FIG. 1(C)), relaxation of internal stress is further promoted, and there is an even greater effect on preventing defects such as dislocations.

〔実施例〕〔Example〕

本発明の実施例として、第1図(a)に示した構造の半
導体受光装置の製造工程を第3図(a)乃至(e)に示
す。それらの図を参照しながら。
As an embodiment of the present invention, the manufacturing process of a semiconductor light receiving device having the structure shown in FIG. 1(a) is shown in FIGS. 3(a) to 3(e). While referring to those diagrams.

製造工程について説明する。The manufacturing process will be explained.

第3図(a)参照 厚さ300μmのSi基板1の上に厚さ5000人のS
i02或いはSi3 N 4の絶縁膜マスク2を化学気
相成長法(CVD法)により形成する。
FIG. 3(a) A layer of 5000 μm thick S is placed on a Si substrate 1 with a reference thickness of 300 μm.
An insulating film mask 2 of iO2 or Si3N4 is formed by chemical vapor deposition (CVD).

第3図(b)参照 全面に厚さ3000人のレジストを付着し、該レジスト
に直径80μmの開孔を形成する。この時、量産性を考
慮して、第2図に示すように縦横に複数行、複数列の開
孔部を持つ絶縁膜マスクを形成し。
Referring to FIG. 3(b), a resist with a thickness of 3,000 layers is applied to the entire surface, and an opening with a diameter of 80 μm is formed in the resist. At this time, in consideration of mass production, an insulating film mask having a plurality of rows and columns of openings vertically and horizontally is formed as shown in FIG.

複数の半導体受光装置を同時に完成した後、さいの目状
に切断して最後に個別の装置とするようにする。
After a plurality of semiconductor light receiving devices are completed at the same time, they are cut into dice and finally made into individual devices.

第3図(C)参照 レジストの該開孔部を通して絶縁膜マスク2をエツチン
グして開孔部21を形成する。ぶつ酸系のエッチャント
を用い、エツチング条件を選ぶことにより若干テーパを
持つ上広の開孔部を形成する。
Referring to FIG. 3(C), the insulating film mask 2 is etched through the opening of the resist to form the opening 21. Then, as shown in FIG. By using an acid-based etchant and selecting etching conditions, a slightly tapered and wide opening is formed.

第3図(d)参照 トリエチルガリウム (TEG :Ga  (Cz Hs )  3)  。See Figure 3(d) triethyl gallium (TEG: Ga (Cz Hs) 3).

トリメチルインジウム (TM  I  :  In  (C)l:l  ) 
 3  )  。
Trimethylindium (TMI: In(C)l:l)
3).

アルシン(へsHコ) をソースとして、有機金属気相エピタキシー(MOVP
E)により650℃、1時間の成長を行い、厚さ3pm
のIn、GaXAs (X =0.47)の光吸収N3
を形成する。
Metal-organic vapor phase epitaxy (MOVP) using arsine (hesHco) as a source
E) was grown at 650°C for 1 hour to a thickness of 3 pm.
Optical absorption N3 of In, GaXAs (X = 0.47)
form.

第3図(e)参照 トリメチルインジウム (TM  I  :  In  (C)+3  )  
3  )  。
See Figure 3(e) Trimethylindium (TMI: In(C)+3)
3).

フォスフイン(PH3) をソースとして、同じく有機金属気相エピタキシーによ
り、厚さ2μmのInPのウィンドーN6を形成する。
Using phosphine (PH3) as a source, an InP window N6 having a thickness of 2 μm is formed by metal organic vapor phase epitaxy.

該ウィンドー層の上に電極7.及び該基板の下に電極8
を形成する。
An electrode 7 on top of the window layer. and an electrode 8 under the substrate.
form.

Siと該光吸収層のIn、Ga、 As (x =0.
47)の格子定数は次の如くである。
Si and the light absorption layer of In, Ga, As (x = 0.
The lattice constant of 47) is as follows.

St         5.43人 Inl4GaxAs (x =0.47)  5.87
人第2グレ一デイフド層 In、、Ga、 As (x<z<1)    2 μ
mかかる格子定数の差があっても9本実施例の構造にお
いては転位等の欠陥の発生が抑制される。
St 5.43 people Inl4GaxAs (x = 0.47) 5.87
Second grade diffused layer In, Ga, As (x<z<1) 2 μ
Even if there is such a difference in lattice constants, the structure of this embodiment suppresses the occurrence of defects such as dislocations.

他の実施例として、第1図(b)に示す構造の製造工程
について説明する。
As another example, the manufacturing process of the structure shown in FIG. 1(b) will be described.

製造工程は前述の実施例の製造工程の途中に次の工程が
付は加えられる。
In the manufacturing process, the following process is added in the middle of the manufacturing process of the above-described embodiment.

即ち、 Si基板(増倍N)1の上にIn、−xGa、
 As(x =0.47)の光吸収層3を成長する前に
グレーディッド層4として第1グレーデイフド層41及
び第2グレーディッド層42を連続して有機金属気相エ
ピタキシーにより成長する。この時、各種のソースガス
の供給量をコントロールして、エピタキシャル成長層の
組成が連続的に移行するようにする。各層の組成と厚さ
は次の如くである。
That is, In, -xGa,
Before growing the light absorption layer 3 of As (x = 0.47), a first graded layer 41 and a second graded layer 42 are successively grown as the graded layer 4 by metal organic vapor phase epitaxy. At this time, the supply amounts of various source gases are controlled so that the composition of the epitaxially grown layer changes continuously. The composition and thickness of each layer are as follows.

第1グレーディッド層 GaAs+−、Py  (O<y<1)    2pm
該第1グレーディッド層の下面(y=1)はGaPで、
その格子定数(5,45人)はStの格子定数(5,4
3人)に極めて近く、そこから上方に向かって連続的に
格子定数は大きくなる。
First graded layer GaAs+-, Py (O<y<1) 2pm
The lower surface (y=1) of the first graded layer is GaP,
Its lattice constant (5,45) is the lattice constant of St (5,4
3), and the lattice constant increases continuously upwards from there.

該第2グレーデイフド層の下面(z=1)の組成はGa
Asで、これは該第1グレーディッド層の上面(y=o
)の組成と同じく、そこから上方に向かって光吸収層3
の組成In、−xGaXAs (x =0.47)へと
連続的に移行する。そして、格子定数もIn、−xGa
、 As (x =0.47)の格子定数(5,87人
)へと連続的に移行する。
The composition of the lower surface (z=1) of the second grade-defied layer is Ga.
As, this is the top surface of the first graded layer (y=o
), the light absorption layer 3 is formed upward from there.
The composition In, -xGaXAs (x = 0.47) transitions continuously. And the lattice constant is also In, -xGa
, with a lattice constant of As (x = 0.47) (5,87 people).

この場合は基板1から光吸収N3へと格子定数はほぼ連
続的に移行するので該光吸収層における内部応力の緩和
は無理なく進み、転位等の欠陥の発生は抑制される。
In this case, since the lattice constant shifts almost continuously from the substrate 1 to the light absorbing layer N3, the internal stress in the light absorbing layer is naturally relaxed, and the generation of defects such as dislocations is suppressed.

更に他の実施例として、第1図(C)に示す構造の製造
工程について説明する。
As yet another example, the manufacturing process of the structure shown in FIG. 1(C) will be described.

前述のグレーディッド層に代えて厚さ100μmの超格
子層51と厚さ100μmの超格子層52を30周期繰
り返して積層することにより歪超格子5を形成する。
A strained superlattice 5 is formed by stacking a 100 μm thick superlattice layer 51 and a 100 μm thick superlattice layer 52 30 times in place of the graded layer described above.

51、 In、−、GaVAs、−、MP、 (v =
0.46. w= 0)基板1と、光吸収N3の格子定
数の差による内部歪は該超格子に吸収されて、該光吸収
層には転位等の発生が極めて少なくなる。
51, In,-,GaVAs,-,MP, (v =
0.46. w=0) Internal strain due to the difference in lattice constant between the substrate 1 and the light absorbing layer N3 is absorbed by the superlattice, and the occurrence of dislocations and the like in the light absorbing layer is extremely reduced.

かくして、高僧倍、低雑音の1μm帯半導体受光装置が
実現できる。
In this way, a 1 μm band semiconductor photodetector with extremely low noise can be realized.

〔発明の効果〕〔Effect of the invention〕

以上説明した様に2本発明によれば、 Si基板を増倍
層とし、その上に転位等の欠陥の極めて少ない光吸収層
を持つ半導体受光装置が実現でき、高僧倍、低雑音の1
μm波長帯の半導体受光装置を提供することができる。
As explained above, according to the present invention, it is possible to realize a semiconductor photodetector device having a Si substrate as a multiplier layer and a light absorbing layer with very few defects such as dislocations on top of the multiplier layer.
A semiconductor light receiving device in the μm wavelength band can be provided.

本発明は光通信の長距離化、高速化に寄与するところが
大きい。
The present invention greatly contributes to increasing the distance and speed of optical communications.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の半導体受光装置の断面図。 第2図は絶縁膜マスク。 第3図は製造工程。 である。図において。 1はSi基板(増倍層)。 2は絶縁膜マスク。 21は開孔部。 22はレジスト。 3は光吸収層。 4はグレーディッド層。 5は歪超格子。 6はウィンドー層。 7及び8は電極 (σp 衣食afdq半導体受尤装置価面図 第 1 図 紀岳家月茨マスク 第 2 図 (a) (b) (り 製造り程 第 3 図 (ぞf)1) (Jジ 製迭工程 易 図 (ぞの2) FIG. 1 is a sectional view of a semiconductor light receiving device of the present invention. Figure 2 shows an insulating film mask. Figure 3 shows the manufacturing process. It is. In fig. 1 is a Si substrate (multiplier layer). 2 is an insulating film mask. 21 is an opening. 22 is resist. 3 is a light absorption layer. 4 is graded tier. 5 is a strained superlattice. 6 is the window layer. 7 and 8 are electrodes (σp AFDQ semiconductor receiving equipment price chart Figure 1 Kigaku family moon thorn mask Figure 2 (a) (b) (the law of nature Manufacturing process Figure 3 (zo f) 1) (Jji Manufacturing process Easy figure (Zono 2)

Claims (1)

【特許請求の範囲】 Si基板の増倍層(1)と、 該基板上に形成された円形の開孔部(21)を有する絶
縁膜マスク(2)と、 該開孔部の該基板上にSiの格子定数より大きい格子定
数を持つ化合物半導体をエピタキシャル成長した光吸収
層(3)とを含むことを特徴とする半導体受光装置。
[Scope of Claims] A multiplication layer (1) of a Si substrate, an insulating film mask (2) having a circular aperture (21) formed on the substrate, and an insulating film mask (2) formed on the substrate in the aperture. and a light absorption layer (3) epitaxially grown from a compound semiconductor having a lattice constant larger than that of Si.
JP63155323A 1988-06-23 1988-06-23 Semiconductor light receiving device Pending JPH025489A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63155323A JPH025489A (en) 1988-06-23 1988-06-23 Semiconductor light receiving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63155323A JPH025489A (en) 1988-06-23 1988-06-23 Semiconductor light receiving device

Publications (1)

Publication Number Publication Date
JPH025489A true JPH025489A (en) 1990-01-10

Family

ID=15603379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63155323A Pending JPH025489A (en) 1988-06-23 1988-06-23 Semiconductor light receiving device

Country Status (1)

Country Link
JP (1) JPH025489A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04132270A (en) * 1990-09-25 1992-05-06 Mitsui Mining & Smelting Co Ltd Semiconductor photodetector
US7422919B2 (en) 2003-07-09 2008-09-09 Hitachi, Ltd. Avalanche photodiode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04132270A (en) * 1990-09-25 1992-05-06 Mitsui Mining & Smelting Co Ltd Semiconductor photodetector
US7422919B2 (en) 2003-07-09 2008-09-09 Hitachi, Ltd. Avalanche photodiode

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