JPH02546A - Device for formation of image - Google Patents

Abstract

PURPOSE:To prevent a recording width for each one pixel from becoming unstable at a printing side by outputting a video clock signal of a period corresponding to a minimum recording density unit from the printing side, and feeding a video data signal from a host side to the printing side on the basis of the clock signal. CONSTITUTION:Video clock signals IVCLK1, IVCLK2 are output from an interface circuit 519 of a 2-color LBP 199 to a host system 500 at a period corresponding to printing data one dot unit, and video data signals IVDAT1, IVDAT2 are fed from the system 500 to the circuit 519 of the LBP 199 on the basis of the clock signals. Thus, the data signal corresponds to the printing data one dot unit of the 2-color LBP. Accordingly, the recording width for each one pixel on the sheet is stabilized in the LBP 199.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a printing method such as a laser printer that includes a step of scanning a laser beam to form an electrostatic latent image on a photoreceptor. The present invention relates to an image forming apparatus suitable for use in apparatuses.

(Prior Art) In the case of this type of conventional image forming apparatus, as shown in FIG. 25, for example, the printing side 1 is constituted by a printer 2, and the host side 3 is constituted by a controller 4. Then, by sending a status signal from the printer 2 to the controller 4 and issuing a command from the controller 4 to the printer 2, the system status can be checked based on the system status. This command is sent to control the printer 2. In addition, when controlling the printer 2, the printer 2 outputs a horizontal synchronization signal to the controller 4, and the controller 4 outputs a horizontal synchronization signal.
is configured to send a video data signal to the printer 2 based on the horizontal synchronization signal.

However, when sending the video data signal from the controller 4 of the host side 3 to the printing side 1, the video data signal was sent only based on the horizontal synchronization signal output from the printing side 1. The recording width of one pixel sometimes fluctuated.

(Problems to be Solved by the Invention) In other words, in the case of a conventional image forming apparatus, one
For example, the host side sends a day data signal for two pixels to the printing side without considering the pixel recording width, and the printing side records the data continuously for both prefectures, so the printing side There is a problem that the recording width of one pixel becomes unstable and the recording width of 1 pixel becomes unstable.

The present invention has been made in view of the problem described in L, and its purpose is to prevent the recording width of each pixel on the printing side from becoming unstable in an image forming apparatus. Our goal is to provide the following.

[Structure 1 of the Invention (Means for Solving Problems) In order to achieve the above object, the present invention is composed of a printing side and a host 1-side that sends various data signals to the printing side, The present invention is characterized in that a video clock signal having a period corresponding to the minimum recording density is outputted from the printing side, and a video data signal is sent from the host side to the printing side based on this video clock signal.

(Function) With such a configuration, video data No. 913 is sent from the host side to the printing side based on No. 11207913 from the E9 printing side with a cycle corresponding to the minimum 111th position of the record stock, so the host side can These video data signals correspond to each minimum unit of recording density on the printing side.Therefore,
The recording width for each pixel of printing N'r- is stabilized.

(Embodiment) FIG. 1 is a V configuration diagram schematically showing an embodiment of an image forming apparatus to which the present invention is applied.

The image forming apparatus of this embodiment has two colors L constituting the printing side.
The BPI 99 and the Boss 1 Hesysdem 500 (external devices such as electronic meter Q machine, Ward Broselli, etc.) are coupled via a transmission controller (interface circuit, etc.) not shown. The second LBP 199 receives the dot image data of the two scales from the host system 500 and modulates the two laser beams respectively to produce a photoreceptor (image carrier).
The two types of written dot image data are independently developed and transferred onto the recording paper.

That is, this two-color laser beam printer (LaserB
(3all printer, hereinafter referred to as two-color LBP) 199, a first charger 201 . Table 1 100 Lightning Level Sensor 202. First developer 203
．． Second charger 204. Table 2 Hyakurai Hinsa 205. Second
Developing device 206. Pre-transfer charger 207, transfer charger 208
．． Peeling charger 209゜Cleaner 210 and static eliminator 21
1 is arranged, and Table 1 100 lightning level sensor 20
2 and the first developing device 203.
is irradiated onto the photoreceptor 200 to perform a first exposure, and a second laser beam 310 is irradiated between the n1 sensor 205 and the second current device 206 in the second table to perform a second exposure. is being done.

Further, the control section of the two-color LBP of this embodiment has a block configuration as shown in FIG.

The η-control unit of this two-color LBP uses the CPU 501 as the υ control center, and the ROM 5 in which the system program is stored.
02, a ROM 503 in which the data table is stored,
RAM 504 used as working memory, timer 505, I10 data input/output device 506,
It basically includes a print data write & l control circuit 513 and an interface circuit 519.

The contents of the data table stored in the ROM 503 are as follows:
As shown in Figure 3, address (4000) < 4001
＞ contains first color top margin control data and address (
4002) and (4003) contain second color top margin control data, and addresses (4004) and <4005> contain left margin control data.

Address (4006) < 4007) contains data for controlling the bottom hem margin in the case of paper size Δ3, and address (4006)
08) (4009) has the same paper size light margin a
, 1ltll data are respectively included. Below are tables corresponding to various paper sizes, as well as addresses (40
83) is included.

From address (4090), data for top margin coarse adjustment, from address (40BO), data for top margin fine adjustment, from address (40DO), data for left margin coarse adjustment, from address (4100), for left margin fine adjustment. Data and address (4120) contain two-beam scanning length correction data, which correspond to switches 1 to n, respectively.

These margin control data, coarse adjustment data, and fine adjustment data are used as margin control counter and pinary count cellar 1 data of a print data write control circuit 513, which will be described later.

Addresses (6000) (6001) are the first development bias data for red toner, and addresses (6002) (6001) are the first development bias data for red toner.
003) contains second developing bias data. Below are the previous toners, green toner black 1 to toner 1. Similarly, second developing bias data is included up to address (600F), and is used as set data for developing bias control of the process control circuit 522, which will be described later.

Addresses (6100) and (6101) contain target surface potential table data for the first charging potential control, J3, 25
This is the reference value for °C.

Addresses (6102>(6103) contain error table data at the time of convergence, which represents the allowable control range for the target surface potential. 1° Addresses (6104) and (6105) contain initial control output table data. , which is the set value of the first electrification charger that is output initially during warming-up.

Addresses (6106) and (6107) contain minimum correction table data.

Address (6108) (6109) has surface potential limit table data, address (610A) (610B> has control output upper limit table data, address (610C) (
610D) contains control output lower limit table data, and the surface potential limit table data, the control output upper limit table data, and the control output lower limit table data are used for self-diagnosis of the control system.

Below, the table corresponding to the second charging potential control similarly contains up to address (611B>. Address (6120
) contains charging potential temperature correction table data for a temperature range of 10''C to 40''C, which serves as temperature correction data for the target surface potential table data of 25°C.

The timer 505 is a general-purpose timer that generates basic timing signals for controlling paper transport, photoconductor processing, etc.
4 Ru.

The input/output device 506 outputs display data to the operation display section 507, inputs various switch data, etc., inputs inputs to each detector 508 in the control Oa section, and motors.

Outputs to the drive circuit 509 that drives the drive elements 510 such as clutches and solenoids, outputs to the drive circuit 511 that drives the laser scanning motor 512 for scanning two laser beams, potential sensors, temperature sensors, etc. Input/output is performed for a process control circuit 522 that controls the output of a high-voltage power supply 523 and the like in response to the input of a detection signal.

The print data write control circuit 513 includes a first laser modulation circuit 514 that performs optical modulation of the first semiconductor laser 302 for writing image data of the first color, and a second laser modulation circuit 514 that performs optical modulation of the first semiconductor laser 302 for writing image data of the first color. A second laser modulation circuit 521 that performs optical modulation of the semiconductor laser 303 is driven and controlled to write print data of the video image transferred from the host system 500 to a predetermined position on the photoreceptor. At this time, the beam detector 518, which uses a high-speed response PIN diode, detects one of the two light beams being scanned by the radar scan motor, and the beam detection circuit 517 detects one of the two light beams being scanned by the radar scan motor. Detector 518
A high-speed comparator digitizes the analog signal from the controller to create a horizontal synchronizing pulse, which is then sent to the print data write control circuit 513.

The interface circuit 519 connects the host system 500
It outputs status data to the host system 500 and receives command data and print data from the host system 500.

Further, a power supply device 520 is provided to supply power to each part of the control section.

The details of the main blocks in FIG. 2 will be explained below.

FIG. 4 is a diagram showing details of interface signals between the interface circuit 519 and the host system 500 in FIG. 2. In the figure, D7-Do is an 8b1 [bidirectional data bus], and ID5TA is a selection signal for the data bus, and is used as a status data bus to the host system 500 or a command data bus from the host system 500. choose whether to do so. l5
TB is a strobe signal for latching the above-mentioned command data in the interface circuit, and IBSY is a signal for permitting transmission of the strobe signal 15TB and reading of status data.

IH8YNI is print data 1 with the horizontal synchronization signal of the first color.
Request a line to be sent.

IVCLKl is a video clock signal for the first color and requests transmission of one dot of print data.

IPEND1 is the page end signal of the first color and notifies the end of the line.

The host system 500 is the IH8YN1, IVCLK
1, the first color driver 1-image data video data I3 IVD8 T1 is sent out, and IPEND1 is sent.
When it receives, it stops sending.

Similarly, fH8YN2 is the second color horizontal PA signal, IV
CLK2 is the second color video clock signal, IPEND
2 is the page end signal of the second color, and the host system 5
00 is the second based on IH8YN2 and IVCLK2.
dot] - video data signal IV of image data
It sends out DΔT2, and stops sending when it receives IPEND2. This video data signal IVDΔT1, IVDΔT
2 is sent to the print data write control circuit. The above relationship is shown in FIG.

IPRDY is a signal that informs that the second LBP 199 is in ready state C, IPREQ is a signal that allows the host system 500 to send a print start signal IPRNT,
IPRME is a prime signal that sets the 2eL8P199 in an initial state, and IPOW is a signal that informs that the 2eL8P199 is energized.

Next, details of commands and statuses used in the two-color LBP 199 are shown in FIGS. 6 and 7, respectively.16 In FIG. 6, SR1 to SR7 are status requests corresponding to statuses 1 to 7 in FIG. command, C3TU
is the cassette upper stage paper feed specification command, C3TL is also the lower stage specification command, VSYNC is the host system 500
A command that specifies the start of sending print data, SPl
, SP2. DPl is a command that specifies the print mode,
SPI is a mode that specifies a printing operation for only the first color, SP2 is a mode that specifies a printing operation for only a second color, and DPI is a mode that specifies a printing operation for both the first color and the second color. MF1 to MF9 indicate manual feed mode designation commands, respectively.

In FIG. 7, during paper transport, paper is being fed 2
The status indicates that the paper is being transported within the LBP 199. The VSYNC request is the status that indicates that the two-color 18P199 has received a command to start printing and is now ready to receive print data. For manual feed, the paper feed mode is manual feed. The upper and lower rows of the cassette indicate the status of the selected cassette in the cassette paper feeding mode, the print mode 1st color, 2nd color,
The two colors are the status indicating the selected print mode status, cassette size (upper row) and cassette size (lower row)
are the status indicating the size code of the cassette installed in the device, toner color (first color), and toner color (second color), respectively.
The status (color) indicates the l-ner code of the installed phenomenon device, the status indicates that the test/maintenance is in the test/maintenance state, and the data resend request indicates when reprinting is required due to a zip, etc. status,
During wait, the status 2eLBρ indicates that the fixing device is in a warm-up state, and the operation call indicates that an operator roll factor of status 5 has occurred. Serviceman call indicates that a status 6 serviceman call factor has occurred. Toner pack replacement indicates that the toner pack is full of toner. Out of paper indicates that there is no paper in the specified cassette, and paper error indicates that the paper has run out inside the machine. No first color toner is 1r! Indicates that there is no more toner in the A imager.No second color toner indicates that there is no more toner in the second developer.Second laser failure indicates that the second laser diode does not reach the specified output. Alternatively, a second laser failure may indicate that the beam detector is unable to detect the beam, indicating that the second laser diode does not reach the specified output. Sugan motor failure is a problem
? This indicates that the motor does not reach the specified number of revolutions even after a certain period of time has elapsed, or that the number of revolutions has deviated from the specified number of revolutions due to the number of rotations after the specified number of revolutions. Each potential sensor failure indicates that the surface potential of the photoreceptor cannot be detected, and the number of retransmitted sheets indicates the number of sheets that need to be reprinted when the data retransmission request status occurs.

FIG. 8 is a detailed circuit diagram of the first laser modulation circuit 514, the first semiconductor laser 302, the second laser modulation circuit 521, and the second semiconductor laser 303 in FIG. First, the first loser modulation circuit 514 and the first semiconductor laser 302 will be explained.

In FIG. 8, 302 is an M1 semiconductor laser diode, which consists of a laser diode 812a that emits light;
It consists of a monitoring photodiode 811a that monitors the output beam intensity from the laser diode.

809a is a high frequency transistor and a losser diode 8
12a is optically modulated. A resistor R29a is a current detection resistor, 810a is a transistor for passing a bias current to the first loser diode 812a, R30a is a current limiting resistor, R27a is a base current limiting resistor of the transistor 810a, and 817a is an inverter. Inverter 8
The input of 1a is the 1st loser diode enable signal @LDO
NIO is input, and when this signal becomes LOW level, the transistor 810a turns ON, and a bias current flows through the loser diode 812a. 80
7a and 808a are high-speed analog switches for modulating the loop +1 diode 812a, and when a HIGH level voltage is applied to the gate (G) of each analog switch, the connection between the train (D) and the source (S) is The resistance becomes low and turns ON. When a LOW level voltage is applied to the gate (G), the resistance becomes high and turns off. R21a is analog switch 807a, 808a
Short-circuit protection resistance when ON-FF changes, ・813a,
814a is the analog switch 807a, 8,08
This is the gate driver for a. C02a and C03a are speed-up capacitors, R24a and R25a
1. Gate drivers 813a, 814a
is the input resistance of 815a and 816a are EXCLtJ
SIVE-OR gate, 2AND gate 820a
Varies depending on the output. When one of the two gate inputs of the 2AND gate 820a becomes LOW level, the output becomes LOW level and the EXCLLIS IV
The output of the E-OR gate 815a becomes LOW level,
The analog switch 807a is turned on, and the first losser diode 812a is turned on.

The condition that the output of the AND gate 820a becomes LOW level is that the first video data signal IVDAT10 is LOW.
level or the first sample signal SΔMPIO is L
This is when the level is OW. When the inputs of the 2AND gate are both I (IG) - level, the EXCLUS
The output of the IVE-OR gate 816a becomes LOW level, turning on the analog switch 808a and starting the first rule.
The diode 812a4; becomes tOFF state.

806a is an operational amplifier and constitutes a voltage follower circuit. DOl is a Zener diode.
The output of the diode 812a' is regulated to be within the maximum rating. Also, resistors R19a and C01a constitute an integral circuit, and R20a is the capacitor L, LCO.
This is a discharge resistor that discharges the charge of 1a at a constant rate. 804a is an analog switch whose gate (G) is connected to inverter 805a;
The first sample signal SAMP10 is input to the input a. 803a is a transistor for level conversion, R22a is a base current limiting resistor of transistor 803a, and R18a
acts as a limiting resistor for current υ1 when charging the capacitor C01a. 802a is a comparator, and this comparator has hysteresis characteristics due to the action of resistors R14a and R15a.

The resistor R14 is connected to the input side of the comparator 802a.
The output voltage of the first monitor amplifier 801a is applied through a. 801a is a losser diode 81
Photodiode 811a that detects the optical output from 2a
is an amplifier for the output of Resistors R12a, R13a,
VROla is a resistor that regulates the increase [1] degree of the operational amplifier 801a. Therefore, by changing VROla, the increase + IJ degree of the operational amplifier 801a can be changed. R11a is a load resistance for the output of the photodiode in the first loser diode, and this resistance R11
A voltage proportional to the output current of the photodiode 811a is obtained at both ends of the photodiode 811a. Since the output current of the photodiode 811a is proportional to the optical output of the laser diode 812a, by varying the volume VRO1a, the optical output of the laser diode 812a can be adjusted to vl.
It is now possible to adjust J.

818a is a comparator for checking whether or not the first loser diode is emitting light, and the output voltage of the operational amplifier 801a is applied to the negative input. Further, a voltage divided by resistors R16a and R17a is applied to the + side input.

Therefore, when the losser diode 812a emits light and its output exceeds the voltage divided by the resistors R16a and R17a, the output level of the comparator 818a changes from the GH level to the LOW level, and the output level of the comparator 818a changes from the GH level to the LOW level. - Zareday No. 5 LRD Y 10 is output.

Further, a laser optical Q setting voltage is applied to one input terminal of the comparator 802a. The output of the voltage follower 819 is applied to the set voltage. The exposure adjustment volume 8 is connected to the input terminal of the voltage follower 819.
21 and resistor R31 is input, and by varying the exposure adjustment volume 821, the output voltage of the voltage follower 819 also changes.

Next, the first loser modulation circuit 514 and the second loser diode 30
The second operation will be explained. First, when the first loser diode enable signal LDONIO becomes LOW level, a bias current flows through the first loser diode 812a. Next, the first
When the sample signal SAMP10 reaches the SLOW level, the analog switches 804a and 807a are turned on, but since the capacitor C01a is not activated, the output of the voltage follower 806a is OV, and the modulation transistor 809a is not ONL. Therefore, a current flows through the first loser diode 812a to such an extent that no light is emitted. At this time, since no current flows through the first photodiode 811a, the output of the comparator 802a becomes LOW level and the transistor 803a is turned off, so that the current is charged to the capacitor C01a through the resistors R18a and R19a. The time constants of resistors R18a, R19a and capacitor C01a during this charging are selected to be approximately 20 to 50 m5ec.

If this value is very small, the response of the stabilization circuit will be too early.
Fluctuations in the laser light output level become large. Moreover, if it is too large, the responsiveness will deteriorate and it will take time for the optical output to stabilize. By applying a dielectric voltage to the capacitor C01a, a voltage of 40 watts 806a is generated.
The output voltage also gradually increases. Therefore, as the base voltage of the laser modulation transistor 809a increases, a current flows to the collector.

The I-transistor 8 is connected to the first loser diode 812a.
Bias current from 10a and the transistor 809a
A collector current flows from the gate, and when the interfering current exceeds the threshold current of the first loser diode 812a, the first loser diode 812a emits light. No. 1 rule
When the diode 812a emits light, a current flows through the first photodiode 811a for Tanabata, and the voltage at the input terminal of the operational amplifier 801A increases, and its output voltage is also an amplified value of the input upper voltage. be done. When the output voltage of the operational amplifier 801A exceeds the voltage divided by the resistors R16a and R17a, the output of the comparator 818a, that is, the second loser ready signal LRDY10 becomes HIGH.
It becomes LOW level. And' comparator 802a
When the output voltage of the operational amplifier 801△ exceeds the first power terminal voltage and the first router setting voltage, the output of the comparator 802a changes from LOW to HIGH (level), and the transistor 803a turns ON. ,''t CO1a is discharged through the resistor R19a. Therefore, the base voltage of the modulation transistor 809a also decreases, and the optical output of the first loser diode decreases. When the voltage decreases, the voltage at the tenth input ζi1 of the comparator 802a also drops below the set voltage for the second laser light, and the transistor 803a is turned off again, causing the capacitor C01a to be connected to the resistor R18a again.

CHI 1F-shipped through R19a. In this way, when the optical output of the first laser diode 812a is set to the first laser light setting voltage, the optical output of the second laser diode 812a is changed to the second laser light f? Comparator 802a slowly turns 0N-OF near i set voltage
F is repeated, and the optical output of the Lu-11 diode 812a becomes stable.

When the CPU 501 confirms that the I10 port transfer signal LRDYIO has become LOW level, it starts the operation of a sample timer (described later), and prints the first sample number 3 SA for each line outside the print area.
MPIO is set to LOW level for a certain period of time, and the analog switch 804a is turned on.

807a is turned on to perform laser beam ω stabilization.

Next, when the two-color LBP 99 becomes ready for printing and the first video data signal VDΔT10 is sent from the host system 500, the first video data signal VDATI
The analog switch 8078.808a alternately turns ON and OFF in response to
The first loser diode 812a is modulated by a, and the dot image data is transferred to the photoreceptor 20O.

The second laser modulation circuit 514 and the first semiconductor laser 30
2 has been described in detail, the second laser modulation circuit 521
The second semiconductor laser 303 also has a similar configuration, but the second semiconductor laser 303 has a similar configuration.
The output of the voltage follower 819 is applied to the set voltage of the light of the laser diode 812b, that is, the input terminal of the comparator 802bk. Therefore, by varying the exposure adjustment volume 821, the output voltage of the voltage follower 819 also changes, so the comparator 8
02a, 8021) - input terminal voltages change at the same time. Therefore, the optical output of the first laser diode 812a and the optical output of the second laser diode 812b are adjusted to the exposure volume 8.
By making 21 variable, they can be adjusted at the same time.

FIG. 9 is a detailed circuit diagram of the beam detection circuit 517 and beam detector 518 in FIG. 2. In Figure 9, 5
18 is a beam detector that uses a PIN diode with very fast response.

Also, this beam detector 518 serves as a reference pulse when inputting print data to the photoreceptor 200, and the generation position of this pulse must always be stable.

The anode side of the beam detector 518 is connected to one input terminal of a high speed comparator 825 through a load resistor R41 and a resistor R44. Also, the + of the high-speed comparator 825
A voltage divided by resistors R42 and R43 is applied to the side input terminal through R45. Further, a capacitor C10 for noise removal is connected in parallel to the resistor R43. Further, R46 is a positive feedback resistor for providing hysteresis characteristics, and C11 is a feedback capacitor for applying feedback at high speed to improve the horn waveform.

Next, the operation will be explained. When the laser beam passes over the beam detector 518 at high speed, a pulse current flows through the beam detector 518, and a positive pulse voltage is generated at one input terminal of the comparator 825.

This pulse voltage is compared with the + side input terminal voltage of the comparator 825, and a negative pulse 1-(SYO is outputted from the output of the comparator 825).

FIG. 10 is a diagram showing a one-time scan range of the laser beam on the photoreceptor 200 and the positional relationship of beam detection positions, data writing positions, etc. within the range.

In FIG. 10, 900 is the beam scanning start point, 901 is the beam scanning end point, and the beam that has reached the beam scanning end point 901 is moved by the next surface of the polygon mirror to the next beam from the beam starting point 900 at time O. Start. 902 indicates the beam detection starting point of the beam detector 518; 903
9 shows the left end surface of the photoreceptor, and 910 also shows the right end surface. 904 represents the left end surface of paper, 909 represents the right end surface of paper size A3, and 907 represents the right end surface of paper size 80.

905 is the data writing start point, 908 is the paper size A3
The data write end point 906 represents the data transfer end point for paper size A6.

dl is the distance from the beam detection point 902 to the writing start point,
d3 is the distance to the 6 size writing end point d4 is A31+
Represents the distance to the end point of Izuyamagomi, 1° and dl
represents the range of one scan of the beam.

d5. d6 indicates the effective printing range at ΔG and A3, respectively. As can be seen from this drawing, since the paper of this printer is always fed based on the left end surface of the paper, the printing start point 905 from the beam detection device 902 is the same for each paper sheet. Therefore, data may be written after a time corresponding to the distance from the beam detector 518 detecting the beam to the writing start point.

FIG. 11 shows not only the paper size and the horizontal direction including the printing area portion shown in FIG. 10, but also the entire paper.

In Figure 11, 917 represents A6 paper and 918 represents A3 paper. I', 904,905,906°907.9
Regarding 08.909, the same position as in FIG. 10 is shown.

911 is the leading edge of the paper, 913 is the starting point of data rotation in the vertical direction of the paper, 912 is the trailing edge of A3 size paper, 916 is the A
Indicates the end point of data writing for 3 sizes. 915 represents the trailing edge of the A6 size paper, and 914 represents the end point of the 8-inclusive size data.

FIG. 12 shows the print data write control circuit 51 in FIG.
FIG. 3 is a detailed circuit diagram of No. 3. This print data hit/miss control circuit 5
The main function of the laser modulation circuit 51 is to inject the print data from the host system 500 into a predetermined area on the photoreceptor 200 according to the size of the paper to be printed.
Send on 4.521. Additionally, the laser modulation circuit 514.
The necessary signals are sent to the laser light output stabilization circuit of 521. It also sends timing signals necessary for sending print data to the host system 500.

In FIG. 12, 830 is the laser modulation circuit 514.5.
This is an input/output port for sending and receiving the fj number necessary for control within the 21 and print data write control circuit 513. The counter 831 is composed of a counter 1 timer that controls printing data circulation, laser light output sampling, etc., and the setting of the operation mode and the preset value of the counter 1 timer can be programmably performed by the CPU 501. be.

865 is a laser light output sample timer and gate manual G6
The beam detection signal H3YD, which is the output of the beam detector circuit 517, is input to the beam detection signal (Nj'').
The timer operation starts after the level changes from 4H8YO/ALOW to HIGH, and the timer operation is set to end before the beam detector 518 for detecting the next beam.

Therefore, every time the beam detection signal H8YO is input to the gate input G6, the nrJ timer 865 is activated. A 1500 KHz clock is input to the clock input CK6 of the timer 865. Output S of the timer 865
MPTD is input to one side of the 2OR gate 877, and the output of the 2OR gate 877 is the first voltage signal @SAMP.
10. Loser modulation circuits 514 . 2 in the second laser modulation circuit 517
It is sent through NAND gates 886 and 887. The output second laser diode enable No. 13 LDON11 of the I/O boat 830 is input to the other input of the 2NAND gate 886, so that the first sambling signal SAMP10 can be inhibited independently. Similarly, the two laser diode enable signals LDONZI
is input, and a second sample signal SAMP2 is input independently.
The number 0 is prohibited. Similarly, the 2N
The other input of AND gate 887 is I10 port 830.
The output of the second laser diode enable signal DON
21 is input, and the second sample signal SAM is input independently.
P20! It's now banned. Further, the output laser test signal LDTS1 of the 1/'O boat 830 is input to the other input of the 2OR gate 877, and by setting the laser test signal DTSI to HIGI-level, the 911 semiconductor laser 302. The second semiconductor laser 303 can be forced to emit light. The I10 boat 830 receives the second loser ready signal LRDYIO1.
A laser ready signal LRDY20 is input, and when each laser is in a forced emission state, the first. By determining that the second laser ready<2, it is possible to confirm whether each laser is emitting light.

866 is a D-type F/F that generates the line start signal LST1, which is set by the beam detection signal H3YO and rehit by the rise of the sample timer output SMPTO. 867 is a D-type F/F that generates the beam detection ready 1 signal LDOTI and is input to the I10 boat 830. The above F/Fs 866 and 867 are set to 86 outputs of a 2OR gate. The 86 inputs of the 2OR gate are the first . A second laser diode enable signal.

832 is a crystal optical oscillator which serves as a quasi-clock for image milling pulses, and its oscillation frequency is about 32 MH/. 83
4.835 configures a quaternary counter with J-KF/F and converts it to J
5. 1) Rotate the output of the 11th crystal oscillator 832 by 4 minutes,
The first beam corresponds to the minimum modulation unit of one dot for the sea 11 beam.
The video clock VCKX21 (approximately 8 MHz) is generated.

837.838 is J-KF/ same as above 834,835
F constitutes a quaternary counter, but J-KF/F83
Input to J- of 7, n-bit binary counter 84
5 carryout output CO is input via an inverter 846.

For J-KF/F834, 835, 837, and 838, when the input to J- is HIGH level, its Q output performs a toggle operation in synchronization with the clock input GK, and when the input to J- is LOW
When it reaches the W level, its Q output interrupts the toggle operation. As a result, the Q output second video clock signal VCKY21 of the J-KF/F838 in the subsequent stage is r5/ 4J, which means that it has been extended by 1/4 clock. The main power Qo-Qn of the n-bit latch 847 is connected to the preset inputs DO to Qn of the n-bit binary counter 845, and the set value is determined by the CPU 50.
1 allows you to set a value according to [)ip-sw, etc. The above setting value is for one line (LSTl is HIGH)
The n-bit binary counter 845
This is to set the number of carry-outs of r5/4J, and as a result, the number of clocks generated for r5/4J is set.

Inverter 839. The shift register 840°2NOR gates 841 and 842 are connected to the n-bit binary counter 8.
This circuit provides a predetermined operation to 45.

The second video clock signal VCKY21 is used to correct the difference in scanning length of the two laser beams, 9 Ω, and Ω2. In this case, the fJ+ laser beam with a long scanning length is supplied with the first video hook signal VCKX21. A second video clock signal VC is applied to the second laser beam with a shorter scanning length.
KY21). 848 is performed by the output CHGCK of the selector rI10 port 830 that performs the designation.

Next, the correction method will be explained using an example. For example, a laser beam Ω blind with a good scanning length is 200111111. If the laser beam p2 with a short scanning length is 199 m+n, the difference in scanning length will be 1 mm. A platform with a resolution of 12 lines/mm has 12 lines per 2400 dot clock (200x12).
It is sufficient to extend the video clock signal VCKY21 of the laser beam 92 having a short scanning length by a dot clock. Here, one correction is 1/4 dot [1 dot enlargement 1 dot]
Between ζ and 2400 dot clocks, 1/4 dot clock correction is performed 12×4=48 times.

Therefore, in the n-bit binary counter 845, in J3,
Since the clock input CP of the n-bit bino-recounter is a 1/4 dot clock, its carry-out only needs to be overturned by 718 outputs during c+eoo (2400×4) clock cycles. In other words, the preset value may be set so that one carry occurs every 200 counts.

836 is a binary counter, and its Q2 output HCT31 is an 8-dot clock (approximately IMHz>) obtained by dividing the first video clock VCKX21 by 8. 863 is a left margin counter that sets the data writing start point from the beam scanning start point. It is.

864 is a write margin counter that sets the data writing end point from the beam scanning start point. 1) for the gate input G4 of the left margin counter 863 and the gate input G5 of the left margin counter 864;
This is the in-start name LSTI.

Clock input CK of the left margin counter 863
4 and the clock input CK of the write margin counter
The 8-dot clock HCT31 described in 1)a is inputted to the clock 5. Both counters simultaneously correct fluctuations in the data writing start point and data writing end point due to mechanical installation errors of the beam detector 518 for the two lasers. The above error can be corrected by changing the settings of both counters according to DIR-8W%, and the adjustment can be made at 8 dots 1 to 117991. This is the data write start position and data write end position relative to the paper.
This is because even if the dot deviates by 1, it is within an acceptable range, and the above-mentioned error can be adjusted more easily than by -ξ. The setting of the light margin counter (direction varies depending on the paper size).

875 is a 2AND gate whose one input is the output LMCTO of the left margin counter 863.

The other input is the output R of the write margin counter 864.
MCTO is input via an inverter 874,
Therefore, the output of the 2AND gate 875 represents the horizontal printing area.

The output of the 2ΔND gate 875 is sent to the shift register 86.
8, the signal is shifted by 4 dot clocks, and the horizontal printing area signal 1-IPENI is output from the Q output.

The horizontal print head area 15)-iPEN1 is input to the n-bit binary counter 850 (1) GE large input and shift register 854. The n-hit binary counter 8
50 and 2NAND gate 849. n pitch 1-latch 8
51. J-KF/F852 has a circuit configuration that can shift the data write start point to the right in 1-dot units.
The output of F/F852 is the first horizontal printing area signal HPEN
Output B1. The n binary counter 850
The preset inputs DO to Qn are used to set the number of right shifts, and are connected to the output of the n-bit latch 851, and the CPU 501 can set the preset inputs to values corresponding to D1p-3W, etc. The shift register 854 and the shift register 855. The inverter 853 has a circuit configuration that shifts the horizontal print area signal HPEN1 by two dot clocks, and the output of the shift register 855 outputs the second horizontal print area signal 1-IPENAI.

This is because the first horizontal print area signal HPENBI is shifted to the right by two dot clocks even at the minimum set value.

The output of the AND gate 857 is the first video clock signal V indicating the video clock (No. 5) for the first horizontal printing area decrement.
In CLKB1, one of the inputs of the AND gate 857 is the first horizontal mark? Area signal HPENB1. The other is the Y1 output of the selector 848. Further, the output of the AND gate 856 is the second video clock signal VCLKA1 indicating the video clock signal for the second printing area decrement, and the input of the AND gate 856 is one of the video clock signals for the second horizontal printing area (i@H
PEN△1. The other is the Y2 output of the selector 848.

As described above, the first horizontal print area signal HPEN81. is a signal that can adjust the data writing start point in units of one dot. The first video clock signal VCLKB1 is used to correct errors in the scanning start points of the two laser beams. In this case, the second horizontal printing area signal is applied to the G2 laser beam, which has a fast scanning start point.
%VCLKA1, the first horizontal printing area (Δ)-IPENBI,
It is sufficient to specify the first video clock Δ signal VCLK81 and adjust the error d.

A selector 858 is a selector for specifying it (710
Output C) of port 830 (performed by G12).

859 to 862 are counters for setting the data writing start point and data writing end point in the vertical direction (paper traveling direction), and 859 is a counter for setting the data recirculation start point for the first color.
A page top counter 860 is a first page end counter that sets the end point of data writing for the first color.861 is a second page top counter that sets the start point for writing data of the second color.862 is a data writing point for the second color. This is a second page end counter that sets the write end point.

The page top signal PT which is the output of the I10 port 830 is applied to the gate inputs GO to G3 of each counter 859 to 862.
OP1 is connected. Activated with VSYNCJ cloak.

Clock human power CKo of each power 1 kunta 859~862
Line start input ffi@LsT1 is connected to CK1, and it is difficult to count at 1 line (in units of 1 dot) in this final scan. The setting method for each counter will be described later.

871 is 2AND gate C One input is 01'1 first
The output PTCT102 of the page top counter 859 and other inputs are input from the output PECT10 of the first page end counter 860 of I'IQ through the inverter 870, so the output of the 2AND case 1-871 is the first color. @Direct print area signal ■PEN11.

873 is a 2AND gate, one input is the output PTCT20 of the second page top counter 861, and the other input is the output PECT2 of the second page end counter 862.
O is inputted to C through an inverter 9872 and dj is input, so the output of the 2AND gate 873 becomes the second color vertical print area signal VPEN21.

The output PECT10 of the first page end counter and the output PECT2O of the second page end counter are input to the I10 boat 830, and after each counting operation is completed, the first color page end number IPEND10. Second
Color page end signal IPEND20 to host system 5
Send to 00.

878 is the first color horizontal opening I5 IH8YN10,
879 is a ZNAND gate that sends the second color horizontal synchronization signal IH8YN20 to the host system 500.

880 is the video clock signal IVCK10 for the first color, and 881 is the video clock signal IVCLK2 for the second color.
This is a 2NAN[') gate that sends 0 to the host system 500.

884 is a 3NA which sends the first video data signal IVDTIO from the host system 500 to the first loser modulation circuit 514 as the first video data signal VDATIO.
It is an ND gate.

885 is the second color video data signal IVDT20/! from the host system 500. -Second laser modulation circuit 52
This is a 3NAND gate that sends out the second video data by decoding VDAT 20 to 1.

888 is an inverter that sends out the second laser diode enable signal L D ON 10 to the laser modulation circuit 514 . 88 is an inverter that sends out the second laser diode enable signal LDON20 to the second laser modulation circuit 521.

FIG. 13 shows a timing chart of the main signals for one page in the two-pack medium mode, and FIG. 14 shows a timing chart of the main signals for one line.

Next, the light is emitted from the control section of the two-color LBP 199. ? ilJ
Figures 15 to 2 show the functions of each part that operates in response to commands.
In accordance with Fig. 4, each 7[1-chart ゛rFf is described.

15 to 19 are four flowcharts showing the overall operation of the two-color LBP.

15th [4 In 2 colors L8P199 self-examination 111i 1
Each process of 1Q and warming up is shown.

In FIG. 15, the C1 operator turns on the power supply device 520.
In other words, the system program stored in the ROM 502 starts, and first, the self-diagnosis process of steps A101 to Δ104 is executed, and when the piercing switch is turned on, the door oven process (step A1011) is performed (to step 105). Then, [[M switch ON, annual stop switch ON, pass sensor ONr jam processing, step A106].

If the test print mode and maintenance mode 'C are not set (No in Step 107, No in Step 108), the fuser 221 will take a relatively long time to become ready.
The heat lamp that heats the is turned on (step 111).
, the warming-up process is started and the primary setting is performed.
The motor 221 and the scan motor 512 are turned on (step A112), and if the test print mode is set (step 107t'4), the test print process is executed (step A109). Maintenance processing is executed (step Δ110).

When the scan motor 512 is turned on and becomes ready (step A113), the plaid solenoid is turned on (step Δ114). NJ3: If the scan motor 512 does not become ready even after 30 seconds have passed since it was turned on (step 107 negative, A115 affirmative), troubleshooting for the scan motor 512 is carried out (step 116).

After the subsequent delay processing (step 117), the drum motor of the photoreceptor 200, the developing device motor 425, the clutch of the first developing device 203, the clutch of the second developing device 206, and the defrost device 21
Each of the 10 lamps is turned on (step 118), and il
After the delay process (step 119) -τ, the first loser diode 302, the second laser diode 303, the laser test, and the pre-transfer charger 208 are turned on (step Δ120).

After the subsequent delay processing (step A121), the failure of the first laser diode 302 and the second laser diode 303 is determined by the monitor (steps A122 and A123), and if they are normal (step A122 and step A123).
(affirmative), the horizontal synchronization signal H8YNC is used to check whether those beams are ready for detection (step A128). Note that if the first laser diode 302 is out of order (step 122 negative), the second laser failure process (step Al24> is executed), and if the second laser diode 303 is out of order (step 123 negative), Second laser failure processing (step A
I25) is executed. In addition, the horizontal synchronization signal H3YN
If the beam is not detected at C (No in step 126),
Beam detection failure processing (step Δ127) is executed.

After the subsequent delay processing (step A129>, peeling charging i1!
! 1209 is turned on (step A130), and after slow f processing (step A131), potential control during warming up as shown in FIG. 70 is executed (step A132). J3 and step A132 are processes for enabling printing as quickly as possible during the first printing.

After the subsequent delay processing (step A133), step A1
The process advances to steps 34 to A140. That is, step A13
4, the pre-transfer charger 207. Transfer charger 208. Each of the stripping chargers 209 is turned off. Step Δ136
Now, developer Mork/125. Clutch of the first developing device 203, clutch of the second developing device 206, first charger 201
．． Each of the second chargers 204 is turned off. Step △
At 138, the drum motor of the photoreceptor 200, excluding ti21
1. Loser diode 302. 2nd Ray 11 diode 303. Each of the motors of the fixing device 222 is turned off. In step A140, the blade solenoid is turned off.

Thereafter, after waiting for the controller 221 to become ready (step 141), the self-diagnosis and warming-up processes of steps A101 to A141 are completed, and the 16th
Proceed to the routine shown in the figure.

FIG. 16 shows two-color L B for the host system 500.
Reports the status of each part of the Pl 99 and reports the status of each part of the host system 50.
The process of issuing a print request when receiving a normal determination for each part from 0 is shown below.

In FIG. 16, J3 first obtains a judgment from the small strike system regarding the contents of status 5 (steps Δ142 to A
145). That is, in step A142, it is determined whether the toner bag should be replaced or not. If it is necessary to exchange (portrait at step A142), wait for the tonneau bag to be exchanged (to step 146), complete the exchange (portrait at step A146, A147), and proceed to step A143. In step A143, it is determined whether or not there is no toner for the first color by setting the empty switch 1203 to 0N10FF. If there is no first color toner (step A143), check whether the status 1 is the second color mode or not (step A148). )
, the replenishment of the first color toner to the first developing device 203 is completed (step A149), and the process proceeds to step A144 at A150. If it is the second color mode (step A148 affirmative), step Δ149 and step A150 are skipped and the process advances to A144. In step A144, it is determined whether the empty switch of the second developing device 206 is set to 0N10FF to determine whether or not there is no second color toner. If the first color toner is non-GJ (go to step 144), check whether the first color is [-] or not according to status 1.Step A15
1) If the mode is 2nd color mode and 2nd color printing is the 7th color (No to step 151), the supply of 2nd color 1 hener to the 2nd current V9 vessel 206 is complete J' (step A152 portrait, A153)
The process then proceeds to step 145. Also, if there is a first Qt-dog (step A151 portrait), step Δ152, A15
3 and proceeds to step 145.

In this way, if there is no abnormality in the toner status of the first developing device 203 and the second developing device 206, reception of commands from the host system 500 is permitted. (Step A1/J5).

If there is a command that specifies the first color mode (step A154f'f), the first color mode is set to status 1 (step A157), and if there is a command that specifies the second color mode (step A155 Portrait), the second color mode is set for status 1 (step A158).

Also, if there is a 21 mantle that specifies the two-color printing mode (
(Yes at step A156), two-color mode is set for status 1 (step A159).

Then, in the following step A160, U I PRDY is
When the process to turn on N and IPREQ is executed,
In the following step A161, a judgment process is performed to determine whether or not IPRNT is turned ON.
If so (step A161 portrait), the print request is turned off (step A162) and the process proceeds to the print processing after the routine shown in FIG.

In Fig. 17, 1 step △163 to step A17
4, a process similar to the warming-up process routine is executed.

In the following step A177, it is checked based on status 1 whether the mode is the second color mode. If the second color is not negative (No in step A177), the clutch of the first developing device 203 is turned on and the first developing device 203 is driven (step Δ178), and the process advances to step A179. If it is the second color mode (step Δ177f'i constant), step Δ1
78 and proceeds to step A179.

In step A179, it is checked based on status 1 whether the mode is the first color mode. If the mode is not the first color mode (No in step A179), the clutch of the second developing device 206 is turned on and the second developing device 206 is driven (step △1
80), proceed to step A181. If it is the second color mode, step A180 is skipped and the process proceeds to step A181.

In step 181, the bias table data regarding the tonneau color of the first acid generator 203 is read, and in the subsequent step A182, the read bias table data is set in the D/A converter 578, and in the subsequent step △
183 'r sells the bias table data regarding the toner color of the second developing device 20G, and performs the following step A1.
At 84, the read bias table data is D/A
Processing to set the converter 584 is executed.

After the subsequent delay processing (step A185), potential control from the first i to before printing as shown in FIG. 22 is executed (step A186).

In the following step A187, it is checked based on status 1 whether the mode is the second color mode. If it is not the second color mode (No in step A187), the developing bias 409 of the 102nd quadrant 203 is turned ON.

(Step A188), and the process advances to Step A190.

If it is the second color shade (Yes in step A187), the process skips step 188 and proceeds to step A190, and the second charging potential control is performed as shown in FIG. 22 (step Δ189).

In step A191 following the delay processing in step 190, it is determined based on status 1 whether or not the mode is the first color mode. If it is not the first color mode (No in step A191), the developing bias 409 of the second developing device 206 is turned ON (step Δ192), and the process proceeds to step Δ194. 1st
If it is the color mode, step A191 is affirmative>, step A192 is skipped and the process proceeds to step A194, and the first charging potential control is performed as shown in FIG. 22 (step A193).

In step A194r, it is determined whether the paper feed cassette is in the upper or lower tier based on status 1, and when it is determined that the paper cassette is in the upper tier, the paper feed cassette is driven in forward rotation and upper tier paper feeding is performed. (Step Δ195), Step A
199, and after the delay processing in step A208, the paper feed motor is turned off (step A209). If it is determined that the paper is in the lower stage, step A195 is skipped and the paper feeding motor is reversed to perform lower stage paper feeding in IU (step A197).
), proceed to step A199, and proceed to step A208
After the delay processing, the paper feed motor is turned off (step A).
209).

In step 199, it is checked based on status 1 whether the mode is the second color mode or not. If the mode is not the second color mode (No in step A199), the process proceeds to step A202 after the delay processing in step A2oO. If it is the second color mode (step A199 is decided), the process proceeds to step A202 after the delay process of step Δ201.

In step A202, the horizontal synchronizing signal 1-ISY
Check the beam detection ready on the NC and proceed to step A204. Note that if beam detection is not ready (step A
202 (No), perform beam detection failure processing.

In step Δ204, as shown in FIGS. 20 and 21, the page top counter, page end counter,
A left margin counter, a right margin counter, and a two-beam scanning length correction value are set.

In the following step A205, a vSYNC request with status 1 is set, and the VSYNC command is held (
Step A206), from the host system 500 to the VSY
When the NC command is sent, the VSYNC request is reset (step △207).

In the subsequent step A210 of FIG. 18, the top/bottom counter starts counting and the image @ writing starts, and then,
Based on the status 1, it is confirmed whether or not the mode is the 2-pack medium size mode (step A211). Then, if it is the first color mode and the second color mode (step A211 negative), the process advances to step A213, and if it is the two color mode (step A211 portrait), the process advances to step Δ213 and the seventh color mode.
The first charging potential control as shown in FIG. 0 is repeated five times (step A212).

In the following step 213, the second
Check to see if you are in color mode. If it is not the first color mode (No in step 213), the process proceeds to step 216 after the delay processing in step A214, and if it is the second color mode,
After step 213 (portrait) and delay processing in step A215, the process proceeds to step 216.

In step 216, when the registration motor is turned on and the total counter is turned on, delay processing (A217) I
The total counter was turned off and Stella 7A 221
At the same time, the registration motor is turned off (step A220).
.

Stella 7A 221 checks again whether it is in the second color mode. If it is not the second color mode (step A2
21 negative), when the end of the first page is detected (step A222 white determination), the 1e double image occupation is completed and I
PENDI is pulsed (step A223), and the process advances to step A224. In step Δ22/l, the first
Check whether it is in color mode.

If status 1 is the first color mode (step A22
4 portrait), if the first color toner is present in the first developer 203 (step A231 negative), the second developer (!JIil!
! There is no second color toner in 1206 (step A23
8), as shown in FIG. 19, pudding 1 to request IPREQ are turned on (step A248>).

At this time, when there is no first color toner in the first developing device 203 (step A237 white determination) and there is no second color toner in the second developing device 206 (step A232 is affirmative), as shown in FIG. The print ready IPRDY is turned off (step A252).

Furthermore, even if there is no first color toner in the first developing device 203 (step A231 white determination), there is no second color toner in the second developing device 206 (step A232 negative). If all the colors are the same, (step A233ti
), when a command specifying the second printing mode is issued (step A234 affirmative), the developing bias 409 of the first developing device 203 and its clutch are turned off (step A235), and the charging voltage of the first charger 201 is turned off (step A235). The level control is stopped, the first charger 201 is turned off (step A236), the second color mode of status 1 is set (step A237), and the print liquid is turned off.
REQ is turned on (step A248).

On the other hand, when there is toner of the first color in the first developing device 203 (No in step A231) and toner of the second color in the second developing device 206 (No in step A238), the command for specifying the second printing mode If there is (step A239
(Yes), the developing bias 409 of the first developing device 203 and its clutch are turned off (step A235), and when the charging potential #II of the first charging device 201 is stopped, the first charging device 201 is turned off (step A236). , the second color mode setting of status 1 is executed (step A23).
7), the print request IPREQ is turned on (step A248).

On the other hand, when it is determined in step A221 that the mode is the second color mode, and it is determined that the mode is not the first color mode in step A224, when the second page end is detected (step A
225 Portrait), the second color image writing is completed and I PEN
D2 is pulsed (step A226>, and the process advances to step Δ227).

If status 1 is the second color mode (step A22
7 (affirmative), even if the second developing device 206 does not contain the second colors 1 to 2 (step A240 portrait), the first developing device 203 does not contain the first toner colors.
There is color toner (step A241 negative), and the first
If both the color and the second color are the same color (step A24
2 portrait), when the command specifying the first printing mode is issued (step A243 portrait), the second developing device 206
The developing bias 409 and its clutch are turned off (
Stella/, 244>, 'a2? 'tFm device 204 (7)
Band 7ff About 7m The control is stopped and this second charger 2
04 is turned off (step A245a>), and the first color mode of status 1 is set (step A245b).
After that, print request IPR as shown in Figure 67
EQ is turned on (step A248).

Also, in step △227, C, status 1 is the second
If the mode is other than the color mode, it is determined in step A228 whether the first color toner is out based on the status 5, and in step A22, it is determined based on the status 5 whether or not the second color toner is out. And step A228
．． If there is no toner at A229, the printer 1-ready IPRDY is turned OFF as shown in FIG. 67 (step 252).

Also, if there are first and second color toners (step A
228 Negative, 229 Negative), proceed to step A248, and at the same time perform 28) cardiac potential control as shown in FIG.
Rotation I1 (Step A230) In addition, Step A22
d3 in the routine 1 to Δ248, step A232
By deleting the judgments in step 242, the first
The developing device 203 and the second f! Even if the toners in the A imager 206 are not of the same color, continuous development can be performed by switching the developing device.

In FIG. 19, after the print request IPREQ is turned ON in step A248, IPRNT is turned ON.
Judgment process to hold for 5 seconds (steps A249, A250)
is executed and TPRNT turns ON (step A2
49t4 constant), print request IPREQ is OFF
Then, it is determined whether the print mode has been changed (step Δ266).

If the print mode has not been changed yet (step A266)
Yes), return to step A177, and step A177~
During step A194, check the status 1 and
The developing device 203 or the second developing device 206 is made ready for development.

If the print mode has not been changed, skip step A26.
6 negative), return to step Δ194, and step A177
The processing from step Δ193 to step Δ193 is omitted.

However, regardless of the printing shade, step A
Since the printing is repeated without performing the processes 142 to A174, the recording operation continues without temporarily stopping the two-color LBP 199.

On the other hand, if 5 seconds have elapsed when IPRNT is ON for 5 seconds and the multilingual processing (steps A249 and A250) is executed (step A250 is affirmative), after the stop processing in steps A253 to A265, Returning to step A142, the computer enters a standby state waiting for a command from the system 500 to the host.

In addition, since printing operation is not necessary for Print 1-Ready (step A252, which is not performed when PRDY is OFF), after the stop processing in steps A253 to A265,
Returning to step A142, the system waits for a command from the host system 500.

20 and 21 show step A204 in FIG. 17.
3 is a flowchart showing the processing of FIG.

In the subroutines shown in FIGS. 20 and 21,
Steps 8101 to B107 to overturn the 1-tub margin, steps 8114 to B119 to finely adjust the top margin, steps 8120 to B123 to finely adjust the bottom margin, and steps 8124 to step 8128 for coarsely adjusting the left margin, step 8129 to step B131 for coarsely adjusting the right margin, and step 8132 to
The process is roughly divided into the process of finely adjusting and setting the light margin in step 8136, and the process of setting the two-beam scanning correction in steps 8137 to B141, and the details thereof are as shown in the figure.

That is, in the top margin coarse adjustment setting process from step 8101 to step 107, after reading the first color top margin table data D1 (step B101), the top margin coarse 1m switch is read (step B10).
2) Also, read the top margin rough adjustment table data D2 corresponding to the switch (step B103).

In the subsequent step B104, the top margin rough adjustment table data D2 is added to or subtracted from the value of the first color top margin table data D1 to obtain the calculation τ1 result D3.

If status 1 is not in two-color mode in the following step B105 (step B105 negative), the performance result D3 is set as the first color mode.
Set the page top counter 859 and
106), the process advances to steps 8108 to B113, a routine for coarsely adjusting and setting the bottom margin. Also, if status 1 is in two-color mode (step B105 portrait)
, calculation unity]]3 is set in the second page top counter 861 (step 8107), and step 81 is also set.
Proceed to the routine from 08 to B113.

Step 8108 After reading the bottom margin table data D4 of vertical size I, the following step B109
Now, the first color top margin table data D1 is added to the bottom margin table data D4 to obtain the performance result D5.

In the following step 8110, 7-gin is assigned to the ID of the rendering result D5! 8 Adjustment table data D2 is added and the performance result D6 is (Q).

Subsequent step B111 r If step 1 is not the second color mode (step B111 negative), Ii result D6 is set in the first page end counter 860 (step 8113), and the top margin of steps B114 to B119 is fine-adjusted. Proceed to the routine 1 to η. Also, if step 1 is the second color [- (step B111 portrait), the performance result D6 is hit to the second page earth counter 862 (step B112), and similarly step 8
Proceed to routines 114-819.

When the second color top margin table data D7 is read in step B114, the 1 to rim margin fine adjustment switches are read in the subsequent step B115, and the subsequent step 81
Step 16 reads the top margin fine adjustment table T-riD8 corresponding to the switch.

The following Stella/8117F uses the margin rough adjustment table data D to the jet of the second color top engine table data D7.
2 and the fine adjustment daple data D8 are added by G1 or subtracted by Q to obtain the cotton conduit D9.

If the status 1 is not the two-color mode in the subsequent step B118 (step 8118 negative), steps 8120~
The process advances to B123, the bottom margin fine adjustment set routine. Further, if the status 1 is the two-color mode (step 8118 portrait), the performance result D9 is set in the second page top counter 861 (step 8119), and the routine similarly proceeds to steps 8120 to B123.

At step 8120, the bottom margin table data D4
After adding the second color top margin data D7 to obtain the performance result D10, in the following step B121, add or subtract the margin rough adjustment table D8 to the value of the performance result D10! Iti El result Dll is 1 tsubo.

If the status 1 is not the two-color mode in the subsequent step B122 (step B122 negative), steps 8124~
Proceed to the left margin coarse adjustment set routine of 8128. Further, if the status 1 is the two-color mode (step B122 affirmative), the program sets the second page end counter C (step B123), and similarly proceeds to the routine of steps 8124 to 8128.

In step B124, left margin table data D1
2 is read, and in the subsequent step B125, the left margin coarse adjustment switch is read.

In the following step 8127, the left margin table data D12 is added or subtracted directly from the margin group one-round cram school table D13, and the calculation unity D14 is set to 1!.

In the following step 8128, the performance result DI/I is set in the left margin 7J counter 863. Then, in step 81
29-B131 Rydon-Jin coarse adjustment group Hit's Rou 1
Go forward.

In step 812, the specified paper size's line table data D15 is preempted and completed in step B13.
0, the margin aim adjustment table data D13 is added or subtracted from (1) of the light margin cheeksle data D15 to obtain the operation result D16.

In the following step B131, perform 9>Result D16 is Rhydon-
Sera l- in the gin counter 864? Step 81
Proceed to the routine for fine-tuning the write margins 32 to 8136.

In step B132, the left margin fine adjustment switch is read, and in the subsequent step B133, the left margin fine adjustment table data 017 corresponding to the switch is read.
In the following step B134, the (direct) of the table data D17 is set in the n-bit latch 851.

In the subsequent step B135, the print area changeover switch is read, and in the subsequent step B136, the I10 boat 830 is set according to the print area changeover switch, and then steps 8137 to
The process advances to B141, a two-beam scanning length correction routine.

After reading the 2-beam scan good correction switch in step B137, the scan length correction table data D18 corresponding to the switch is read in the subsequent step 8138, and the n-bit latch 8 is read in the subsequent step 8139.
Set it to 47.

In the subsequent step B140, the dot clock changeover switch is read, and in accordance with this dot clock changeover switch 1, the I10 port 830 is set in the subsequent step B141, and the processing in step A204 shown in FIG. 17 is completed.

FIG. 22 is a flowchart showing the potential control at the time of A-up and the potential control from 1 to 1-stripline.

For potential control during warming up, the value CHI)T of the first charging initial control output is read from the table data (step C101), and the read value is changed to D/△] inverter 57.
6 (step C102). Further, the value CH')12 of the second charging initial control output is read from the table data (step C103), and the read value is input to the D/Δ converter 582 (step C104).

When the first band "?8" device 201 is turned on in the subsequent step ClO3, the first charging potential control is executed as shown in FIGS. 23 and 24 (step Cl06).The subsequent delay process (step C107) ), followed by the second step ClO3
When the charger 204 is turned on, second charging is controlled as shown in FIGS. 23 and 24 (step C
109).

Then, step C110) increments the potential control number n.
, Step 0105 to Step C111) are repeated until the number of times n of this electric charge 17υ control reaches 3, and when the process is repeated 3 times, the first charger 201 and the second charger 204 are turned off (step C111). C112), this potential control at the time of warming up ends at Y.

For potential control before first printing, if status 1 is not the second color mode (occupied in step 0101), the potential control is performed in the first color mode.
The charger 201 is turned on (step D102), and the seventh
As shown in FIG. 1 and FIG. 72, the potential control for the first band is executed (step D103), and if the first color is only negative (step D104), the potential control before the first printing ends. becomes.

Moreover, if it is two-color mode (step D104 negative),
After the delay process (step D105), the second charger 204
is turned on and second charging potential control is executed as shown in FIGS. 71 and 72 (step D107), and the potential control before first printing is completed.

Further, if the status 1 is the second color mode in the first step D101, only the second color mode is executed, so the second charger 204 is turned on (step D106), and as shown in FIGS. As shown, the second charging potential control is executed (step D107), and the first potential control ends.

FIGS. 23 and 24 are flowcharts showing details of the charging potential system 1I (l process).

C in the tI nub routine shown in FIG. 23 and FIG.
70 is selected (step E101), and the photoreceptor 2
00 temperature measurement is performed (step E102). and the first charging potential adl III or the second charging potential 1l
ll+Reka Onokawa is selected (Step E 103)
, based on the data table in the ROM 503, in the case of first band T1 potential control, each process from step 0105 to step E109 is executed, and in the case of second charging potential gi control, steps 113 to 113 are executed. Each process of E118 is executed.

Then, in step E110 and step 2119,
The first target surface potential data (VO8I) and the second target surface potential data (VO32) are respectively corrected to correspond to the temperature of the photoreceptor 200 of the photoreceptor 200, and i=1, each tool is corrected 7'-even VO3I. '- and VO82- are obtained.

In the following steps E111 and E120, each 11/7 obtained in steps 104 to E110 is
Step E1
11 and step E120, the mourning process is executed.

In the following [λT block 112 and step E121, Δ
7/'D converter 593 and the first potential sensor 202
and the second potential sensor 205 is selected.

Next, each process after step E122 is executed in either the first charging potential control or the second charging potential control.

First, 1. A delay process is executed for a time corresponding to the travel distance between the second chargers 201, 204 and the first and second surface center position sensors 202, 205. The surface potential Vs is measured by the second surface sensors 202 and 205 (steps E122 and E123).

After the following steps, step E111 and step E
Processing is performed based on each data shown at 120.

That is, in step E124, 1, Vs≧VO3+ VOM A
A Self-diagnosis to see if it is above X. If it is above (step 124), the potential al (I control 1 error processing is executed (step E125). If it is less than (step E124 negative), proceed to step E126).

In step E126, it is determined whether the read value is within the target vessel and the subtl1 width of the error table according to the calculation formula VS=VO3±Voz.

If not (step E126 negative), step by step check how much it deviates from the target by, for example, 200V, 100V, 50V (steps E127 and E128).
．． E129), the process of setting the maximum limit to the same size as ΔX or ΔX2), twice, four times, and six times, respectively, is executed (steps E130.E131.E132).
．． E133).

After this setting, the process proceeds to step E134, where the charging output is set to 1;
Ω is determined, and in the subsequent step E135 it is checked whether the charging output is larger than the maximum value b, and in the subsequent step E
At step 136, it is checked whether the charging output is 6 smaller than the minimum value, and if it is too large or too small (step E135 evaluation), potential control error processing is executed (step E136 evaluation). Step E137).

If the charging output is within the control range (step 135 negative, step E136 negative), step E1
38, it is determined whether the actual potential control target is the first charger 201 or the second charger 204.

If this determination result is the first charger 201, after setting CHD 1=CHDT (Stella 7E139), change the Cl-1 charger 1 to D/
A process of setting the A converter 576 is executed, and the process advances to step E145.

Also, if this determination result is the second charger 204, CHI
) 12 = After setting CHD T (step E141), set CHDTi to D/AL
The process of hitting the I inverter 582 is executed, and the process advances to step E145.

In step E145, the number of times of charging potential control is incremented, and the routine proceeds to step E146 and subsequent steps in FIG.

That is, if the potential is controlled from Firth 1 to Print r) a (Step 146 Portrait), the potential control number m is 3 times (
In step E151tl determination), the non-convergence due to potential control ends, and the process returns to step E122 if it occurs no more than twice.

Also, in the potential control during warming up, step E1/17ta is fixed), potential control txt + number of times m is 10
At the 5th turn (step 150), potential control error processing is executed (step E153), and at the 5th turn, the process returns to the start-up E122.

”: If status 1 is two-color mode T: If not (step 1148 negative), the process returns to step E122, but if status 1 is two-color mode (step E148 affirmative), potential control plate pair 9 is first charged. container 201 and second charger 2
04, and if it is the first charger 201, the potential will be 204 when the potential control is performed five times (step 150), and the potential will be ii1+It. If "c", when the potential control is performed twice (step 154), the potential control becomes D's Hiiragi Y.

As described above, in one embodiment of the present invention, as explained in particular with reference to FIG. II I9J r
tj tet ri0 Tsukushin@(IVCLKl, rVC
Based on this video clock signal, a video data signal (IVDATl) is output from the host system 500 to the interface circuit 519 of the two-color LBP 199.
, IVDAT2>, this video data signal corresponds to each dot 1 to instep of the two-color LBP print data.

Therefore, the recording width of one Aty on the paper of J5 with two colors L B Pl 99 is stable.

[Effect of the Invention 1] As described above, the image forming apparatus to which the present invention is applied outputs a video clock signal with a cycle corresponding to the minimum unit of recording density from the printing side, and 3
Since the system configuration is such that a video data signal is sent from the host side to the printing side based on the number, the recording width of one pixel on the printing side is accurate.

[Brief explanation of the drawing]

FIG. 1 shows an outline of an embodiment of an image forming apparatus to which the present invention is applied, and FIG.
A block diagram showing the system configuration of color L B P, FIG. 3 is a diagram showing the contents of the ROM data table, FIG. 4 is a diagram showing details of the interface signals between the interface circuit and the host 1 to the system, and FIG. is an explanatory diagram of the relationship between interface signals and data writing η, and Figure 6 is a two-color LB
Detailed explanatory diagram of commands used in P, Figure 7 is LB 2
Detailed explanatory diagram of each status used in f), Figure 8 shows details of the ray+f modulation circuit and the semiconductor radar.
Figure 9 shows the details of the beam detection circuit and beam detector, and Figure 10 shows the scanning range of the laser beam once, the beam detection position, and the data writing position l. Figure 11 is a diagram showing the positional relationship of data 8-inclusive positions on the entire paper, Figure 12 is a circuit diagram showing details of the print data IT-inclusive control circuit, and Figure 13 is two-color printing. The timing chart of the print data furuzuke control 111 signal in the print data control mode in FIG.
A flowchart showing the overall operation of the color LF3P, FIGS. 20 and 21 are a flowchart showing a subroutine for setting the page top counter, page end counter, left margin counter, right margin counter, and 2-beam scanning correction value, and FIG. 22 23 and 24 are flowcharts showing subroutines for potential control during warm-up and potential control before sprinting, FIGS. 23 and 24 are flowcharts showing subroutines for controlling charging potential, and FIG. FIG. 2 is an explanatory diagram of an image forming apparatus. 199...Two-color LBP 500...Host system 519...Interface circuit

Claims (1)

[Claims] It consists of a printing side and a host side that sends various data signals to the printing side.The printing side outputs a video clock signal with a cycle corresponding to the minimum recording density unit, and the host side outputs a video clock signal with a cycle corresponding to the minimum unit of recording density. An image forming apparatus characterized in that a video data signal is sent from the printing side to the printing side.