JPH0251481U - - Google Patents
Info
- Publication number
- JPH0251481U JPH0251481U JP4650689U JP4650689U JPH0251481U JP H0251481 U JPH0251481 U JP H0251481U JP 4650689 U JP4650689 U JP 4650689U JP 4650689 U JP4650689 U JP 4650689U JP H0251481 U JPH0251481 U JP H0251481U
- Authority
- JP
- Japan
- Prior art keywords
- reduction circuit
- noise reduction
- noise
- utility
- model registration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 8
Landscapes
- Television Signal Processing For Recording (AREA)
Description
第１図は本考案による一実施例の回路ブロツク
図、第２図は周波数特性を示す図、第３図はそれ
ぞれ回路ブロツク図における各点の信号波形図、
第４図は従来例の回路ブロツク図である。第５図
〜第８図は第２図の実施例に関し、第６図は構成
を示すブロツク図、第５図、第８図は周波数特性
図、第７図は具体回路を示す回路図である。
２…ＦＭ復調器、８…ノンリニア・デイエンフ
アシス回路、９…第１のハイパスフイルタ型ノイ
ズキヤンセル回路、１６…第２のハイパスフイル
タ型ノイズキヤンセル回路。
FIG. 1 is a circuit block diagram of an embodiment of the present invention, FIG. 2 is a diagram showing frequency characteristics, and FIG. 3 is a signal waveform diagram at each point in the circuit block diagram.
FIG. 4 is a circuit block diagram of a conventional example. Figures 5 to 8 relate to the embodiment shown in Figure 2, Figure 6 is a block diagram showing the configuration, Figures 5 and 8 are frequency characteristic diagrams, and Figure 7 is a circuit diagram showing the specific circuit. . 2... FM demodulator, 8... Nonlinear de-emphasis circuit, 9 ... First high-pass filter type noise cancel circuit, 16 ... Second high-pass filter type noise cancel circuit.
Claims (1)
ＦＭ変調して記録媒体より前記映像信号を再生す
る磁気記録再生装置のノイズ低減回路において、
再生ＦＭ信号を復調する復調手段と、該復調信号
をデイエンフアシスするノンリニアデイエフアシ
ス回路と、該復調信号のノイズ（成分）除去する
第１及び第２のハイパス型ノイズキヤンセル回路
とを備えることを特徴とする広帯域ノイズ低減回
路。 (2) 第１及び第２のハイパス型ノイズキヤンセ
ル回路は、それぞれＨ，Ｐ，ＦとリミツタとＬ，
Ｐ，Ｆと減算器で構成し両者を直列に接続した実
用新案登録請求の範囲(1)項に記載の広帯域ノイ
ズ低減回路。 (3) 前記第１及び第２のハイパス型ノイズキヤ
ンセル回路のフイルター特性のピークを低域側と
、高域側に設定した実用新案登録請求の範囲(1)
項及び(2)項に記載の広帯域ノイズ低減回路。[Claims for Utility Model Registration] (1) In a noise reduction circuit for a magnetic recording and reproducing device that modulates a non-linear emphasized video signal to reproduce the video signal from a recording medium,
It is characterized by comprising demodulation means for demodulating a reproduced FM signal, a non-linear day-effort circuit for de-emphasizing the demodulated signal, and first and second high-pass type noise cancel circuits for removing noise (components) from the demodulated signal. Wideband noise reduction circuit. (2) The first and second high-pass type noise cancel circuits are H, P, F, limiter, L,
A wideband noise reduction circuit according to claim (1) of the utility model registration, which comprises P, F and a subtracter and is connected in series. (3) Scope of Utility Model Registration Claim (1) in which the peaks of the filter characteristics of the first and second high-pass noise canceling circuits are set on the low-frequency side and on the high-frequency side.
The broadband noise reduction circuit described in paragraphs and (2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989046506U JP2535231Y2 (en) | 1988-05-12 | 1989-04-20 | Broadband noise reduction circuit |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63-62562 | 1988-05-12 | ||
| JP6256288 | 1988-05-12 | ||
| JP1989046506U JP2535231Y2 (en) | 1988-05-12 | 1989-04-20 | Broadband noise reduction circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0251481U true JPH0251481U (en) | 1990-04-11 |
| JP2535231Y2 JP2535231Y2 (en) | 1997-05-07 |
Family
ID=31717966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989046506U Expired - Lifetime JP2535231Y2 (en) | 1988-05-12 | 1989-04-20 | Broadband noise reduction circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2535231Y2 (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58159213A (en) * | 1982-03-18 | 1983-09-21 | Sony Corp | Video signal recording and reproducing device |
| JPS62252282A (en) * | 1986-04-25 | 1987-11-04 | Hitachi Ltd | Noise elimination circuit |
-
1989
- 1989-04-20 JP JP1989046506U patent/JP2535231Y2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58159213A (en) * | 1982-03-18 | 1983-09-21 | Sony Corp | Video signal recording and reproducing device |
| JPS62252282A (en) * | 1986-04-25 | 1987-11-04 | Hitachi Ltd | Noise elimination circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2535231Y2 (en) | 1997-05-07 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |