JPH0250714U

JPH0250714U -

Info

Publication number: JPH0250714U
Application number: JP12919788U
Authority: JP
Priority date: 1988-09-30
Filing date: 1988-09-30
Publication date: 1990-04-10
Anticipated expiration: 2003-09-30
Also published as: JP2530858Y2

Description

[Brief explanation of drawings]

第１図、第２図は本考案の一実施例を示す電気
回路図である。１…位置指令信号発信器、２…位置フイードバ
ツク信号発信器、３…偏差増幅器、４…絶対値変
換器、５…パルス制御帯設定器、６…不感帯設定
器、７…第１コンパレータ、８…第２コンパレー
タ、９…極性判別器、１０…休止時間設定回路、
１１…遅延回路、１２…比較回路、１３…第１Ｏ
Ｒ回路、２１…パルス発生器、２２…第１ＡＮＤ
回路、２３…第２ＯＲ回路、２４…第２ＡＮＤ回
路、２５…第３ＡＮＤ回路、２６…第４ＡＮＤ回
路。 1 and 2 are electrical circuit diagrams showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Position command signal transmitter, 2... Position feedback signal transmitter, 3... Deviation amplifier, 4... Absolute value converter, 5... Pulse control band setter, 6... Dead band setter, 7... First comparator, 8... 2nd comparator, 9... Polarity discriminator, 10... Rest time setting circuit,
11...Delay circuit, 12...Comparison circuit, 13...1st O
R circuit, 21...pulse generator, 22...first AND
circuit, 23... second OR circuit, 24... second AND circuit, 25... third AND circuit, 26... fourth AND circuit.

Claims

[Scope of utility model registration request]

a position command signal transmitter that outputs a position command signal Ei; a position feedback signal transmitter that outputs a position feedback signal Ef; a deviation amplifier that receives both of the signals and outputs their deviation Eo=Ei−Ef; An absolute value converter that receives a signal from a deviation amplifier and outputs its absolute value |Eo|, a pulse control band setter that outputs a pulse control band value signal Ep, and a dead band setter that outputs a dead band value signal Ed. , the signal |Eo| and the signal Ep, and when Ep<|Eo|, high level signals H, E are output.
A first comparator outputs a low level signal L when p≧|Eo|, receives the signal |Eo| and the signal Ed, and outputs a high level signal H when Ed<|Eo|, and a high level signal H when Ed≧|Eo| When low level signal L
a second comparator that receives the signal Eo from the deviation amplifier, determines its polarity, and outputs a high level signal H when the polarity is positive and a low level signal L when the polarity is negative; A delay circuit and a comparison circuit are connected in series to the output side of the first comparator, and a rest time setting circuit includes a first OR circuit that receives inputs from this and the first comparator, and receives inputs from the second comparator and the pulse generator. a second OR circuit receiving inputs from the first AND circuit and the first comparator; and a second OR circuit receiving inputs from the second OR circuit and the first OR circuit.
an ND circuit, a third AND circuit that receives inputs from the second AND circuit and the polarity discriminator and outputs one proceeding signal; and a third AND circuit that receives inputs from the second AND circuit and the polarity discriminator and outputs the other proceeding signal. A positioning control circuit comprising: a fourth AND circuit.