JPH0248742A - Logical simulation device - Google Patents

Abstract

PURPOSE:To efficiently perform the simulation of an objective circuit to be simulated by performing gate simulation more detailed than a function level after the simulation at the function level is performed at first. CONSTITUTION:A simulating part 2 inputs a simulation model 1, and sends it to a function level simulator 3 and a gate level simulator 4 respectively. Next, a data acquiring part 5 acquires necessary data by using transfer information 7 at the time to transfer the necessary data between the logical simulators, and delivers it to the gate level simulator 4 by using the transfer information 2. Next, a simulator starting/stopping part 8 instructs the gate level simulator to start execution, and simultaneously, outputs a simulated result from the gate level simulator 4, and delivers it to the function level simulator 3, and performs after-processing. Thus, the simulation efficiency of the objective circuit to be simulated can be raised.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to logic simulation in a computer.

[Conventional technology]

Conventionally, a logic simulation device using a logic simulator (Jd), without using multiple logic simulations, has used a single logic simulator to perform all of the monitor processing, preprocessing, and test instruction execution part in the T&D driving simulation. is being carried out.

[Problems that the invention helps solve]

However, conventional logic simulation devices use the same logic simulator as the instruction execution part under test for the monitor processing, preprocessing, and postprocessing parts that take up most of the execution time in actual simulations, so The drawback is that the number of test programs that can be executed within a certain amount of time is limited.

[Means to solve the problem]

A logic simulation device according to the present invention includes a simulation means for modeling and simulating the same simulation target circuit using a plurality of independent logic simulators to suit each logic simulator, and a simulator/simulator of the plurality of logic simulators. an acquisition means for acquiring data necessary to restart a simulation in a predetermined logic simulator in another simulator among the plurality of logic simulators; and a setting means for setting the above simulator model.

[Effect]

A plurality of logic simulators perform simulation by sharing processing contents of one simulation target circuit.

〔Example〕

The present invention will be explained in detail below. The figure is a block diagram of a logic simulator/device showing an embodiment of the present invention. In figure 0, 1 is a simulation model corresponding to a circuit to be simulated, and 2 is a monitor process, pre-processing, and post-processing in a T&D driving simulation. Simulate the part using the function level simulator 3
5 is a data acquisition section which is an acquisition means; B is a data setting section which is a setting means; TF!
, transfer information when receiving and passing data necessary for simulation between the functional level simulator 3 and the gate level simulator 4, 8 is an instruction to start or stop execution of the functional level simulator 3 or the gate level simulator 4. 9 is the simulation result, which is the simulation start/stop unit which is the instruction means to proceed.Next, the operation of the 1 logic power y/y system will be explained.

The mass simulation unit 2 inputs the simulation model 1 and sends it to the functional level simulator 3 and the gate level simulator 4, respectively. Next, monitor processing and preprocessing are performed in the T&D simulation of the 1-function level simulator 3. After the completion of this Te&D electric simulation, the simulation start/stop unit 8 stops the functional level simulator 3. Next, the 1 data acquisition unit 5 acquires necessary data using the transfer information 7 used when necessary data is transferred between logic simulators. Then, the data setting unit 6 passes the data acquired from the data acquisition unit 5 to the gate level simulator 4 using the transfer information 2. Next, the one-simulation start/stop unit 8 instructs the gate level simulator 4 to start execution, and causes the gate level simulator 4 to output simulation results as necessary. And K)
At the same time as the level simulator 4 completes the simulation, necessary data is passed from the gate level simulator 4 to the functional level simulator 3 for post-processing.

As described above, the logic simulation apparatus in this embodiment first performs a simulation at the functional level and then performs a gate simulation more detailed than the functional level, so that the circuit to be simulated can be efficiently simulated. This makes it possible to shorten simulation processing time and process a desired number of test programs within a certain amount of time.

〔Effect of the invention〕

As explained above, the present invention provides a simulation means for modeling and simulating the same simulation target circuit using a plurality of independent logic simulators to suit each logic simulator, and a simulation means for simulating the same simulation target circuit using a plurality of independent logic simulators, means for instructing to stop the simulation, an acquisition means for acquiring data necessary for restarting the simulation in a predetermined logic simulator in another simulator among the plurality of logic simulators; Since the present invention includes a setting means for setting the above simulator model, the simulation efficiency of the simulation target circuit can be improved. Thereby, the simulation processing time can be shortened and a desired number of test programs can be processed within a certain period of time.

[Brief explanation of the drawing]

The figure is a block diagram of a logic simulation device showing one embodiment of the present invention. 1...Simulation model, 2...Conflict/simulation section, 3...Functional level simulator, 4
...Gate level simulator, 511...Data acquisition unit, B...Data setting unit, T-...Transfer information, 8.e...Simulation start/stop unit, 9.
... Shimmy Seasion Results.

Claims (1)

[Scope of Claims] Simulation means for modeling and simulating the same simulation target circuit using a plurality of independent logic simulators to suit each logic simulator, and instruction means for starting or stopping the simulation of the plurality of logic simulators. and an acquisition means for acquiring data necessary for restarting simulation in a predetermined logic simulator in another simulator among the plurality of logic simulators, and setting the data of this acquisition means to a simulator model on the another simulator. A logic simulation device characterized by comprising: setting means for setting.