JPH0247980A - Picture reader - Google Patents

Abstract

PURPOSE:To reduce the current consumption by making only a buffer amplifier in a readout path at least at the top of the 1st IC chip among plural signal processing ICs at all times. CONSTITUTION:When a start signal is given from an input terminal 16 of the 1st signal processing IC chip B1, a scanning circuit 9 starts its operation and an output is given sequentially to a reset switch 3, a readout signal changeover switch 5, and an amplifier power supply end ON/OFF circuit 19-1 or the like sequentially. The start signal is given also to a set terminal 5 of the circuit 19-1 and since the 1st chip designation terminal C is connected to ground, a buffer amplifier 4 at the top is already turned on. A buffer amplifier in succession to the buffer amplifier turned on the grounding level of the terminal C is turned on/off by amplifier power supply ON/OFF circuits 15-1-15-n. The signal from a scanning circuit 9 is given to a terminal 18 at a point of time a little earlier than the end of the readout by the chip B1, the result is given to a terminal 16 of the 2nd IC chip B2 and a corresponding buffer amplifier 4 is turned on. Then other buffer amplifiers are successively turned on.

Description

[Detailed description of the invention] [Industrial application field]

The present invention can be used in facsimiles, scanners, etc.

BACKGROUND ART 1 As a large-area image reading device, there is a contact image sensor that projects and reads a document in its original size (1:1 ratio). FIG. 3 shows an outline of an image reading device. D is an image reading device, which is composed of a photoelectric conversion element array A and a plurality of signal processing IC chips B, to B7. The photoelectric conversion element array A includes many light converting elements l.
are arranged, and the light from the original is received here. The photoelectric conversion element group is divided into n groups, and each group is made to correspond to each signal processing IC chip. The signal processing IC chips 1B, .about.B read out the signal obtained by the photoelectric conversion element 1 as a result of light reception, and this signal is a signal obtained by reading an image. In the case of an image reading device for A3 size, the signal processing IC chip is one that can read signals from 64 photoelectric conversion elements (such a chip is used as a 64-bit signal processing IC chip).
C-sump) is used. A total of 74 such chips are used. In this case, the number of photoelectric conversion elements 1 in the photoelectric conversion element array A is 64×74, which is 4.
There are 736 pieces. FIG. 4 shows an image reading device that is the basis of the present invention. In FIG. 4, 1 is a photoelectric conversion element, 2 is an equivalent capacitance of the photoelectric conversion element l, 3 is a reset switch, 4 is a buffer amplifier, 5 is a continuous signal changeover switch, 6 is a negative power supply, and 7
is a reset line, 8 is a common output line, 9 is a scanning circuit, 10 is a ground wire, 11 is an output terminal, 12 is a dummy switch,
13 is a dummy capacitor, 14 is a differential amplifier, 15
1.15-n is the amplifier power on/off circuit, 16 is the scanning circuit start signal input terminal, 17 is the ground terminal, 1st is the next chimp start signal, B is the first signal processing IC chimp, B2 is the second signal It is a processing IC chip. The photoelectric conversion element 1 is used with a reverse bias applied thereto. The negative power supply 6 is for this purpose. The equivalent capacitance 2 is a capacitance that isometrically represents the total of the interelectrode capacitance of the photoelectric conversion element 1, the stray capacitance generated along with the wiring of the photoelectric conversion element 1, and the like. The reset switch 3 is for setting the potential of the equivalent capacitance 2 to a predetermined value, and the buffer amplifier 4 is for impedance conversion. The continuous signal changeover switch 5 is a switch for reading out the detected value, that is, the potential of the equivalent capacitance 2. The potential of the equivalent capacitor I2 changes depending on the light incident on the photoelectric conversion element 1, as described below. Next, the operation will be explained. When the reset switch 3 is turned on, a current flows through the path of ground -> reset switch 3 -> equivalent capacitance 2 -> negative power supply (-■), and the equivalent capacitance 2 is charged to the polarity shown. When light is incident on the photoelectric conversion element 1, a photocurrent with an intensity corresponding to the incident light flows in the opposite direction of the photoelectric conversion element (photodiode) 2, and the equivalent capacitance 2 is discharged. When the successive signal changeover switch 5 is turned on at a predetermined time, the potential of the equivalent capacitance 2 at that time is read out via the buffer amplifier 4. This makes it possible to know the intensity of the incident light. The successive signal changeover switches 5 are not turned on and off all at once, but are sequentially switched by signals from the scanning circuit 9. The scanning circuit 9 is composed of, for example, a shift register. Note that an MO3 type transistor is normally used as the reset switch 3, but when this is switched, noise is generated and mixed into the image signal. Therefore, a dummy potential corresponding to noise is generated by a dummy switch 12 made of the same type of element as the reset switch 3 and a dummy capacitor 13 whose capacitance is approximately equal to the equivalent capacitance I2. Then, the noise potential is canceled out by a dummy potential in the differential amplifier 14, and a noise-free signal is taken out from the output terminal 11. As the buffer amplifier 4, a low active one is shown. Therefore, when a low (low "0") signal is input to the circle mark (status display symbol) of the buffer amplifier 4, the buffer amplifier 4 enters the operating state. That is, at that time, power is applied (turned on) to the buffer amplifier 4. The first two buffer amplifiers 4 of each signal processing IC chip are always supplied with a low signal from ground, and are kept in an operating state. The subsequent buffer amplifiers 4 are divided into several groups, and each group has amplifier power on/off circuits 15-1 to 15-n provided correspondingly.
Power is applied or de-energized depending on the signal. FIG. 5 is a diagram illustrating on/off of the buffer amplifier in FIG. 4. The first two buffer amplifiers 4- of the signal processing IC chip
The reason why 1.4-2 is always in operation is as follows. First, the buffer amplifier 4-1 will be described. When the previous stage signal processing IC chip has finished its operation and it is its own chip's turn (that is, when the corresponding successive signal changeover switch 5-1 is turned on), the buffer amplifier 4-1 is switched on. Even if it is turned on, the buffer amplifier 4-1 does not immediately operate normally. It takes some time (settling time) until it operates normally. Therefore, in order to be able to operate normally when the continuous signal changeover switch 5-1 is turned on, it must be turned on at least a settling time before the continuous signal changeover switch 5-1 is turned on. I need to do it. Therefore, one way to turn on the power in advance is to provide a constant low signal through grounding. If the buffer amplifier has a long settling time, 2
It is also necessary to always supply a low signal to the third or third buffer amplifier. The number of buffer amplifiers to be kept on at all times is determined by taking into consideration the touring time, the switching speed of the successive signal changeover switch 5, and the like. In FIG. 5, a low signal is applied to the second buffer amplifier 4-2. Buffer amplifiers 4-3 to 4-5 are one of the groups of buffer amplifiers that follow the leading current which is grounded. These are collectively brought into operation by a signal from an amplifier power on/off circuit 15-1 provided corresponding to the group. For example, a flip-flop is used as the amplifier Is on/off circuit. When a high (high; 1) signal is input to the S terminal, a low signal is output from the flip-flop, and the buffer amplifiers 4-3 to 4-5 are activated (that is, power is applied). , when a high signal is applied to the R terminal, it is rendered inactive (that is, the application of power is stopped). The reason why several buffer amplifiers are turned on and off by signals from the same amplifier power on/off circuit is as follows. Since the successive signal changeover switch 5 is turned on and off in sequence, it is preferable that the buffer amplifier 4 is also turned on and off in synchronization with it, since current consumption can be kept to the minimum necessary. In order to do so, it is necessary to provide an individual amplifier power supply on/off circuit for each buffer amplifier. However, this would complicate the circuit configuration. Therefore, several adjacent buffer amplifiers 4 are grouped together and turned on and off by one amplifier power on/off circuit. When a low active differential amplifier 14 is used,
It is always kept in an operating state by a signal from the ground llAl0. This is because the first two buffer amplifiers in the signal processing IC chip are always in operation, so the differential amplifier 14 that processes the signals from them must also be kept in operation at all times. . Although the first signal processing IC chip B has been described above, the same applies to the second and subsequent signal processing IC chips. In other words, the leading input buffer 4 of the second body symbol processing IC chip B2 is put into operation when the reading by the first body symbol processing IC chip B1 is about to end (that is, the second It may be possible to do this (see the previous section) when the turn of the signal processing IC chip Bz comes around, but in order to bring it into operation at such a point, is there any restriction for that? 11 circuits are required. Then, the second mouth habituation processing IC chip B! The configuration is partially different from the configuration of the first habituation processing IC chip B1. The same can be said for the third and subsequent cases. However, it is generally desired that all IC chips have the same circuit pattern from the manufacturing standpoint. Therefore, even in image reading devices, all signal processing I
The C chip has the same circuit pattern as the first signal processing IC chip B. Similarly to the first signal processing IC chip B, for example, the first two buffer amplifiers and the differential amplifier are supplied with power so that they are always in operation. Note that, as described above, the differential amplifier is provided for noise cancellation, and is not provided when there is no need for noise cancellation. [Problem to be Solved by the Invention] (Problem) The image reading device described above has a problem in that it consumes a large amount of current. (Explanation of the problem) As mentioned above, in the conventional image reading device, the first
For example, not only the number processing IC chip B but also all signal processing IC chips, the first two buffer amplifiers (
In FIG. 5, buffer amplifier 4-1. The buffer amplifier 4-2) is always kept in an operating state. If there is a differential amplifier for noise cancellation, it is also always in operation. Taking an A3 image reading device as an example, it is equipped with 74 signal processing IC chips, so a total of 2 x 74 buffer amplifiers and 74 differential amplifiers are always in operation. It turns out. However, when reading out an image at a certain point in time,
What is required to be in operation is one buffer amplifier 4 that corresponds to the specific photoelectric conversion element l whose intensity of light is to be detected, and the differential amplifier 14 to which it is connected. There are a total of 2 pieces. Considering that it takes some time (settling time) for the buffer amplifier 4 to become in a normal operating state after power is applied, even if the next buffer amplifier 4 is also left in the operating state, a total of 3 buffer amplifiers are required. It is. Therefore, in the past, a far greater number of buffer amplifiers and the like were kept in operation than they should be in operation, resulting in an unnecessarily large amount of current consumption. The present invention aims to solve the above-mentioned problems.

[Means to solve the problem]

In order to solve the above problems, the image reading device of the present invention includes:
In an image reading device including a photoelectric conversion element array and a plurality of signal processing IC chips for reading out the potential of the isometric capacitance of the photoelectric conversion element, Among the buffer amplifiers connected in the middle of each path for reading the potential of the capacitor, at least the first buffer amplifier of the first signal processing IC chip is always on, and the other buffer amplifiers are connected to the corresponding potential. We decided to turn them on and off sequentially so that they remain on during reading.

[For production]

Image reading starts from the charging conversion element at the head of the photoelectric conversion element array. Data is read from the photoelectric conversion element through a path to which the leading buffer amplifier of the first signal processing IC chip of the image reading device is connected. Since the first buffer amplifier is always on, when reading starts, the buffer amplifier immediately operates normally. The buffer amplifier in the first input processing IC chip, which is always on, and the buffer amplifiers in the second and subsequent signal processing IC chips are in a state where they can operate normally when their turn for reading comes. It is turned on until the reading is completed, and turned off when reading is completed. Therefore, the amount of current that must be constantly passed through the image reading device is significantly reduced compared to the prior art.

【Example】

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows an image reading device according to an embodiment of the present invention. In Fig. 1, the same numbers as in Fig. 4 refer to Fig. 4.
It corresponds to the one shown in the figure. and 19-1 to 19
-5 is an amplifier power supply second on/off circuit. The main difference in configuration from the conventional image reading device shown in FIG. The point is that the signal is given from the circuit (previously, the signal was given by grounding). That is, in FIG. 1, the amplifier power supply second on/off circuit 1
9-1.19-2 is the first signal processing IC chip B1
The first and second buffer amplifiers 4 are turned on and off, and the amplifier power supply second on/off circuit 19-3 turns on and off the power of the differential amplifier 14 of the first habituation processing IC chip Bt. Below, amplifier power supply second on/off circuit 19-4゜19-5
The configuration inside each signal processing IC chip is the same as that of the first input processing IC, such as turning on and off the power of the first buffer amplifier 4 and differential amplifier 14 of the second input processing IC chip B2. It has the same configuration as the chip Bt. FIG. 2 shows a detailed example of the amplifier power supply second on/off circuit. The second amplifier power on/off circuit 19 has a configuration in which a logic element 20 is connected to the set terminal (S terminal) of the amplifier power on/off circuit (flip-flop) 15-1 shown in FIG. One input terminal of the logic element 20 is used as a set terminal S. The other input terminal is branched in the middle and connected to resistor 2.
1 to the positive power supply, and also to the first chip designation terminal C. The reason why terminal C is named "1st chip designation" is that in the case of the 1st chip, the buffer amplifier at the beginning is always on, which is different from the case of other chips. This is because the input is given to this terminal. That is, in the amplifier power supply second on/off circuit 19 mounted on the first signal processing IC chip B1, a low input is applied to this terminal (specifically, it is grounded), and the second and subsequent signal processing In those mounted on an IC chip, low input is not applied (as described later, since low input is not applied, high is applied as a result). When a low (0) signal is output from the amplifier power supply second on/off circuit 19, the buffer amplifier 4 is turned on (activated), and when a high (1) signal is output, the buffer amplifier 4 is turned off (inactive). ). Next, the operation of the amplifier power supply second on/off circuit 19 will be explained. The buffer amplifier 4 is turned on when the first chip designation terminal C is set low (for example, by grounding, etc.) and when the first chip designation terminal C is high and the set terminal S
is when it is high. When the first chip designation terminal C is set low, the output of the logic element 20 becomes high, and the output of the amplifier power supply second on/off circuit 19 becomes low. If the first chip designation terminal C is not set low (not grounded), a high signal is input from the positive power supply via the resistor 21. At this time, set terminal S
When a higher level is input, the output of the logic element 20 becomes high. Therefore, the output of the amplifier power supply second on/off circuit 19 is also low. The buffer amplifier 4 is turned off by the reset terminal R.
This is when a higher level is input. This is because at this time, the output of the amplifier power supply second on/off circuit 19 becomes high. A second amplifier power supply on/off circuit that operates as described above is provided for the first and second buffer amplifiers 4 and differential amplifiers 14 of each signal processing IC chip. The first chip designating terminals C of the amplifier power supply second on/off circuits 19-1 to 19-3 mounted on the first signal processing IC chip B are grounded via the ground wire 10 and the ground terminal 17. Therefore, the first to second buffer amplifiers 4 and differential amplifiers 14 of the first signal processing IC chip B1 are always turned on. This allows normal operation no matter when reading is started. Ground terminal 17 after No. 2 signal processing IC chip B2
is left open (not grounded). As a result, as explained with reference to FIG. 2, a high voltage is input from the positive power supply through the resistor 21 to the input terminal of the logic element 20 to which the first chip designation terminal C is connected. Therefore, the output of the amplifier power supply second on/off circuit mounted on the second and subsequent signal processing IC chips depends on the inputs to the set terminal S and the reset terminal R. Set terminal S of the amplifier power supply second on/off circuit (19-1, 19-4 in Figure 1) at the beginning of each signal processing IC chip
is connected to the scanning circuit start signal input terminal 16. When a start signal is input from the scanning circuit start signal input terminal 16 of the first signal processing IC chip B, the scanning circuit 9 starts operating. The scanning circuit 9 is composed of, for example, a shift register, and includes a reset switch 3. Successive signal changeover switch 5, amplifier power supply second on/off circuit 1
Sequentially output to 9-1 etc. The start signal also enters the set terminal S of the amplifier power supply second on/off circuit 19-1, but since the first chip designation terminal C is grounded, the first buffer amplifier 4 is already turned on. The buffer amplifiers that follow the buffer amplifier that is turned on by the first chip designation terminal and C ground are conventionally (
Similarly to Fig. 4), amplifier power on/off times 115-1 to 1
It is turned on and off by 5-n. A signal is output from the scanning circuit 9 to the next chip start signal terminal 18 shortly before the reading by the first acclimation processing IC chip B1 is completely completed. This signal is the second
Number customization processing IC chip B. The signal is input to the scanning circuit start signal input terminal 16 of . The next chip start signal is input to the scanning circuit 9 of the next chip, and the amplifier power supply second on/off circuit 19-4 (
input to the set terminal S of the first buffer amplifier),
Furthermore, it is also input to the set terminal S of the amplifier power supply second on/off circuit 19-5 (for the differential amplifier 14). Since the first chip designation terminal C of the amplifier power supply second on/off circuit 19-4 is not grounded (the ground terminal 17 of the second signal processing IC chip B2 is open), when the input is input to the set terminal S. For the first time, the corresponding buffer amplifier 4 is turned on and waits for its turn to read. The differential amplifier 14 also has an amplifier power supply second on/off circuit 19-5.
It is also turned on by . The subsequent buffer amplifiers 4 are also sequentially turned on and off by signals from the scanning circuit 9. In other words, only the first two buffer amplifiers 4 and the differential amplifier 14 in the first habituation processing IC chip B1 are constantly supplied with current. As described above, the current consumption is significantly reduced compared to the conventional system in which current is constantly supplied to at least the leading buffer amplifier of all signal processing IC chips. In addition, although FIG. 1 shows an example in which the first to second buffer amplifiers among the plurality of buffer amplifiers of the first run-in processing IC chip B1 are always on, the settling time If the buffer amplifier is short, the buffer amplifier can quickly return to a state where it can operate normally, so only the first buffer amplifier may be turned on all the time. In addition, in FIG. 1, in order to cancel the noise caused by the reset switch 3, a dummy switch 12 and a dummy capacitor 13. Although a differential amplifier 14 is provided, these are not essential components for the present invention.If you do not mind some noise being mixed into the readout output, the first signal processing IC chip B It is only necessary to keep at least the first buffer amplifier of , on all the time.

【Effect of the invention】

As described above, according to the image reading device of the present invention, the first signal processing IC among the plurality of signal processing IC chips
Only the buffer amplifiers in the readout path at least at the beginning of the chip are kept in an operating state at all times, but the buffer amplifiers in the subsequent paths are turned on and off according to the order of readout, so that the image reading device is always connected to the buffer amplifiers. The amount of current that must be passed has been significantly reduced compared to conventional methods.

[Brief explanation of the drawing]

Fig. 1: Image reading device according to an embodiment of the present invention Fig. 2: Detailed example of the amplifier power supply second on/off circuit Fig. 3: Fig. 4 showing an overview of the image reading device・Image reading device which is the basis of the present invention FIG. 5 In the diagram explaining the on/off of the buffer amplifier in FIG. 4, 1 is a charging conversion element, 2 is an equivalent capacitance, 3 is a reset switch, and 4 is a buffer amplifier, 5 is a continuous signal changeover switch, 6 is a negative power supply, 7 is a reset line, 8 is a common output line, 9 is a scanning circuit, 10 is a ground line, 11 is an output terminal, 12 is a dummy switch, 13 is a Dummy capacitor, 14 is a differential amplifier, 15 is an amplifier power supply on/off circuit, 16 is a scanning circuit start signal input terminal, 17 is a ground terminal, 1st is a next chip start signal terminal, 19 is a second amplifier power supply on/off circuit, 20 is a logic element, and 21 is a resistor.

Claims (1)

[Claims] In an image reading device that includes a photoelectric conversion element array and a plurality of signal processing IC chips for reading out the potential of the equivalent capacitance of the photoelectric conversion element, Among the buffer amplifiers connected in the middle of each potential reading path, at least the first buffer amplifier of the first signal processing IC chip is always on, and the other buffer amplifiers are turned on when reading the corresponding potential. An image reading device characterized in that it turns on and off sequentially so that it remains on.