JPH0246881B2 - TEIKOBURITSU JINOHENDORYONOHYOJISOCHI - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a device for detecting and digitally displaying the amount of variation in a resistance bridge used in, for example, a load cell.

<Prior Art> In recent years, the use of load cells as load measuring devices has been developing, and digital display of the amount of variation thereof has been increasingly used.

FIG. 6 shows a conventional example of such a device. Of the four sides constituting the bridge circuit 1, A and B are variable resistances, such as load cells, and usually have the same resistance value R. In the case of a load cell, when a load is applied, for example, A becomes R(1-K),
B becomes R(1+K). C and D are standard resistances,
The resistance values are equal for both C and D, for example, R. A DC voltage 4 is applied between two connection points a and b of the bridge circuit, and a potential between two other connection points c and d is inputted to an amplifier 5 via a resistor 3. Note that the parallel circuit of the resistor 6 and the capacitor 7 determines the amplification degree of the amplifier 5, and serves as a filter for delaying the output response and removing the influence of noise. The output of the amplifier 5 is converted into a digital signal by an A-D converter 8, passed through an arithmetic circuit 9, and displayed on a digital display device 10.

<Problems to be Solved by the Invention> By the way, when measuring load with a load cell, it is necessary to measure minute changes of about 1/1000 of the resistance bridge circuit with high precision, and therefore it is necessary to supply current to the bridge circuit. It is necessary to use highly stable elements for the power supply to do this, the amplifier to amplify the output, and the resistors in each part.

In other words, in the conventional example shown in Fig. 6, the change in resistance value of elements A and B of the bridge circuit can only be expected to be about 1/1000 at most.
At 10V, the input signal of the amplifier 5 is only about 10 to 30mV, and in order to stably amplify this and display it digitally, the stability of the voltage source 4 must be sufficiently high, and the amplification degree of the amplifier 5 must be stable. In addition, it is strictly required to have good linearity, have a sufficiently small drift, and have a sufficiently small temperature change in the resistance values of standard resistors C, D, resistors 3, 6, etc. The problem is that the A-D converter 8 also needs to be of a certain degree of precision, making it extremely expensive.

The present invention has been made in view of these points, and is capable of accurately detecting and digitally displaying the amount of variation in a resistance bridge without using a highly stable circuit element and with a simple circuit configuration. The purpose is to provide equipment.

<Means for Solving the Problems> A configuration for achieving the above object will be explained with reference to the basic conceptual diagram shown in FIG. 1. In the present invention, a first direct current (I ₁ ), a second power supply C outputs a second DC current (I ₂ ) having a constant ratio to this first DC current (I ₁ ), and A switching element D is provided for chopping the DC current (I ₂ ).

In addition, there is an output voltage averaging amplifier circuit E which inputs the output voltage of the resistor bridge, amplifies it while compensating the phase, and detects the average voltage _E0 , and the magnitude of the output of this output voltage averaging amplifier circuit E. A pulse generation circuit is provided for generating a constant period pulse signal having a proportional pulse width.

Furthermore, a switching drive circuit drives the switching elements to open and close in synchronization with the pulse signal from the pulse generation circuit, a clock counting circuit 4 that counts the clock pulses passing within the pulse width of the same pulse signal, and the counting result. A digital display will be provided to display the information.

Then, a pulse current obtained by chopping the second DC current (I ₂ ) described above is fed back to the resistance bridge in a direction that cancels out the output voltage due to the unbalance, and the digital display shows the pulse current. The configuration is such that a value corresponding to the pulse width of is displayed as the amount of variation in resistance fluctuation.

<Function> When a resistance value change occurs in the resistor bridge, resulting in an unbalanced state, in addition to the direct current (I 1 ) from the first power source, the resistor bridge receives a direct current (I ₁ ) from the first power source, which also flows in a direction that cancels out the output voltage due to this unbalance. A pulsed current flows.

The output voltage of the resistor bridge maintains the 0 level as shown in Fig. 2 1 in an equilibrium state with no change in resistance value, but in an unbalanced state, the output voltage increases as shown in Figs. 2 and 3 due to the above-mentioned pulse current. In response to the period of this pulse current, an alternating current voltage is created in which a voltage E _f in the direction due to the original unbalance (due to I ₁ ) and a voltage E _p in the opposite direction appear alternately. By amplifying and averaging this voltage while compensating its phase, and controlling the opening and closing of the switching element using a pulse signal with a pulse width proportional to the magnitude of the average voltage E ₀ , the average voltage E ₀ is always 0. At the same time, the pulse width XT of the pulse current becomes proportional to the original unbalanced voltage E _f described above.

By displaying the calculation result of the clock counting circuit CH, which is equivalent to the measured value of the pulse width XT, on the digital display, the appearance is the same as measuring the amount of fluctuation based on the zero method, and the result is a measurement of the fluctuation amount including resistance bridges. It is possible to perform highly accurate measurements without using highly stable circuit elements in the ID backloop.

Here, it should be noted that in the present invention, the resistance bridge itself does not maintain an equilibrium state as in the zero-level method, but instead maintains its original unbalanced state (output E _f state) and the opposite unbalanced state (output E _p state), thereby maintaining the balanced state of the measurement system as a whole. Due to this feature, there is no need to perform linear adjustment of the resistance value or continuous adjustment of the current value as described later in order to balance the resistance bridge itself, and there is a means to digitize the amount of adjustment. There is an advantage that the amount of fluctuation can be digitally displayed by the simple operation of measuring time in the reverse unbalanced state described above without providing a separate device.

When applying the principle of the zero-order method to measuring the amount of variation in a resistance bridge, that is, when configuring a feedback loop that includes a resistance bridge and measuring the amount of variation, the basic In other words, the resistance value of the resistor bridge is automatically adjusted and the adjusted amount is used as the measured value, or even further, in response to the unbalanced amount, the resistance value is adjusted in the opposite direction to the first DC current (I ₁ ) referred to in this application. It is conceivable to automatically adjust the magnitude of the DC current and use the amount of adjustment as the measured value.

If such a zero-level method is simply applied, a means to digitize the measured value will be required separately outside the feedback system, and the resistance value or the magnitude of the DC current will be changed according to the change in the resistance value of the resistor bridge. This requires an adjustment element to continuously change the value, and it is difficult to simplify the circuit.

In the present invention, due to the above-mentioned features, the problems caused by mere application of the zero-order method are eliminated, and the intended purpose is achieved.

<Example> FIG. 3 is a circuit configuration diagram of an embodiment of the present invention.

Resistor bridge 1 constituted by resistors A, B, C and D has a contact point between resistors A and B and a contact point between resistors C and D.
from the first power supply 11 to the resistor R ₁ through the contacts between
A first DC current I ₁ is supplied through the resistor R 1 , and the current value is detected from both ends of the resistor R ₁ . operational amplifiers 13, 14, field effect transistors 15, 16 controlled by the operational amplifier outputs, resistor _R2 ,
and power supply 19 constitute a second power supply, and switch 1
When 2 is closed (the state shown), a second direct current I ₂ is supplied to the bridge 1 through the contacts between the resistors B and C and the contacts between D and A. That is, the resistor bridge 1 is supplied with a pulsed current in addition to the first DC current _I1 .

This second direct current I ₂ is proportional to the first direct current I ₁ and is controlled so that the switch 12 remains open even when the resistance change rate K of the bridge reaches its maximum. In the embodiment, operational amplifier 1
3 and 14 are controlled so that the potentials at both terminals of resistors R ₁ and R ₂ are equal, and the relationship I ₁ R ₁ =I ₂ R ₂ is established. The values of resistors R ₁ and R ₂ are, for example, R ₁ = 200
Ω, R ₂ =200KΩ.

The amplification degree of the amplifier 5 is extremely high, and together with the resistor 6 and the capacitor 7, it has the same function as the conventional device shown in FIG. Amplifier 20, resistor 2
1 and capacitor 22 primarily functions as an integrator, and also functions as an amplifier. These amplifier 5, resistor 6, capacitor 7, amplifier 20, resistor 21 and capacitor 2
2 amplifies and averages the output voltage of the resistor bridge 1 while performing phase compensation, as will be described later.

A constant current source 24, a capacitor 26, and a reset transistor 2 that short-circuits the capacitor terminals.
5 generates a sawtooth wave as shown at a in FIG. 4D. The comparator 23 is the amplifier 20
When the output level of is higher than the sawtooth wave level, an H level is output. This sawtooth wave generating circuit and the comparator 23 constitute a pulse generating circuit that generates a pulse signal having a pulse width proportional to the average value of the output voltage of the resistor bridge 1.

The clock pulse oscillator 28 continuously generates clock pulses with a predetermined period as shown in FIG.
The reset signal generating circuit 30 turns on the transistor 25 at fixed time intervals T. Therefore, the period T of the pulse signal from the pulse generating circuit described above is constant.

The switching drive circuit 31 is a comparator 23
The switch 12 is closed when the output is at the H level, and the switch 12 is opened when the output is at the L level.
AND gate 32 outputs H from comparator 23.
Pass the clock pulse only when the level is reached. The counter 33 counts the output clock pulses of the AND gate 32, and the latch circuit 34 temporarily holds this count value, which is displayed on the digital display 10.

With this circuit configuration, the period T is
A second current is applied to cancel the output of bridge 1 for a time XT. Therefore, if the system is configured so that the switch closes for a long time when the resistance change of the bridge 1 increases, the system as a whole becomes a negative feedback circuit. Therefore, in order for the system to be stable, the time constant determined by the resistor 6, capacitor 7, resistor 21, and capacitor 22 and the reset period T must be selected so as to satisfy the stability conditions for the feedback circuit. .

That is, the frequency-amplification characteristics and phase characteristics of the circuit including the filter (amplification circuit) consisting of the amplifier 5, resistor 6, and capacitor 7, and the integrator consisting of the amplifier 20, resistor 21, and capacitor 22 are correlated with each other. , and the closed-loop amplification is 1
In all the above frequency ranges, the phase of output b is
Unless the deviation from the switching phase of the switch 12 is within a predetermined range, at least within 180°, the system cannot be kept stable. This will also affect the temperature characteristics. Moreover, this frequency-amplification characteristic is determined by the switch 12 as shown below.
This also becomes a limiting factor for the switching frequency (period T) of the switching frequency, and it is necessary to determine the above-mentioned time constant so as to satisfy these and provide a phase compensation function. This phase compensation function, together with the integration operation of the integration circuit, reduces the switch 12 generated at the input of the amplifier 5.
compresses high frequency components due to pulsations caused by switching operations. In other words, the input of amplifier 5 is
As shown in the figure, it is a square wave with a period T, but if each of the above-mentioned time constants is sufficiently larger than the period T, the input b of the comparator 23 becomes an integrated wave,
It consists almost only of DC components and is proportional to the average value of the output voltage of the resistor bridge 1. Note that an auxiliary low-pass filter may be added if necessary.

In this way, if the time constant of the integrator circuit or filter is sufficiently large compared to the period T, and the amplification degree of the amplifier 5 is sufficiently large, the output of the bridge 1 is averaged to zero due to the negative feedback effect, and each The circuit stabilizes at equilibrium. At the same time, the phase compensation function is performed by the phase characteristics of the amplifier circuit including the amplifier 5 and the integrating circuit including the amplifier 20, and in the end, when the system is stabilized with negative feedback,
The amount of feedback will be proportional to XT in Figure 2. That is, as mentioned above, if the amplification degree of the amplifier 5 is sufficiently large, and therefore the amplification degree of the system is sufficiently large in the low frequency region, the amount of feedback is approximately proportional to the input, and XT is proportional to the output b.

FIG. 4 shows voltage waveforms at various parts of the embodiment shown in FIG. Figure A is the output waveform of the bridge 1 shown in Figure 2, Figure B is the output waveform of the clock pulse oscillator 28, Figure C is the output waveform of the reset signal generation circuit 30, and Figure D is input to the input terminal a of the comparator 23. The sawtooth waveform and the output of the amplifier 20 input to the input terminal b, that is, the square output waveform of the bridge shown in Figure A are averaged and amplified by the integrating circuit, and Figure E shows the output waveform of the comparator 23. Figure F shows the output waveform of the AND gate 32. That is, the count value of the counter 33 is proportional to the time XT during which the switch 12 is closed.

Next, the resistance variation rate K of bridge 1 and switch 1
Consider the relationship between the time ratio X when 2 is closed. The resistance values of resistors A and C change to R(1+K), and the resistance values of resistors B,
Assume that the resistance value of D changes to R(1-K),
Let I ₁ and I ₂ be the current values flowing from the first and second power supplies to the bridge circuit. The output of the bridge, that is, the input voltage E _f to the amplifier 5 when the switch 12 is open, is E _f =I ₁ RK ...(1), and the voltage _P when the switch 12 is closed is E _P = I ₁ RK−I ₂ R ……(2). Furthermore, if the time during which the switch 12 is closed in the period T is XT, then the time during which the switch 12 is open is (1-X)T. Therefore,
If the opening and closing of switch 12 is controlled so that the average value E ₀ of the bridge's square wave output becomes 0, I ₁ RK (1 - K) T + (I ₁ RK - I ₂ R) XT = 0... (3) Solving this, we get K=I _{2 / I 1}
It will be understood that the time ratio X that the switch 12 is closed is proportional to the change K in the bridge resistance. Therefore, the resistance change rate K can be determined by measuring the time XT.

FIG. 5 shows a modified embodiment of the amplifier circuit section of the present invention. This embodiment takes into consideration the influence of drift in the amplifier circuit. Unless the amplifier 5 is one with a particularly small amount of drift, an automatic offset adjustment circuit may be used when a normal element is used. For this purpose, switches 39 and 40, resistors 41 and 44, and a capacitor 42 are added. This makes it possible to eliminate the influence of drift in the amplifier circuit section. Here, the switch 39 has three interlocking contacts 39a, 39
b, 39c, and the switch 40 is interlocked with 2
It consists of two contacts 40a and 40b. Normally, when switch 39 is closed and switch 40 is open, at appropriate time intervals, when switch 39 is opened and switch 40 is closed, the output of amplifier 5 charges capacitor 42 via resistor 41, and the voltage at the terminals of capacitor 42 is The signal is amplified by the amplifier 43 and fed back negatively to the amplifier 5, so that the output of the amplifier 5 can be maintained at a small value approximately equal to the offset voltage of the amplifier 43. however,
In this case, the automatic offset adjustment works when the output of the amplifier 5 becomes almost zero, unlike in the case of the known double integration type A-D conversion, where the automatic offset adjustment works when the output of the amplifier 5 becomes almost zero. Since it is necessary to perform the offset adjustment in a state where the counter 8 is in a state where the main feedback loop from the comparator 23 to the switch 12 and the bridge 1 is disconnected, the automatic offset adjustment can be performed at an appropriate timing, for example, before or after the counter 8 performs counting. Sometimes it is necessary to provide

Furthermore, when such a circuit is adopted, when trying to measure the rate of change of the bridge with high resolution,
Increase the frequency of the clock pulse oscillator 28 or
It is necessary to increase the period T of the reset signal.
However, since there is a limit to increasing the oscillation frequency, the period T must be increased, and accordingly, the time constant of the resistor 6 and the capacitor 7 and the resistor 2
1 and the time constant of capacitor 22 must also be increased. As one means to avoid this, the response can be increased by increasing the amplification degree of the main feedback circuit only when the change in the output of the amplifier 5 becomes large. For this purpose, a diode 45 is connected in parallel with the resistor 21.
a, 45b, resistors 46, 48 and capacitor 47
The illustrated circuit consisting of may also be added. By adding such a circuit, when the output of the amplifier 5 changes beyond the level at which the diode 45a or 45b becomes conductive, it means that the resistor 48 has been inserted in parallel with the resistor 21, and the gain of the system increases. The resistor 46 and the capacitor 47 constitute a differentiating circuit, which prevents the system from becoming oscillatory when the gain increases.

<Effects of the Invention> As explained above, according to the present invention, the second DC current I ₂ having a constant ratio with respect to the first DC current I ₁ flowing through the resistance bridge is stepped and made into a pulse. By flowing this pulse current in a direction that cancels out the output voltage E _f due to the unbalance of the resistor bridge, E _f and a voltage E _P in the opposite direction to E _f are alternately generated, and the alternating current output voltage is is amplified and averaged while compensating the phase, and the pulse width of the above-mentioned pulse current is controlled so that the average E ₀ becomes 0, and the clock pulse count value corresponding to this pulse width is digitally converted into a fluctuation measurement value. Since it is configured to display, although the resistance bridge itself does not maintain an equilibrium state when a load is applied, the system as a whole maintains an apparent equilibrium state and obtains the same effect as measurement based on the zero position method. I ₁ /
If I ₂ is constant, highly accurate measurements can be made without using highly stable circuit elements compared to conventional devices.

In addition, compared to applying the original zero-level method to measuring the amount of variation in a resistance bridge, there is no need for an adjustment element to change the resistance value or current value itself according to the output voltage. without providing a separate circuit means for digitizing the
The second DC current I ₂ is a feedback control operation.
Since digitization is achieved using the chopping operation of the circuit, the circuit configuration can be simplified.

[Brief explanation of drawings]

Figure 1 is a basic conceptual diagram showing the configuration of the present invention;
The figure is an explanatory diagram of its operation, FIG. 3 is a circuit configuration diagram of an embodiment of the present invention, FIG. 4 is an explanatory diagram of signal waveforms of each part, and FIG. 5 is an amplifier circuit section of another embodiment of the present invention. FIG. 6 is a block diagram showing an example of the configuration of a conventional device. 1...Resistance bridge, 5, 20...Amplifier,
6,21...Resistor, 7,22...Capacitor, 1
0... Digital display, 11... First power supply, 1
2...Switch, 19...Second power supply, 23...
Comparator, 27...Pulse generation circuit, 28...
...Clock pulse oscillator, 29... Frequency division circuit, 3
0... Reset signal generation circuit, 31... Switching drive circuit, 32... AND gate, 33...
counter.

Claims (1)

[Claims] 1 A first power source that supplies a first DC current to a resistor bridge, a second power source that outputs a second DC current that has a certain ratio to this first DC current, and a second DC current that an output voltage averaging amplifier circuit that inputs the output voltage of the resistor bridge, amplifies it while compensating the phase, and detects the average voltage; a pulse generation circuit that generates a constant period pulse signal with a pulse width proportional to the pulse width; a switching drive circuit that drives the switching element to open and close in synchronization with the pulse signal; A clock counting circuit for counting clock pulses and a digital display for displaying the counting results are provided, and a pulse current generated by chopping the second DC current in a direction to cancel the output voltage due to the unbalance is applied to the resistor bridge. A resistance bridge variation display device configured to receive feedback and display a value corresponding to the pulse width of the pulse current as a variation amount of the resistance bridge on the digital display.