JPH0244749A - Dielectric isolation substrate and manufacture thereof - Google Patents

Abstract

PURPOSE:To so deposit a polycrystalline Si film that the polished face becomes flat by depositing a polycrystalline film in which the sizes of crystalline grains are substantially uniform and crystal orientation and shape are not directed in specific directions on a semiconductor substrate formed with grooves. CONSTITUTION:Isolating grooves 2 are formed on an Si single crystal substrate 1 having an N-type plane (100), and an SiO2 film 3 is formed by steam oxidation. A polycrystalline Si film 4 is deposited by a chemical vapor growth method. In this case, high concentration material gas is used to deposit fine particles generated in the gas above the substrate are deposited on the board in a reaction vessel, and the gaps of the particles are filled with Si grown by the surface reaction. Thus, homogeneous polycrystalline Si is grown on the flat face and in the grooves. Thus, the grooves are filled with the polycrystalline layer in which the shape and direction of the grains are not directed in specific directions thereby to improve the flatness of the polished face of the surface of the layer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a dielectric isolation substrate and a method for manufacturing the same, and particularly to a method for producing a dielectric isolation substrate with a large diameter and low curvature.

[Conventional technology]

As a method for manufacturing a dielectric isolation substrate, a single crystal support method in which single crystal Si is used as a support and bonded together is conventionally known.

Methods for manufacturing single-crystal support type dielectric isolation substrates are roughly divided into two with respect to the formation of isolation grooves between elements. There are two methods: a method in which an isolation groove between elements is formed and then bonded to a support; and a method in which an isolation groove is formed after bonding to a support. Hereinafter, the former will be referred to as the optical separation method, and the latter will be referred to as the post-separation method.

For information related to the optical separation method, see Japanese Patent Application Laid-Open No. 61-29.
No. 2934, and JP-A No. 62 for those related to the post-separation method.
-226640, JP-A No. 62-229855, etc.

[Problem to be solved by the invention]

In the above-mentioned conventional technology, the post-separation method allows easy bonding of the semiconductor substrate and the support, and has high bonding yield and bonding strength reliability. There is a drawback that it decreases.

On the other hand, in the optical separation method, the groove width on the substrate surface can be narrowed and the degree of integration is high, but the bonding between the substrate and the support body whose grooves are filled with polycrystalline has problems in yield, bonding strength, and reliability. this is,
No consideration was given to the uniformity of the polycrystalline Si filling the isolation trench, and depending on the shape of the isolation trench, the polycrystalline Si
This is because the flatness of the polished surface of i is poor. The flatness of the polished surface will be explained using FIG. 2. FIG. 2 shows a cross-sectional view of a part of the optical separation method process. FIG. 2(a) shows a state in which a groove 2 is formed in a semiconductor substrate 1, an insulating film 3 is formed on the surface, and polycrystalline Si4 is further deposited.

FIG. 2(b) shows the polished surface of polycrystalline Si4. When polycrystalline Si4 is deposited by a normal thermal CVD method, growth nuclei are first generated on the substrate surface, and crystal grains grow from these nuclei in an inverted conical shape in a direction perpendicular to the deposition surface. Therefore, the crystal grain size of the polycrystalline Si layer increases as it goes in the thickness direction.

Further, 1. In the normal thermal CVD method, the deposited film has some kind of orientation. For example, a film deposited at a substrate temperature of 1200'C using 1-lichlorosilane as a source gas is strongly oriented in the (110) direction. In addition, since the growth rate of crystal grains differs depending on the plane orientation, the orientation changes depending on the film thickness.
Since the inner surface of the semiconductor substrate 1 and the original surface 5 of the semiconductor substrate 1 are inclined with respect to each other, the orientation of the deposited polycrystalline Si differs between the surface regions.

That is, the polished surface 6 shown in FIG. 2(b) is a surface obtained by polishing polycrystalline Si4 having non-uniform crystal grain size and orientation.

Furthermore, the processing speed when polishing a semiconductor material depends on the crystal grain size and surface orientation. (For example, it is known that when Si is polished with an alkaline polishing liquid, the processing speed of the (111) plane is slower than that of other planes.) For this reason, as shown in Fig. 2 (
On the polished surface in b), a step is created between the top of the groove 2 and the original surface 6 of the semiconductor substrate 1. According to experiments conducted by the present inventors, it was observed that when the groove depth was 50 μm, a level difference of about 600 at most occurred.

SUMMARY OF THE INVENTION An object of the present invention is to provide a dielectric isolation substrate with excellent yield and reliability by depositing a polycrystalline Si film so that the polished surface is flat, and a method for manufacturing the same.

[Means to solve the problem]

The above object is achieved by depositing a polycrystalline film in which the crystal grain size is substantially uniform and the crystal orientation and shape are not oriented in a particular direction on a semiconductor substrate in which grooves are formed. Specifically, fine particles are deposited on a substrate by vapor phase growth using a highly concentrated reactive gas, and the area around the fine particles on the substrate is filled with a surface reaction.

[Function] According to the present invention, non-oriented fine particles are deposited on the substrate, and at the same time, they are filled with crystal growth of the deposited fine particles, which prevents polycrystals from growing oriented in a columnar manner. can be prevented.

This effect will be explained using FIG. 6. Figure 6 shows
FIG. 2 is a cross-sectional view of a polycrystalline film obtained by a conventional method and the present invention. FIG. 6(a) shows the substrate 1 formed by the conventional thermal CVD method.
The polycrystalline Si film 4 deposited thereon is shown, and as outlined, the crystal grains 21 grow perpendicularly to the substrate 1 in an inverted conical shape and are oriented in the (110) direction 50. In contrast, in the present invention.

It is generated in a space away from the substrate as shown in FIG. 6(b).

Since the crystal grains 21 grow using the fine particles 10 dropped in a non-oriented manner onto the surface of the substrate 1 as nuclei, not only the fine particles but also the entire film becomes a non-oriented film as shown in FIG. 6(Q). Furthermore, since the growth of crystal grains is blocked by fine particles falling one after another, the grain size does not increase and remains almost constant even if the film is thickened.

Therefore, even if a film is deposited on a substrate with separation grooves formed therein, a homogeneous polycrystalline film with no difference in crystal grain size and orientation between the element height portion and the groove portion can be obtained. As a result, when polishing is performed, the flatness of the polished surface is dramatically improved.

In conventional vapor phase growth techniques, it has been common to cause raw material gases to react on the surface of a substrate to grow polycrystals or single crystals. For this reason, fine particles generated in the gas phase that fall and accumulate on the substrate surface can only be seen as foreign matter. Particularly in the epitaxial process for forming the active region of a device, this has been a cause of defects that significantly impair device characteristics. However, this does not pose a problem when the vapor-deposited layer is used as a part of the support as in the present invention. On the other hand, by dramatically increasing the concentration of the raw material gas from the conventional 1 to 2% to several tens of percent, there is an advantage that high-speed deposition can be achieved.

In addition to the polycrystalline material of the present invention, non-oriented materials include
An amorphous material can be considered, but it is impractical because its deposition speed is low and it shrinks during heat treatment in the subsequent element formation process, causing the substrate to curve.

〔Example〕

An embodiment of the present invention will be described below using cross-sectional views of each step shown in FIG. First, Fig. 1(a) shows a state in which a separation groove 2 is formed in a Si single crystal substrate 1 with an n-type (100) plane and a diameter of 6''', and a SiOz film 3 with a thickness of 2 μm is formed by steam oxidation. FIG. 1(b) shows a state in which a polycrystalline Si film 4 is deposited by chemical vapor deposition (CVD), which is one of the vapor phase growth methods.The deposition conditions for the polycrystalline Si film 4 are as follows.
Substrate temperature is 1100℃, source gas is 20% H2 base
The concentration of SiH4 gas was set to 1. Since a highly concentrated raw material gas is used, fine particles generated in the gas phase above the substrate in the reaction vessel are deposited on the substrate surface, and gaps between the fine particles are filled with Si grown by surface reaction. Therefore, homogeneous polycrystalline Si grows both on the plane and within the groove. M observation using an electron microscope showed that the fine particles had a particle size of about 0.1 μm.

The deposition rate is 10 μm/min. Note that when the raw material gas concentration at the time of deposition is 10% or less, the amount of fine particles is small, and the above-mentioned effects tend to decrease. Moreover, when the content exceeds 30%, the filling between the fine particles becomes insufficient, and mechanical strength tends to decrease. FIG. 1(c) shows the deposited polycrystalline Si film 4.
This shows the polished and flattened state. For polishing, a polishing liquid prepared by mixing a KOH-based aqueous solution of pHIO with 0.3 μm silica powder and a suede-type polishing puff were used. Since the quality of the polycrystalline Si film 4 is not different between the plane 5 and the groove 2, the flatness of the polished surface 6 is 50 Å or less, which is the sensitivity of the stylus meter. FIG. 1(d) shows that the single crystal S
It shows the state in which it is joined to the support body 7 of i. The bonding is performed by a direct bonding method in which the two are brought into close contact and heated to 1200° C. in an oxygen atmosphere. Because the flatness of the bonding surface was improved, it was confirmed by ultrasonic flaw detection and an infrared transmission microscope that the bonding was complete except for 2 mm around the substrate. FIG. 1(e) shows a state in which the bonded substrate 1 is polished until the bottom of the separation groove 2 is exposed, and the single crystal is separated into a plurality of islands. Thereafter, elements were formed on the single crystal islands by oxidation, diffusion, etc., but no abnormalities such as peeling of the bonding surface were observed during this process. Further, the bending height is 120 μm. As a result of R observation of the bonding surface with an electron microscope, it was found that the space between the polycrystalline layer 4 and the support body 7 was completely filled and bonded with an oxide film of about 100 layers.

FIG. 3 is a schematic diagram of a deposition apparatus for polycrystalline Si film 4 used in the above embodiment. The substrate 1 with the grooves 2 and the insulating film 3 formed thereon is placed on a SiC-coated carbon susceptor 14 and heated to 1100° C. by a high frequency induction heating device 15. H2
A base 20% monosilane raw material gas 11 is introduced into the reactor 13 at a flow rate of 50Q per minute. Highly concentrated raw material gas
When introduced into the high-temperature reactor 13, a portion of the substrate begins to react in the gas phase above the substrate, and Si fine particles 10 are generated.

The fine particles 10 are deposited on the substrate 1, and the spaces between the particles are filled with Si produced by a reaction on the substrate surface, forming a polycrystalline Si film 4.

In the above embodiments, SiH4 was used as the raw material gas, but other silane-based or glorosilane-based gases may be used without detracting from the spirit of the present invention.

Further, when depositing polycrystalline Si, it is not necessary to always keep the raw material gas concentration high. -Depending on the conditions of gas flow rate, fine particles generated by introducing high concentration gas may
It floats for several minutes.

For this reason, a high concentration gas may be introduced in the initial stage of deposition or in repeated pulses, and at other times, a reactive gas may be supplied in the same manner as in normal CVD.

It is also possible to control the amount of fine particles generated by introducing a small amount of impurity gas into the raw material gas at the beginning of the reaction. For example, when a trace amount of nitrous oxide NZ○ or carbon dioxide CO2 gas of several mol % or less is introduced, fine particles of 5IOX are generated. The resulting polycrystalline film becomes a dense film.

Furthermore, the quality of the polycrystalline film can be controlled by controlling the temperature of the reaction gas by adjusting the substrate surface temperature and the supply amount during deposition of the polycrystalline film. For example, the fourth
Figure (a) shows a film deposited by lowering the substrate temperature to 740 to 860°C and initially adding 0.1% NzO to SiH4 as a reaction gas, in which fine SiOx particles 10 are contained in ultrafine polycrystals 20. It will look like it is buried. Figure 4(b) shows that the substrate temperature is as high as 1200'C and the deposition rate is 14~18'C.
The film was deposited with a size of μm/min, and although the surface roughness before polishing is large, mosaic-like relatively large crystal grains 21 grow with fine particles precipitated and deposited in the vapor phase as nuclei. ing. Since the crystal grains grow using fine particles that have fallen in a non-oriented manner as nuclei, the crystal grains also become non-oriented.

In addition to controlling the reaction temperature and gas concentration as described above, and adding impurity gases, methods for creating a difference in reaction conditions between the space where fine particles are generated and the substrate surface include electromagnetic stimulation such as light or plasma in the gas phase. There is a method of generating precipitation in the gas phase by irradiating energy. Below, as other embodiments of the present invention, optical CV
The deposition method using the D method will be explained with reference to FIG. The substrate 1 with grooves formed thereon is placed on the susceptor 14, and heated by the heating device 15.
Heat to 100°C. Monosilane gas 11 with a concentration of 4% is introduced into the reactor 13, and high-intensity excitation light 31 from a gas laser is irradiated through the optical window 30. In the irradiation region, the raw material gas reacts and fine particles 10 are generated. Board 1
These fine particles of 1° are deposited, and the spaces between the particles are filled with Si produced by a reaction on the substrate surface to form a polycrystalline film 4.

The crystallinity of the resulting polycrystalline film can be controlled by excitation conditions such as excitation position, excitation intensity, and excitation frequency.

In addition, in order to more precisely control the generation of fine particles and the growth of crystal grains due to surface reactions, a furnace for generating fine particles was installed separately from the reactor in which deposition was performed on the substrate, and both were connected by a pipe. Also good.

Further, for bonding to the support after polishing, not only the direct bonding method but also the anodic bonding method can be applied.

〔Effect of the invention〕

According to the present invention, a substrate in which a groove is formed can be filled with a homogeneous polycrystalline material. Therefore, the flatness of the polished surface of the polycrystalline layer surface becomes good, and the yield and bonding strength of bonding with the support base can be improved.

Therefore, it is possible to manufacture large diameter (for example, 6'φ) substrates,
This has the effect of significantly improving the manufacturing yield, manufacturing cost, and reliability of dielectric isolation substrates.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the manufacturing process of a dielectric isolation substrate according to an embodiment of the present invention, and FIG. 2 is a sectional view of a part of the manufacturing process of a dielectric isolation substrate according to a conventional method. Figure 3 shows the polycrystalline Si deposition apparatus used in the present invention, and Figure 4 shows the polycrystalline Si deposition apparatus used in the present invention.
FIG. 5 is a cross-sectional view of a substrate deposited with a photoexcited polycrystalline Si deposition apparatus used in another embodiment of the present invention, and FIG. 6 is a cross-sectional view of a substrate for explaining the present invention in detail. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Groove, 3... Insulating film, 4
... Polycrystalline layer, 6... Polished surface, 7... Support, 1
0...Fine particles, Tea diagram No. 4 Day Y Otsu diagram

Claims (1)

[Claims] 1. (a) Step of forming a groove having a predetermined depth from the surface of the semiconductor substrate; (b) Step of forming an insulating film on the surface of the substrate and the inner surface of the groove; (c) ) depositing a polycrystalline film on the insulating film to fill the groove; (d) planarizing the surface of the polycrystalline layer; (e) bonding a support to the planarized surface; (f) In the dielectric separation substrate formed by the process of thinning the substrate to the bottom of the groove, the groove is filled with a polycrystalline layer in which the shape and orientation of crystal grains are not oriented in a specific direction. Features a dielectric isolation substrate. 2. (a) Forming a concave groove with a predetermined depth from the surface of the semiconductor substrate; (b) Forming an insulating film on the surface of the substrate and the inner surface of the groove; (c) On the insulating film. (d) flattening the surface of the polycrystalline layer; (e) bonding a support to the flattened surface; f) A method for manufacturing a dielectric separated substrate comprising the step of polishing the substrate to the bottom of the groove, characterized in that in the vapor phase growth step, a polycrystalline film is formed while depositing fine particles on the surface of the substrate. A method for manufacturing a separation substrate. 3. A dielectric isolation substrate according to claim 1, wherein the semiconductor substrate is made of single crystal Si, and the filling layer is made of a polycrystalline material containing Si as a main component. 4. A method for manufacturing a dielectrically separated substrate according to claim 2, characterized in that the vapor phase growth step uses a raw material gas at such a high concentration that fine particles are generated in the gas phase of the reaction vessel. 5. The method of manufacturing a dielectrically separated substrate according to claim 2, characterized in that an impurity gas is mixed into the source gas in the vapor phase growth step to generate fine particles. 6. A method for manufacturing a dielectrically separated substrate according to claim 2, characterized in that the raw material gas in the vapor phase growth step is excited by electromagnetic waves to generate fine particles. 7. A method for manufacturing a dielectric isolation substrate according to claims 4 to 6, characterized in that the amount of fine particles generated in the vapor phase growth step is increased initially or periodically. 8. In claims 4 to 7, CVD
A method for manufacturing a dielectrically separated substrate, characterized in that the formation of a polycrystalline layer in the process involves independently controlling the amount of fine particles generated in a reactor and the film deposition rate due to a reaction on the substrate surface. 9. A method for manufacturing a dielectrically separated substrate according to claim 2, characterized in that, in the vapor phase growth step, fine particles generated outside the reactor are introduced into the reactor. 10. The dielectric separation substrate according to claim 2, wherein the surface of the polycrystalline layer has a mirror-polished flatness and is bonded to the support by direct bonding or an anodic bonding method. manufacturing method.