JPH0241941B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ring trip system, and more particularly to a ring trip system in a ring signal sending circuit of a telephone exchange.

FIG. 1 is a diagram showing an example of a conventional ring trip method of a calling signal sending circuit. In FIG. 1, a ringing signal power ir is supplied from a ringing signal power source 1 via resistors 2 and 7 and a DC power source 6 to a telephone 5 connected to terminals 3 and 4, causing a bell to ring. Since a capacitor is inserted in the bell circuit of the telephone 5, the DC current id is not sent out from the DC power supply 6 unless the subscriber responds.
In such a state, only an alternating current voltage due to the ringing signal current ir is generated across the resistor 7, and is blocked by the low-frequency wave generator composed of the resistor 8 and the capacitor 9, so that the transistor 11 is not energized. When the called party answers in such a state, the telephone 5
Since the bell circuit is removed and a DC loop circuit is formed, a DC current id flows superimposed on the ringing signal current ir, and a DC voltage is generated across the resistor 7 along with the AC voltage. When the capacitor 9 is charged by the DC voltage and the terminal voltage of the capacitor 9 exceeds the breakdown voltage of the voltage regulator diode 12, the transistor 11 is energized and the relay 13 is operated.
Contact 13' sends out a ring trip signal RTO from terminal 14 to notify a processing device or the like of the called party's response in a known manner.

As is clear from the above explanation, in the conventional ring trip method, a low frequency filter using a large capacitor is used to detect the direct current that flows superimposed on the ringing signal current ir when the called party answers. This results in hindering miniaturization of the calling signal sending circuit using LSI technology or the like.

An object of the present invention is to eliminate the drawbacks of the conventional ring trip method as described above, and to realize a ring trip method that can be realized by LSI technology without using large parts.

The purpose of this is to provide a first comparator circuit that compares a constant periodic ringing signal current sent out by the ringing signal sending circuit with a predetermined reference value, and a first comparison circuit that can select between two different counting operations, addition and subtraction, for the ringing signal current. a counting circuit that adds or subtracts a clock having a cycle shorter than the cycle of the clock signal; and a counting circuit that calculates a change point between a period in which the calling signal current is determined to be equal to or greater than the reference value and a period in which the first comparison circuit determines that the ringing signal current is equal to or less than the reference value. a switching circuit that detects and switches the counting operation of the counting circuit from addition to subtraction or from subtraction to addition; and a switching circuit that compares the counted value of the counting circuit with a predetermined threshold, and when the counted value exceeds the threshold, and a second comparison circuit that detects a direct current superimposed on the ring signal current and outputs a ring trip signal, wherein at the change point, a predetermined value is determined from the count value of the counting circuit at the change point. a subtracter that subtracts a correction value obtained by the counting circuit; and a subtracter that, when it is detected that the count value indicates zero during the subtraction of the counting circuit, stops the subtraction of the counting circuit until the change point is detected by the switching circuit. This is achieved by providing a third comparator circuit that allows

An embodiment of the present invention will be described below with reference to FIGS. 2 and 3. FIG. 2 is a diagram showing a ring trip system according to an embodiment of the present invention in a calling signal sending circuit, and FIG. 3 is a diagram illustrating the operation sequence in FIG. 2. Note that the same reference numerals indicate the same objects throughout the figures. In Figure 2,
Operational amplifiers 15 and 16 and resistors 17 to 20 constitute a comparator circuit CMP1, and a counter 23,
Subtractor 24, numerical comparator 35, shift register 2
5, flip-flop 26, gate 27 and 2
8 constitutes a counting circuit CTR, and a decoder 29,
The flip-flop circuit 30 constitutes a comparison circuit CMP2. Similar to FIG. 1, in FIG. 2, only the ringing signal current ir as shown in FIG. 3 is supplied to the telephone 5 connected to terminals 3 and 4 until the called party answers. The comparison circuit CMP1 compares the AC voltage generated across the resistor 2 by the calling signal current ir with a predetermined reference value, for example, 0 volts as the reference value,
When the AC voltage is 0 volts or more, the comparator circuit outputs
RTP is set to a logical value of 1, and the comparator circuit output RTP is set to a logical value of 0 when the alternating current voltage is less than 0 volts. Therefore, the time points t ₁ to t ₆ in FIG.
For the ringing signal current ir shown in , the comparator circuit output
RTP is set to logic 1 at times t ₁ to t ₂ and t ₄ to t ₅ and to logic 0 at times t ₂ to t ₄ and t ₅ to t ₆ . At this time, since the waveform of the ringing signal current usually has no symmetry between positive and negative, the time width in the positive period from t ₁ to t ₂ and t ₂
The time width in the negative period from t to ₃ is different. Also, the resistor 18 that constitutes the comparison circuit CMP
The positive time width and the negative time width do not match due to the relative value accuracy between and 19, 20 and 17, as well as the error in the operational amplifier 16. This mismatch disturbs the normal operation of the counting circuit CTR connected to the comparison circuit CMP. The comparison circuit output
RTP is clocked at a predetermined period, for example, by an 8 kHz clock signal, by the flip-flop 26 of the counting circuit CTR.
After being synchronized with CL, it is input to the counter 23 and shift register 25. The counter 23 adds the clock pulses of the 8 kHz clock signal CL one by one when the input synchronized comparator output RTP has a logic value of 1, and adds the clock pulses of the 8 kHz clock signal CL one by one when the input synchronized comparison circuit output RTP has a logic value of 0. The clock pulses of the 8 kHz clock signal CL are subtracted one by one. During synchronization using the clock signal CL, a so-called sampling error occurs, and the counted value always deviates by +/-1 count.
In the worst case, this deviation is caused by the period of the ringing signal current (approximately
16Hz), this difference is accumulated as an error in the count value of the counting circuit. Depending on the logical value of the comparison circuit output RTP, the addition operation and subtraction operation of the counting circuit are switched, and by a series of subtraction operations that are performed following a type of addition operation,
The counting circuit CTR is set to operate so that the counted value is always 0. That is, in the non-tripped state, the count value of the counting circuit should be set to 0 for each cycle of the ringing signal current. However, in reality, due to the aforementioned asymmetry between the positive and negative polarity sides of the waveform of the ringing signal current, the accuracy of the CMP of the comparator circuit, and the sampling error of the counting circuit, every cycle of the ringing signal current does not become 0. for example,
If the error remaining for each cycle of the calling signal current is m, then m is accumulated for each cycle. If the accumulated value due to this accumulation exceeds the threshold value Nt described later,
Even though it is not tripped, a trip signal is output from the detection output RTO, which will be described later.
In order to eliminate this error mechanism, the subtraction difference 2
4 subtracts a predetermined value M from the count value N of the counter 23. And the numerical comparator 35 is N−M≧
If it is determined that it is 0, it is supplied to the counter 23 as an initial setting value N-M, and on the other hand, if it is determined that NM<0, the counter 23 is initially set to 0. The shift register 25 and the gate 27 constitute a well-known differentiating circuit, which detects the conversion point (times t ₂ and t ₅ ) of the comparison circuit output RTP from logic value 1 to logic value 0, and outputs the setting signal LD. is supplied to the counter 23.
The counter 23 responds to the setting signal LD and sets the count value to the initial setting value NM supplied from the subtracter 24. (The time intervals t ₂ to t ₂ ' and t ₅ to t ₈ ' are determined by the delay time provided by the shift register 25.) Therefore, the count value N of the counter 23
increases by one from 0 at time t ₁ , reaches N ₁ at time t ₂ , is initialized to N ₁ −M until reaching time t ₂ ', and decreases by one after that until time t ₃ becomes 0. The count value N is also transmitted to the decoder 29 of the comparator circuit CMP2. When the decoder 29 detects that the received count value N has become O, the gate 2 which is in the normal state according to the comparator circuit output RTP of the logical value O
8, a stop signal IH is transmitted to the counter 23 to stop counting. The stop signal IH is
The count value N is maintained at O from t ₃ until the start of the next addition (in this case, time t ₄ ). Thus, the comparison circuit
The counter 23 starts adding one by one from time t ₄ when RTP converts to logical value 1 again, and the count value N is again
At the time _t5 when _N1 is reached, the comparator circuit output RTP is again converted to a logical value of 0, thereby stopping the addition;
After initializing the count value N to N ₁ −M at time t ₅ ,
Subtraction is performed one by one until the count value N becomes O.
On the other hand, when the called party answers at time _t7 , the direct current id is supplied to the telephone 5 superimposed on the ringing signal current ir. Note that due to the decrease in the internal impedance of the telephone 5 due to the response, the ringing signal current ir itself also increases (see FIG. 3). As a result, the comparator circuit CMP1 converts the voltage generated across the resistor 2 due to the ringing signal current ir and the DC current id, which have increased after time _t7 , to the reference value 0.
The comparison circuit output RTP is set to logic value 1 at time points t ₆ to t ₈ and t ₉ to t ₁₀ , and the comparison circuit output RTP is set to logic value 0 at time points t ₃ to t ₉ and t ₁₀ to t ₁₁ . Set. The counting circuit CTR that receives the comparator output RTP increments one by one from time t ₆ to t ₈ using the 8 kHz clock signal CL, but the time interval t ₆
Since the time interval t ₁ to t ₈ is increasing compared to the time interval t 1 to t ₂ or t ₄ to t ₅ , the count value N at time t ₈ is
It reaches N ₂ higher than N ₁ at t ₂ or t ₅ .
Thereafter, as described above, N2 _- M is initially set from time _t8 to time _t8 ' by the setting signal LD, and then subtracted by one until time _t9 , but the time interval _t8 to _t9
is much shorter than the time interval t ₆ to t ₈ , so the count value N only decreases to N ₃ by time t ₉ , and from time ₉ onwards, it is added one by one again with N ₃ as the initial value. start doing. As a result, the count value N increases with time. On the other hand, the decoder 29 of the comparator circuit CMP2 compares the received count value N with a predetermined threshold value Nt (Nt>N ₁ ), and when it detects that the threshold value Nt has been exceeded, the decoder 29 receives the count value N from the processing device etc. from the terminal 33. The flip-flop 3 is connected to the flip-flop 3 via the gate 30 which is in a conductive state due to the calling signal sending instruction signal SD.
Set 2. As a result, a ring trip signal is generated from the flip-flop 32 to the terminal 34.
RTO is output (time t ₁₂ ) and notifies the processing device etc. of the called party's response.

As is clear from the above explanation, according to this embodiment, the comparison circuits CMP1 and CMP2 and the counting circuit
All CTRs have a structure that allows high-density mounting without using large components such as large-capacity capacitors.

Note that FIGS. 2 and 3 are only one embodiment of the present invention, and for example, the count value N of the counter 23
is not limited to what is initially set at time t ₂ to t ₂ ′ and from t ₅ to t ₅ ′, and the comparison circuit output
It is also possible to initialize the conversion point from the logical value O of RTP to the logical value 1, for example, at any point in the period determined by the delay time of the shift register 25 from time _t1 , but in such a case However, the effect of the present invention remains unchanged. Also, the count value N of the counter 23
starts subtracting M one by one without subtracting M at times t ₂ and t ₅ , and sets the count N to O when the absolute value of the count N at the end of the subtraction is within a predetermined value. Although this is also considered, the effects of the present invention do not change even in such a case. Further, the configurations of the comparison circuits CMP1, CMP2 or the counting circuit CTR are not limited to those shown in the drawings, and many other modifications may be considered, but the effects of the present invention remain the same in either case. Furthermore, the waveforms of the ringing signal current ir and the DC/DC current id are not limited to those shown in the figure, and may vary depending on the line conditions connecting the telephone 5, etc., but the effects of the present invention will not change in any case. do not have. Furthermore, it goes without saying that the device for receiving the calling signal is not limited to a telephone.

As described above, according to the present invention, it is possible to realize a ring trip method that does not require the use of large components, and in addition to making it possible to downsize and high-density mounting the ringing signal sending circuit of a telephone exchange, it also enables comparison circuits and logic circuits. It has a configuration that can be integrated into an integrated circuit because it can realize the desired function with only one device, and with today's LSI technology, it can also be configured on a single integrated circuit.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a conventional ring trip method for a calling signal sending circuit, FIG. 2 is a diagram showing a ring trip method according to an embodiment of the present invention in a calling signal sending circuit, and FIG. 3 is an operation in FIG. 2. It is a figure which illustrates a sequence. In the figure, 1 is the ringing signal current, 2, 7, 8,
10, 17 to 20 are resistors, 3, 4, 14, 33
and 34 is a terminal, 5 is a telephone, 6 is a DC power supply,
9 is a capacitor, 11 is a transistor, 12 is a constant voltage diode, 13 is a relay, 13' is a contact,
15 and 16 are operational amplifiers, 23 is a counter, 2
4 is a subtracter, 25 is a shift register, 26 and 32 are flip-flops, 27, 28, 30 and 31 are gates, 29 is a decoder, 35 is a numerical comparator, CMP1 and CMP2 are comparison circuits, CTR is a counting circuit, and ir is a Ringing signal current, ID is DC current,
RTP is the comparison circuit output, LD is the setting signal, IH is the stop signal, N, N ₁ , N ₂ and N ₃ are the count values, CL is the clock signal, NM is the initial value, Nt is the threshold value, SD is the calling signal The transmission instruction signal RTO is a ring trip signal, and t ₁ to t ₂ and t ₂ ′, t ₅ ′, and t ₈ ′ indicate time points.

Claims (1)

[Scope of Claims] 1. A first comparison circuit that compares a constant cycle ringing signal current sent by the ringing signal sending circuit with a predetermined reference value; a counting circuit that adds or subtracts a clock having a cycle shorter than the cycle of the ringing signal current, and a period in which the first comparator circuit determines that the ringing signal current is greater than or equal to the reference value, and a period in which the first comparison circuit determines that the ringing signal current is less than or equal to the reference value; A switching circuit that detects a change point and switches the counting operation of the counting circuit from addition to subtraction or from subtraction to addition; and a switching circuit that compares the count value of the counting circuit with a predetermined threshold value and determines that the count value exceeds the threshold value. Accordingly, in a calling signal sending circuit comprising a second comparison circuit that detects a direct current superimposed on the calling signal current and outputs a ring trip signal, at the change point, from the count value of the counting circuit, a subtracter that subtracts a predetermined correction value; and a subtracter that subtracts a predetermined correction value when the counting circuit detects that the count value indicates zero during the subtraction operation of the counting circuit until the change point is detected by the switching circuit. and a third comparison circuit for stopping the subtraction of the ring trip circuit.