JPH0241441U - - Google Patents
Info
- Publication number
- JPH0241441U JPH0241441U JP11964888U JP11964888U JPH0241441U JP H0241441 U JPH0241441 U JP H0241441U JP 11964888 U JP11964888 U JP 11964888U JP 11964888 U JP11964888 U JP 11964888U JP H0241441 U JPH0241441 U JP H0241441U
- Authority
- JP
- Japan
- Prior art keywords
- shift register
- gate array
- wiring area
- cell string
- type shift
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11964888U JPH0241441U (de) | 1988-09-12 | 1988-09-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11964888U JPH0241441U (de) | 1988-09-12 | 1988-09-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0241441U true JPH0241441U (de) | 1990-03-22 |
Family
ID=31365059
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11964888U Pending JPH0241441U (de) | 1988-09-12 | 1988-09-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0241441U (de) |
-
1988
- 1988-09-12 JP JP11964888U patent/JPH0241441U/ja active Pending
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