JPH0238028B2 - - Google Patents

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention is a two-way communication system that enables full-duplex communication of binary data on a single transmission line by utilizing a combination of the presence or absence of voltage and the presence or absence of directional current. Related to data transmission circuits. [Prior Art] Current car audio systems give priority to the cassette, so if a cassette pack is inserted into the cassette deck even while radio reception is in progress, radio reception is interrupted and cassette play is started instead.
This state continues until the cassette pack is ejected by operating the deck, and cannot be changed by operating a switch on the radio receiver. However, such interlocking relationship is inconvenient. Particularly when there are three or more audio sources, it is preferable to be able to stop the source currently being played by operating the source that is desired to be played next. When configuring such a switching control system, if H (high) and L (low) binary data is to be transmitted and received between opposing devices, even if there is only one transmission line between them as shown in Figure 3. For example, in order to avoid data collisions on the cable 3, it becomes necessary to limit the transmission periods of the devices 1 and 2 to periods when no data is received from the other device. Only the input and output terminals of devices 1 and 2 are shown, and DV ₁ and DV ₂ are output buffers (drivers),
RV ₁ , RV ₂ are input buffers (receivers), SD ₁ ,
SD ₂ is sending data, RD ₁ and RD ₂ are receiving data,
SE ₁ and SE ₂ are transmission enable signals. Transmission enable signals SE ₁ , SE ₂ are output buffers DV ₁ ,
DV ₂ is enabled, but they are turned on only in the absence of received data RD ₂ and RD ₁ . Therefore, the data format on the transmission path becomes as shown in FIG. 4, and collision between data SD ₁ and SD ₂ is avoided. Note that S ₁ and S ₂ are transmission start bits of data SD ₁ and SD ₂ , and E ₁ and E ₂ are transmission end bits. [Problems to be solved by the invention] With the above-mentioned transmission method, devices 1 and 2 cannot transmit data at the same time, so (1) the transmission efficiency is poor, and (2) the control timing is particularly poor in the switching control system. It has disadvantages such as sometimes being missed.
The present invention uses the combination of the presence or absence of voltage on the transmission line and the presence or absence of directional current in the case of voltage, to simultaneously transmit H and L2 value data from both directions on a common transmission line. In addition to making transmission possible, the circuit configuration is extremely simplified based on the idea of specifically detecting the presence or absence of voltage on the transmission path. [Means for Solving the Problems] The present invention connects opposing devices with one data transmission line, and outputs a predetermined voltage in each device with transmission data H, and outputs a predetermined voltage with transmission data L. a transmitting section that outputs an earth potential that is resistively grounded at the transmitting section; a current detecting section that detects the presence or absence of a current output from the transmitting section to the transmission line side; and H and L of the transmitting data and the output of the current detecting section. and a demodulation section that demodulates H and L of the received data based on the presence or absence of voltage on the transmission line, and a reception section connected to the demodulation section, so that data can be transmitted simultaneously between the devices. In the data transmission circuit, the current detection section includes a first PNP transistor having an emitter terminal connected to the transmission section, a base terminal connected to the data transmission line, and a collector terminal grounded via a resistor. and the demodulator has a second emitter terminal connected to the data transmission line, a base terminal connected to the transmitter, and a collector terminal connected to the receiver.
a third PNP transistor having an emitter terminal connected to the transmitter, a base terminal connected to the collector terminal of the first PNP transistor, and a collector terminal connected to the receiver.
It is characterized by being composed of transistors. [Operation] When the transmission data H is outputted at a predetermined voltage and the transmission data L is outputted as a resistance-grounded earth potential, the voltage on the transmission line becomes zero only when the transmission data is L and the reception data is L. Further, if the transmitted data is H and the received data is L, an output current flows toward the transmission line, so that an output is generated in the current detection section. Therefore, under these conditions, the received data is
It can be demodulated as On the other hand, the received data
In this case, the voltage on the transmission line is present regardless of the H or L level of the transmitted data, but no output is generated in the current detection section. Therefore, under this condition, the received data can be demodulated as H. The table below summarizes this demodulation logic.

〔Example〕

FIG. 1 is a principle diagram of the present invention, where devices 1 and 2 are parts of different audio sources or parts of a CPU. 11 and 21 are transmitting sections, 12 and 22 are current detection sections, and 13 and 23 are demodulation sections. The transmitter 11 has interlocking changeover switches S ₁₁ and S ₁₂ . When the switch S ₁₁ is connected to the A side as shown in the figure, the transmission data T ₁ grounded by the load resistor L ₁ (this level is , but in the _following it is also simply referred to as 0). At this time, the ground potential generated by the switch S ₁₂ is used by the demodulator 13. On the other hand, when the switches S ₁₁ and S ₁₂ are connected to the B side, contrary to the illustration, the voltage V ₁ is outputted by the switch S ₁₁ . This voltage V ₁ becomes H-level transmission data T ₁ and is output to the transmission line 3 through the current detection section 12 . The current detection unit 12 detects only the current that flows with directionality when the output T ₁ of the transmission unit 11 is H and the voltage V of the transmission line 3 is L, and sets the output D ₁ to H.
Under conditions other than this, the output _D1 is set to L, and the circuit configuration is such that no current flows in the opposite direction (described later)
has. _The demodulation unit 13 consists of gates G ₁₁ to G ₁₃ and receives data _{R 1 ( =} T ₂ ) is demodulated. The device 2 also has the same configuration, and the transmitter 21 is composed of switches S ₂₁ and S ₂₂ , a load resistor L ₂ , and a source of voltage V ₁ (=V ₁ ) (T ₂ is transmission data). The demodulation unit 23 includes gates G ₂₁ to G ₂₃ and demodulates the received data R ₂ (=T ₁ ) using the logic R ₂ =(T ₂ ∩ ₂ )U( ₂ ∩V). The current detection section 22 detects the current flowing from the transmission section 21 to the transmission line 3 side, and sets the output _D2 to H. The table below shows switches A, B and switches for S ₁₁ and S ₁₂ .
These are the logical values of each part according to the four combinations of A and B of S ₂₁ and S ₂₂ .

〔Effect of the invention〕

The bidirectional data transmission circuit of the present invention described above has the following advantages. (1) Transmission and reception can be performed simultaneously using a single transmission line, allowing efficient bidirectional data transmission, and (2) Bidirectional switching control systems do not miss control timing. , and (3) can be realized with a simple circuit.

[Brief explanation of drawings]

Fig. 1 is a diagram explaining the principle of the present invention, Fig. 2 is a block diagram showing an embodiment of the present invention, Fig. 3 is a block diagram showing an example of a conventional data transmission circuit, and Fig. 4 is a time chart thereof. be. In the figure, 1 and 2 are devices, 3 is a transmission line, 11, 21
is the transmitter, L ₁ , L ₂ , R ₁₁ , R ₂₁ is the grounding resistance, 12,
22 is a current detection section, 13, 23 is a demodulation section, 14,
24 is a receiving section.

Claims (1)

[Claims] 1. Opposing devices are connected by one data transmission line, and within each device, a predetermined voltage is output with transmission data H, and an earth potential connected to a resistor is connected with transmission data L. a current detection unit that detects the presence or absence of a current output from the transmission unit to the transmission line side, and a current detection unit that detects the presence or absence of a current output from the transmission unit to the transmission line side, and the output of the transmission data H, L, the output of the current detection unit, and the voltage on the transmission line. H of received data from presence/absence,
In a bidirectional data transmission circuit, the circuit includes a demodulation section that demodulates L and a reception section connected to the demodulation section, so that data can be transmitted simultaneously between the devices, wherein the current detection section is connected to the transmission section. The demodulation section includes a first PNP transistor having an emitter terminal connected to the data transmission line, a base terminal connected to the data transmission line, and a collector terminal grounded via a resistor. a second emitter terminal, a base terminal connected to the transmitting section, and a collector terminal connected to the receiving section;
a third PNP transistor having an emitter terminal connected to the transmitter, a base terminal connected to the collector terminal of the first PNP transistor, and a collector terminal connected to the receiver.
A bidirectional data transmission circuit characterized by being composed of transistors.