JPH0236546A - Test of semiconductor memory - Google Patents

Test of semiconductor memory

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Publication number
JPH0236546A
JPH0236546A JP63185596A JP18559688A JPH0236546A JP H0236546 A JPH0236546 A JP H0236546A JP 63185596 A JP63185596 A JP 63185596A JP 18559688 A JP18559688 A JP 18559688A JP H0236546 A JPH0236546 A JP H0236546A
Authority
JP
Japan
Prior art keywords
distribution
semiconductor memory
charge
amount
alpha
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63185596A
Other languages
Japanese (ja)
Inventor
Kiyoshi Matsui
清 松井
Masanori Takada
高田 正典
Katsumi Watanabe
渡辺 勝己
Kenji Ando
健二 安藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
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Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63185596A priority Critical patent/JPH0236546A/en
Publication of JPH0236546A publication Critical patent/JPH0236546A/en
Pending legal-status Critical Current

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  • Semiconductor Memories (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To make it possible to evaluate the evaluation of the soft error of a semiconductor memory correctly with good precision compared to a conventional test method by a method wherein the market failure rate of the malfunction due to alpha rays of the semiconductor memory is computed from the relation between the variability distribution of the proof strength against alpha rays between memory cells and the distribution of the amounts of collecting charges to the memory cell parts. CONSTITUTION:The amount of a collecting charge to each memory cell part is computed on the basis of the irradiation condition of alpha rays, the sizes of the memory cells, the condition of a process and the condition of a bias and by finding the inversion ratio of each memory cell in every a plurality of kinds of the irradiation conditions of the alpha rays, the variability distribution (a strength distribution) of the proof strength against the alpha rays between the memory cells is found. Moreover, the incidence conditions of alpha-particles emitted from a wiring material into the memory cells are simulated and moreover, by finding the amount of a collecting charge in each incidence condition, the distribution (a stress distribution) of the amount of a charge of noise is found. By finding an error rate from the relation between the strength distribution and the stress distribution, the evaluation of the soft due to the alpha rays of a semiconductor memory can be conducted correctly with good precision.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体メモリのα線による誤動作(以下ソフ
トエラーと記す)を試験するための方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for testing malfunctions (hereinafter referred to as soft errors) caused by alpha rays in a semiconductor memory.

〔従来の技術〕[Conventional technology]

半導体メモリの誤動作の1つにソフトエラーと呼ばれる
現象がある。この原因となる放射線はα線で、その発生
源は、半導体メモリを構成しているM配線材、 Siチ
ップ及びこれ等をパッケージするためのプラスチック、
セラミックその他の材料中に微量に含まれているU(ウ
ラン)、7’A(トリウム)等の自然放射性物質である
。そして、U。
One of the malfunctions of semiconductor memory is a phenomenon called soft error. The radiation that causes this is alpha rays, and its sources are the M wiring materials that make up semiconductor memory, Si chips, and the plastic used to package them.
Natural radioactive substances such as U (uranium) and 7'A (thorium) that are contained in trace amounts in ceramics and other materials. And U.

rh等は自然崩壊によってα粒子(H−(ヘリウム)の
原子核)を放出し、これ等α粒子が半導体メモリに入射
すると、この飛程に沿って電子−正孔対な生成させ、こ
れが雑音電荷、雑音電流となって半導体メモリのソフト
エラーを発生させる。このようなソフトエラーの問題は
、今後、半導体メモリの高集積化、高速化に伴い増加す
る傾向にある。
Rh etc. emit α particles (H- (helium) atomic nuclei) by spontaneous decay, and when these α particles enter a semiconductor memory, electron-hole pairs are generated along this range, which generates noise charges. , which becomes a noise current and causes soft errors in semiconductor memory. The problem of such soft errors is likely to increase in the future as semiconductor memories become more highly integrated and faster.

ソフトエラーの評価方法は、従来、例えば、電子通信学
会論文誌Vex、 / 65  CA 2 PF、 6
1〜66(19ao)rα粒子による高速バイポーラR
AMのソフトエラーjに記載のように、α線を半導体メ
モリに照射してから1ハtのエラーが発生するまでの平
均時間(平均動作時間)で半導体メモリのα線耐量を評
価している。また、半導体メモリのソフトエラー率を求
めるには、α粒子によりて発生する雑音電荷量分布と半
導体メモリ内のメモリセル間における反転電荷量分布を
ガウス分布と仮定し、両分布形からソフトエラー率を推
定している。
Soft error evaluation methods have conventionally been described, for example, in the Journal of the Institute of Electronics and Communication Engineers, Vex, / 65 CA 2 PF, 6
High speed bipolar R with 1-66 (19ao) rα particles
As described in AM's Soft Error J, the alpha ray resistance of semiconductor memory is evaluated by the average time (average operating time) from when the semiconductor memory is irradiated with alpha rays until a 1-hat error occurs. . In addition, in order to find the soft error rate of a semiconductor memory, it is assumed that the noise charge distribution generated by α particles and the inverted charge distribution between memory cells in the semiconductor memory are Gaussian distributions, and the soft error rate is calculated from both distribution shapes. is estimated.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記従来技術には以下のような問題点がある。 The above conventional technology has the following problems.

半導体メモリのα線耐量を評価する場合、通常、−m類
のα線照射条件(α粒子エネルギー、入射角度)で平均
動作時間を測定するが、1チツプ内におけるメモリセル
間のα線耐量のバラツキ分布が、第2図1.2の様な2
ケの半導体メモリに対し一照射条件だけで評価すると、
誤った評価をする可能性がある。即ち、第2図において
Qo 、Qtの反転電荷量が得られるような2種類のα
線照射条件な考えるとsQoの照射条件ではサンプル2
より1Q1の照射条件ではサンプル1より2の方がα線
耐量が大きく見え、評価結果が照射条件で異なる。
When evaluating the alpha ray tolerance of a semiconductor memory, the average operating time is usually measured under -m class alpha ray irradiation conditions (α particle energy, incident angle), but the alpha ray tolerance between memory cells within one chip is The variation distribution is 2 as shown in Figure 2 1.2.
When evaluating a semiconductor memory using only one irradiation condition,
There is a possibility of incorrect evaluation. That is, in FIG. 2, there are two types of α that can obtain the inverted charge amounts of Qo and Qt.
Considering the beam irradiation conditions, sample 2 under sQo irradiation conditions
Under the irradiation conditions of 1Q1, the α-ray tolerance of Sample 2 appears to be greater than that of Sample 1, and the evaluation results differ depending on the irradiation conditions.

また、半導体メモリのソフトエラー率を求める際に、雑
音電荷量分布と反転電荷量分布を、近似モデルとしてガ
ウス分布をしていると仮定しているが、実デバイスを対
象とした場合の、両分布形の具体的な求め方については
述べられておらず、エラー率を求めることはできなかっ
た。
In addition, when calculating the soft error rate of semiconductor memory, it is assumed that the noise charge distribution and the inversion charge distribution are Gaussian distributions as an approximate model, but both There is no mention of a specific method for determining the distribution shape, and it was not possible to determine the error rate.

本発明の目的は、上記した従来技術の問題点をなくし、
半導体メモリのα線によるソフトエラーの評価を、精度
よく正確に行える手法を提供することにある。
The purpose of the present invention is to eliminate the problems of the prior art described above,
The object of the present invention is to provide a method that can accurately and accurately evaluate soft errors caused by alpha rays in semiconductor memories.

〔課題を解決するための手段〕[Means to solve the problem]

上記目的は、α線照射条件、メモリセルサイズ。 The above objectives are α-ray irradiation conditions and memory cell size.

プロセス条件、バイアス条件からメモリセル部への収集
電荷量を計算し、複数種の照射条件ごとにメモリセルの
反転割合を求めることによって、メモリセル間のα線耐
量のバラツキ分布(ストレングス分布)が求まり、また
、配線材から放出されたα粒子のメモリセル内への入射
条件をシミニレ−シランし、且つ、各入射条件における
収集電荷量を求めることによって雑音電荷量分布(スト
レス分布)を求め、ストレングス分布とストレス分布の
関係からエラー率を求めることにより、達成される。
By calculating the amount of charge collected in the memory cell section from the process conditions and bias conditions, and determining the reversal ratio of the memory cell for each of multiple irradiation conditions, the variation distribution (strength distribution) of alpha ray tolerance between memory cells can be reduced. In addition, the noise charge distribution (stress distribution) is determined by simulating the conditions for the incidence of α particles emitted from the wiring material into the memory cell, and determining the amount of collected charge under each condition of incidence. This is achieved by determining the error rate from the relationship between strength distribution and stress distribution.

〔作用〕[Effect]

半導体メモリのα線によるソフトエラーの発生の有無は
、メモリセル内に入射したα粒子によって生成される電
荷の収集量で決まる。この収集電荷量は、メモリセル部
へのα粒子入射条件(入射エネルギー、入射角度、入射
位置)、メモリセルサイズ、プロセス条件、バイアス条
件に依存する。
Whether or not a soft error occurs due to alpha rays in a semiconductor memory is determined by the amount of charge collected by alpha particles incident on a memory cell. The amount of collected charge depends on the α particle incident conditions (incident energy, incident angle, incident position) into the memory cell portion, memory cell size, process conditions, and bias conditions.

第5図は、バイポーラRAMのメモリセル部に、α粒子
が入射エネルギーE、入射角度θの条件で入射し、その
飛程に沿って電子−正孔対を生成している状態を表わし
た模式図である。同図から電荷収集モデルを考えると、
第4図に示すように、電荷収集領域は、チップの深さ方
向ではb((トランジスタの活性領域)+(空乏層(埋
込層一基板間))+(ファネリング長))、チップ平面
方向では!(空乏層を発生させている埋込層幅)で表わ
せ、収集電荷量Qは、Q=y(xt)−y(xt)で表
わせるとした。ここで、y(x)はα粒子の終点を基準
にした場合の累積電荷量、x、はα粒子が電荷収集領域
に侵入してから終点までの距離、xtは電荷収集領域を
脱してから終点までの距離である。
FIG. 5 is a schematic diagram showing a state in which α particles are incident on the memory cell portion of a bipolar RAM under the conditions of incident energy E and incident angle θ, and electron-hole pairs are generated along the range. It is a diagram. Considering the charge collection model from the same figure,
As shown in Figure 4, the charge collection region is b ((transistor active region) + (depletion layer (between buried layer and substrate)) + (funneling length)) in the depth direction of the chip, and b ((transistor active region) + (depletion layer (between buried layer and substrate)) + (funneling length)) Well then! (width of the buried layer that generates the depletion layer), and the amount of collected charge Q can be expressed as Q=y(xt)−y(xt). Here, y(x) is the cumulative charge amount based on the end point of the α particle, x is the distance from the time the α particle enters the charge collection region to the end point, and xt is the distance from the time the α particle enters the charge collection region to the end point. This is the distance to the end point.

また、第4図におけるxoは入射エネルギーEにおける
Si中でのα粒子の侵入距離(飛程)を示している。
Further, xo in FIG. 4 indicates the penetration distance (range) of α particles in Si at incident energy E.

上記モデルの妥当性を調べるために、ソフトエラーのエ
ネルギー依存特性と比較を行った。エネルギー依存特性
の実験結果を第5図に示す。同図は4個のサンプル4,
5,6.7について、入射角度を一定にし、半導体メモ
リの平均動作時間を各照射エネルギーごとに測定したも
ので、各サンプルとも凹形状の特性を示し、エネルギー
が約!、、9MaV付近に極小値が存在していることが
分かる。次に、電荷収集モデルより求めたα粒子エネル
ギーと収集電荷量の関係を第6図に示す。同図より、収
集電荷量が最大値を示すエネルギー値は、5.8MgV
付近であることが分かる。上記実験結果と比較すると、
平均動作時間の極小値と、収集電荷量の最大値を示すエ
ネルギー値が等しいことから、上記電荷収集モデルが妥
当であると言える。
In order to examine the validity of the above model, we compared it with the energy-dependent characteristics of soft errors. Figure 5 shows the experimental results of energy-dependent characteristics. The figure shows four samples 4,
5 and 6.7, the average operating time of the semiconductor memory was measured for each irradiation energy while keeping the incident angle constant. Each sample showed concave characteristics, and the energy was approx. It can be seen that the minimum value exists near 9 MaV. Next, FIG. 6 shows the relationship between the α particle energy and the amount of collected charge obtained from the charge collection model. From the same figure, the energy value at which the collected charge amount is the maximum value is 5.8 MgV
It can be seen that it is nearby. Comparing with the above experimental results,
Since the minimum value of the average operating time and the energy value indicating the maximum value of the collected charge amount are equal, it can be said that the above charge collection model is appropriate.

以上のことから、α線照射条件、メモリセルサイズ、プ
ロセス条件、バイアス条件を決定すれば収集電荷量が計
算でき、例えば第7図に示すように、Qo= Qt 、
Qt−Qsの収集電荷量が得られるような4種類のα線
照射条件で照射し、各収集電荷量におけるメモリセルの
反転割合を測定すれば、半導体メモリのストレングス分
布を求めることが出来る。
From the above, the amount of collected charge can be calculated by determining the α-ray irradiation conditions, memory cell size, process conditions, and bias conditions. For example, as shown in FIG. 7, Qo=Qt,
The strength distribution of a semiconductor memory can be determined by irradiating the semiconductor memory under four types of α-ray irradiation conditions such that a collected charge amount of Qt-Qs is obtained and measuring the inversion ratio of the memory cell for each collected charge amount.

一方、半導体メモリの配線材から放出されたα粒子のメ
モリセル内への入射条件は、第8図に示すように、α粒
子のエネルギー分布X(Z)、入射角度θ、ψ、入射位
置X、Y、Zで決まる。ここで、N(E)は、配線材か
ら放出されるα線エネルギー分布、Zは電荷収集領域5
上端から配線材までの距離を表わす。ここで、配線材か
らのα粒子の放出条件(θ、ψ、X、Y)は、α粒子の
性質からランダムに発生すると考えられるので、モンテ
カルロシミニレ−ジョンを行い各θ、ψ、x、yを求め
ることが出来る。そして、各入射条件(ψ、x、y)か
ら第8図に示すように、α粒子の電荷収集領域の侵入位
置(X、Y)から、電荷収集領域端までの距離jを算出
でき、前記電荷収集モデル式にjを代入することによっ
て配線材から発生したα粒子による収集電荷量を計算す
ることが出来る。上記、手法によって求めた収集電荷量
の発生率分布(雑音電荷量分布又はストレス分布)を第
9図に示す。
On the other hand, the conditions for the α particles emitted from the wiring material of the semiconductor memory to enter the memory cell are as shown in FIG. , Y, and Z. Here, N(E) is the α-ray energy distribution emitted from the wiring material, and Z is the charge collection region 5.
Represents the distance from the top end to the wiring material. Here, since the conditions for emitting α particles from the wiring material (θ, ψ, We can find y. Then, from each incident condition (ψ, x, y), as shown in FIG. By substituting j into the charge collection model equation, the amount of charge collected by α particles generated from the wiring material can be calculated. FIG. 9 shows the occurrence rate distribution (noise charge amount distribution or stress distribution) of the collected charge amount obtained by the above method.

以上のことから、ソフトエラーの市場故障率λは、第1
0図に示すようK、ストレス分布n(Q>とストレング
ス分布F(Q)の重合部Q。−Qmazから求まり、こ
こで、Kは配線材からのα粒子放出量。
From the above, the market failure rate λ for soft errors is the first
As shown in Figure 0, K is the overlapping part Q of the stress distribution n(Q> and the strength distribution F(Q).-Qmaz, where K is the amount of α particles released from the wiring material.

〔実施例〕〔Example〕

以下、本発明の一実施例を第1図により説明する。 An embodiment of the present invention will be described below with reference to FIG.

半導体メモリのα線耐量の試験方法は、ステップ1で、
α線の照射条件(照射エネルギー、照射角度、照射時間
等)を設定する。ステップ2で。
The testing method for alpha ray resistance of semiconductor memory is as follows:
Set the α-ray irradiation conditions (irradiation energy, irradiation angle, irradiation time, etc.). In step 2.

α線照射条件、メモリセルサイズ、プロセス条件。α-ray irradiation conditions, memory cell size, process conditions.

バイアス条件から電荷収集モデル式を用いメモリセルの
電荷収集領域内での収集電荷量を計算する。
The amount of charge collected in the charge collection region of the memory cell is calculated from the bias conditions using a charge collection model formula.

ステップ3で、半導体メモリにα線を照射開始し、ステ
ップ4で、エラーを発生させたアドレスを検出し、計数
する。ステップ5で、α線の照射時間(全メモリセルに
対し、最低1回以上α粒子が当るまでの時間)を比較し
、 NOの場合はステップ4に戻る。ステップ6で、α
線照射条件を変更するか判断し、Yetの場合はステッ
プ1へ戻る。ステップ7で、第7図に示すような収集電
荷量とメモリセル反転率の関係を表わしたストレングス
分布を求める。ステップ8で、ストレングス分布の傾き
、切片から半導体メモリのα線耐量を求める。
In step 3, irradiation of the semiconductor memory with alpha rays is started, and in step 4, the address that caused the error is detected and counted. In step 5, compare the irradiation time of α rays (the time required for all memory cells to be hit by α particles at least once), and if NO, return to step 4. In step 6, α
Determine whether to change the radiation irradiation conditions, and if Yes, return to step 1. In step 7, a strength distribution representing the relationship between the amount of collected charge and the memory cell reversal rate as shown in FIG. 7 is determined. In step 8, the alpha ray tolerance of the semiconductor memory is determined from the slope and intercept of the strength distribution.

次に、ソフトエラーの市場故障率算出方法は、ステップ
9で、配線材から放出する、α粒子のメモリセル電荷収
集領域内への入射条件をモンテカルロシミュレーション
により求める。ステップ10で、ステップ9より得られ
た入射条件から電荷収集モデル式を用い電荷収集領域内
での収集電荷量を計算する。ステップ11で、第9図に
示すような収集電荷量の発生率分布(ストレス分布)を
求める。
Next, in the method for calculating the market failure rate of soft errors, in step 9, conditions for the incidence of α particles emitted from the wiring material into the memory cell charge collection region are determined by Monte Carlo simulation. In step 10, the amount of charge collected in the charge collection region is calculated from the incident conditions obtained in step 9 using the charge collection model formula. In step 11, the occurrence rate distribution (stress distribution) of the amount of collected charge as shown in FIG. 9 is determined.

ステップ12で、ステップ7のストレングス分布とステ
ップ11のストレス分布の両分布の重合部から故障率を
計算する。
In step 12, the failure rate is calculated from the overlapping portion of the strength distribution in step 7 and the stress distribution in step 11.

以上述べたように、本実施例によれば、半導体メモリの
メモリセル間におけるα線耐量のバラツキ分布と配線材
から放出されたα粒子による雑音電荷量分布を収集電荷
量で表わすことが出来、両分有形からソフトエラー率を
推定することによって、半導体メモリのソフトエラー評
価を精度よく正確に評価することが出来る。
As described above, according to this embodiment, it is possible to express the variation distribution of alpha ray tolerance between memory cells of a semiconductor memory and the noise charge distribution due to alpha particles emitted from the wiring material by the collected charge amount. By estimating the soft error rate from both tangibles, it is possible to accurately evaluate soft errors in semiconductor memories.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、半導体メモリのソフトエラー評価を従
来に比べ精度よく正確に評価することが出来、また、製
品の改良、開発時においても、その、メモリセルサイズ
、プロセス条件、バイアス条件からストレス分布、スト
レングス分布を推定することによって、ソフトエラーに
対する性能評価を精度よく行うことが出来る。
According to the present invention, it is possible to evaluate semiconductor memory soft errors more accurately than ever before, and even when improving and developing a product, it is possible to evaluate stress caused by memory cell size, process conditions, and bias conditions. By estimating the distribution and strength distribution, it is possible to accurately evaluate performance against soft errors.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の半導体メモリのソフトエラ
ー評価に関する試験手順を示す図、第2図は半導体メモ
リの反転電荷量分布の一例を示す図、第3図はメモリセ
ル内におけるα粒子の飛程とメモリセルの縦構造図、第
4図は収集電荷量を求めるための簡略モデル図、第5図
は半導体メモリにおけるソフトエラーのα粒子エネルギ
ー依存特性図、第6図は簡略モデル式によるα粒子エネ
ルギーと収集電荷量の関係図、第7図はストレングス分
布の一例を表わした収集電荷量とメモリセル反転率の関
係図、第8図はストレス分布を得るための配線材からの
α粒子入射条件を表わした図、第9図は配線材からの収
集電荷量と発生率の関係を表わしたストレス分布図、第
10図は市場故障率の求め方をストレングス分布とスト
レス分布で表わした図である。
FIG. 1 is a diagram showing a test procedure regarding soft error evaluation of a semiconductor memory according to an embodiment of the present invention, FIG. 2 is a diagram showing an example of an inverted charge amount distribution of a semiconductor memory, and FIG. Figure 4 is a simplified model diagram for determining the amount of collected charge; Figure 5 is a diagram of alpha particle energy dependence characteristics of soft errors in semiconductor memory; Figure 6 is a simplified model. Figure 7 is a diagram showing the relationship between α particle energy and the amount of collected charge according to the formula. Figure 7 is a diagram showing the relationship between the amount of collected charge and memory cell reversal rate, which shows an example of the strength distribution. Figure 9 shows the α particle incidence conditions, Figure 9 is a stress distribution diagram showing the relationship between the amount of charge collected from wiring materials and the occurrence rate, and Figure 10 shows how to determine the market failure rate using strength distribution and stress distribution. This is a diagram.

Claims (1)

【特許請求の範囲】[Claims] 1、被試験半導体メモリに対して、α線を照射し該半導
体メモリにおけるα線による誤動作を試験する方法にお
いて、α線照射条件、メモリセルサイズ、プロセス条件
、バイアス条件から該半導体メモリの電荷収集領域内に
収集される電荷量を計算する手段と、α線照射条件を可
変して、各収集電荷量における誤動作率を検出し、該半
導体メモリ内のメモリセル間のα線耐量のバラツキを検
出する手段と、該半導体メモリから放出されるα線によ
って、電荷収集領域内で発生する収集電荷量分布を求め
るシミュレーション手段と、前記メモリセル間のα線耐
量のバラツキ分布と収集電荷量分布から、該半導体メモ
リのα線による誤動作の市場故障率が計算できることを
特徴とする半導体メモリの試験方法。
1. In a method of irradiating a semiconductor memory under test with alpha rays and testing malfunctions caused by alpha rays in the semiconductor memory, charge collection of the semiconductor memory is performed based on alpha ray irradiation conditions, memory cell size, process conditions, and bias conditions. A means for calculating the amount of charge collected in a region and varying α-ray irradiation conditions to detect a malfunction rate for each amount of collected charge and detect variations in alpha-ray tolerance between memory cells in the semiconductor memory. a simulation means for determining the distribution of the amount of collected charge generated in the charge collection region by the α rays emitted from the semiconductor memory, and a means for calculating the distribution of the amount of collected charge generated in the charge collection region by the α rays emitted from the semiconductor memory, based on the distribution of variation in the amount of α ray withstand between the memory cells and the distribution of the amount of collected charge, A method for testing a semiconductor memory, characterized in that a market failure rate of malfunctions caused by alpha rays of the semiconductor memory can be calculated.
JP63185596A 1988-07-27 1988-07-27 Test of semiconductor memory Pending JPH0236546A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63185596A JPH0236546A (en) 1988-07-27 1988-07-27 Test of semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63185596A JPH0236546A (en) 1988-07-27 1988-07-27 Test of semiconductor memory

Publications (1)

Publication Number Publication Date
JPH0236546A true JPH0236546A (en) 1990-02-06

Family

ID=16173568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63185596A Pending JPH0236546A (en) 1988-07-27 1988-07-27 Test of semiconductor memory

Country Status (1)

Country Link
JP (1) JPH0236546A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0269350A (en) * 1988-08-31 1990-03-08 Nippon Ferrite Ltd Dielectric ceramic composition for microwave
CN111258298A (en) * 2020-01-21 2020-06-09 北京市劳动保护科学研究所 Gas pipe network PLC malfunction rate testing device and method
KR102418634B1 (en) * 2021-12-22 2022-07-07 큐알티 주식회사 A semiconductor device inspection method, a semiconductor device radiation test system, a test beam evaluation method, and a test beam evaluation system using reference semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0269350A (en) * 1988-08-31 1990-03-08 Nippon Ferrite Ltd Dielectric ceramic composition for microwave
JPH0519501B2 (en) * 1988-08-31 1993-03-16 Hitachi Ferrite Ltd
CN111258298A (en) * 2020-01-21 2020-06-09 北京市劳动保护科学研究所 Gas pipe network PLC malfunction rate testing device and method
CN111258298B (en) * 2020-01-21 2021-12-24 北京市劳动保护科学研究所 Gas pipe network PLC malfunction rate testing device and method
KR102418634B1 (en) * 2021-12-22 2022-07-07 큐알티 주식회사 A semiconductor device inspection method, a semiconductor device radiation test system, a test beam evaluation method, and a test beam evaluation system using reference semiconductor device

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