JPH0236037U - - Google Patents

Info

Publication number
JPH0236037U
JPH0236037U JP11535888U JP11535888U JPH0236037U JP H0236037 U JPH0236037 U JP H0236037U JP 11535888 U JP11535888 U JP 11535888U JP 11535888 U JP11535888 U JP 11535888U JP H0236037 U JPH0236037 U JP H0236037U
Authority
JP
Japan
Prior art keywords
recess
wiring board
printed wiring
insulating substrate
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11535888U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11535888U priority Critical patent/JPH0236037U/ja
Publication of JPH0236037U publication Critical patent/JPH0236037U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Die Bonding (AREA)
JP11535888U 1988-08-31 1988-08-31 Pending JPH0236037U (US06373033-20020416-M00071.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11535888U JPH0236037U (US06373033-20020416-M00071.png) 1988-08-31 1988-08-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11535888U JPH0236037U (US06373033-20020416-M00071.png) 1988-08-31 1988-08-31

Publications (1)

Publication Number Publication Date
JPH0236037U true JPH0236037U (US06373033-20020416-M00071.png) 1990-03-08

Family

ID=31356946

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11535888U Pending JPH0236037U (US06373033-20020416-M00071.png) 1988-08-31 1988-08-31

Country Status (1)

Country Link
JP (1) JPH0236037U (US06373033-20020416-M00071.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008131039A (ja) * 2006-11-21 2008-06-05 Samsung Electro-Mechanics Co Ltd 電子素子内蔵型印刷回路基板の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008131039A (ja) * 2006-11-21 2008-06-05 Samsung Electro-Mechanics Co Ltd 電子素子内蔵型印刷回路基板の製造方法

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